Reduce I2C power consumption

[slugrustle]

I had the (probably old) idea to reduce the power consumption of an I2C bus by actively driving the high side of the pullup resistors using output pins on the MCU that serves as the master on the bus. Separate input pins are used to read the low side of the pullup resistors. See the attached diagram.

During a master read sequence, the SDA pullup resistor would be kept high. When checking for clock stretching, the SCL pullup resistor would be kept high. Otherwise, the high side of these pullup resistors would be driven by the desired bus signal.

Does anyone see problems with this scheme? Of course the fall times would be longer unless the input pins were switched between input mode and output low mode. In either case, I would bit bang this implementation and would adjust timings to meet the I2C spec across worst-case MCU oscillator tolerance.

Edit: switching compression settings on attachment.

[T3sl4co1l]

Idle condition is normally high; what difference would this make?

Tim

[slugrustle]

The idea is that the waveforms look the same at the slave SDA and SCL pins, as well as at the master SDAi and SCLi pins. Instead of tying the pullup resistors directly to the rail, SCLo would go low during the low part of a clock pulse, and SDAo would go low for a low signal during a master write. This removes the cost of pulling 1mA or so through the pullup resistors in these situations.

[malagas_on_fire]

a few tips on I2c power saving:

- Less zero's: https://embeddedgurus.com/stack-overflow/2009/07/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/

- The manual from Philips / Nexperia / NXP??? :

https://www.nxp.com/docs/en/application-note/AN10216.pdf

Check Slide 65

[slugrustle]

I did try this and was able to successfully control a Microchip MCP4551 digital potentiometer from a Holtek HT48R003 MCU. I connected SCL directly between the two chips since the MCP4551 does not clock stretch.