RISC-V Development tools

[kfnight]

I also don't understand why this metric matters at all. Who cares how many chips are sold.

I would assume Western Digital cares if it saves them millions of dollars in licensing fees.

[ataradov]

I would assume Western Digital cares if it saves them millions of dollars in licensing fees.

Ok, but in this case it appears to be presented as some sort of achievement for the ISA.

[brucehoult]

I would assume Western Digital cares if it saves them millions of dollars in licensing fees.

Ok, but in this case it appears to be presented as some sort of achievement for the ISA.

1) someone big decided the ISA is worth using vs ARM and/or x86 (WD uses both in different products)

2) they are going to invest time and money into the software/tool ecosystem too. See the 2nd message in this thread.

[brucehoult]

A little personal news ... I'm putting my RISC-V money where my mouth is and I've joined SiFive and will be moving from Moscow to San Mateo.

On Monday-Wednesday next week I'll be assisting Palmer in running a hackathon at the Embedded Linux Conference in Portland. There are three different categories. The winner of each category will receive a HiFive Unleashed quad core 1.5 GHz board, as well as a cash prize.

We'll be taking 50 boards for people to play with.

I've been playing with them in the office this week. They are very comparable on the integer tasks I've tried to an Odroid C2 (A53) at the same MHz, and definitely faster than Raspberry Pi 3 (also A53).

Of course the boards are selling for a lot more than those A53 boards at the moment, due to newness and low production rate. That will change in time.

https://www.sifive.com/blog/2018/03/03/all-aboard-part-11-risc-v-hackathon-presented-by-sifive/

[Scrts]

A little personal news ... I'm putting my RISC-V money where my mouth is and I've joined SiFive and will be moving from Moscow to San Mateo.

On Monday-Wednesday next week I'll be assisting Palmer in running a hackathon at the Embedded Linux Conference in Portland. There are three different categories. The winner of each category will receive a HiFive Unleashed quad core 1.5 GHz board, as well as a cash prize.

We'll be taking 50 boards for people to play with.

I've been playing with them in the office this week. They are very comparable on the integer tasks I've tried to an Odroid C2 (A53) at the same MHz, and definitely faster than Raspberry Pi 3 (also A53).

Of course the boards are selling for a lot more than those A53 boards at the moment, due to newness and low production rate. That will change in time.

https://www.sifive.com/blog/2018/03/03/all-aboard-part-11-risc-v-hackathon-presented-by-sifive/

What a move! Good luck!
I am watching RISC-V development very closely

[kfnight]

I wanted to go for just a day or two to the Embedded Linux conference, but they don't have single day admission. 

[brucehoult]

You could pop into the SiFive hackathon suite, no problem.

Even the showroom floor is probably pretty easy. They usually only check tags for the meals and maybe keynote. If that. Just walk in like you own the place.

[Boscoe]

Hi all,

I'm interested in RISC-V as an Altera user there isn't a free softcore in the tools. I like the idea behind RV and it's possibilities.

Now, I downloaded the source for the RISC V from SiFive but have no idea how to integrate it into a project and get it running on an FPGA, is this possible? Are there any guides?

Thanks

[andersm]

I'm interested in RISC-V as an Altera user there isn't a free softcore in the tools.

The Nios II "economy" core is free (and low-performance), isn't it?

[ataradov]

Now, I downloaded the source for the RISC V from SiFive but have no idea how to integrate it into a project and get it running on an FPGA, is this possible? Are there any guides?

SiFive core is not really a softcore. It is a real core built to be implemented in silicon.

For simple cores actually designed for FPGAs you need to look at something like PicoRV32 (https://github.com/cliffordwolf/picorv32), or my absolutely drop dead simple implementation (https://github.com/ataradov/riscv), which has projects for MAX 10 FPGAs, but easy enough to port to others.

None of them are going to be in any drag and drop style system builders, since NIOS II is a far better choice for actual work, if you plan to stick with Altera. And that's the whole point of making NIOS II, so that you stick with Altera, so there is not a whole lot of incentive for them to use anything else.

[brucehoult]

About three times shorter source code than PicoRV32. Under 1000 lines. Nice. Although there are also fewer options.

How many LUTs does it work out to?

[ataradov]

Here is a table from my notes, it may be a bit outdated, but the final numbers should be very similar. RVC - compressed ISA support, BS - Barrel Shifter, MUL - single cycle hardware multiplier.

Code: [Select]

Config    |  LE  | REG | MUL |
----------+------+-----+-----+
RVC + BS  | 2256 | 441 |   - |
RVC + MUL | 1807 | 410 |   8 |
RVC       | 1972 | 481 |   - |
BS        | 1970 | 442 |   - |
MUL       | 1511 | 410 |   8 |
-         | 1662 | 481 |   - |
----------+------+-----+-----+

It synthesizes at at least 60 MHz in the slowest grade MAX 10.

[mac.6]

Hi all,

I'm interested in RISC-V as an Altera user there isn't a free softcore in the tools. I like the idea behind RV and it's possibilities.

Now, I downloaded the source for the RISC V from SiFive but have no idea how to integrate it into a project and get it running on an FPGA, is this possible? Are there any guides?

Thanks

You can try VexRisc from SpinalHDL project, bigger than PicoRV32 and other but nicely scalable (and there is a DE2 nano project). There is also microriscy from pulpino project which is a risc-v derivative.

[ale500]

Hei Ataradov,

I tried your RISCV, very impressive. I used the gcc I compiled for the PicoRISCV project and had to add an start file with a jump to the entry function. I massaged for a DE10-Lite board, very nice.

Thanks for sharing !

[ehughes]

Segger offers a commercially supported pckage for RISC V with Embedded Studio.    There debugger is top notch so I would expect it to be a good tool.