Robust Microcontroller Input Protection

[Rufus]

Someone who raises questions to, and warns about the problems with, this approach is labeled 'full of shit' ...

I am the only one that bought up shit in this thread and lets be exact I said

"He knows a lot but some of what he posts is shit"

and some of what you post is shit, and you just provided another example.

[free_electron]

So, doing things the right was is 'shit' then... Please enlighten me as to what portion is shit so i can learn something .

[Rufus]

So, doing things the right was is 'shit' then... Please enlighten me as to what portion is shit so i can learn something .

This

Do not try this with a simply cmos gate like a 4011.  there the protection structures are for ESD only... they protect the chip when powered off. send any kind of constant current in them when powered on an there is NO guarantee that you will not turn on some parasitic element that could fry the chip.

the way protection structures work is by deliberately turning on a parasite to shunt the energy. as the energy disperses the shunt turns off all by itself ( just like a thyristor self-extinguishes on zero cross )

is some shit you posted in this thread. Telling people not to use simple gate clamp diodes citing ancient 4000 series CMOS which is well known to be prone to latch up. The 'protection structures' do not work by turning on anything they are diodes to the supply rails. Coincidentally and unfortunately the are also part of PNPN structures which form parasitic SCRs shorting the supply rails. Designers went to great lengths to ensure the gain of theses SCRs is less than unity to avoid latchup in slightly less ancient parts.

Thanks to some processing refinements, SCR latch-up isn’t a problem with the M54HC/74HC Series. There are, however, limitations on the currents that the internal metallization and protection diodes can handle, so for high-level transients (pulse widths less than 20 ms and inputs above VCC or below ground), you must limit the current of the IC’s internal diode to 20 mA rms, 100 mA peak. Usually, a simple resistor configured in series with the input suffices.

The JEDEC standard test being developed for latch-up specifies that the input/output current should be equal to the maximum rating (±20 mA), and that VCC should also be not more than twice VCCmax (14 V) for testing latch-up immunity with excess supply voltage. HCMOS ICs have been extensively subjected to the previously described tests with test parameters far exceeding those quoted by JEDEC. In no case did latch-up occur. For example, it has been determined that an HCMOS input can typically withstand continuous current (5 s on, 15 s off) of 100 mA to 120 mA, or 1ms pulses of 300 mA with a duty factor of 0.001. An input can also withstand a discharge from a 200 pF capacitor charged to 330 V.

[free_electron]

This

Do not try this with a simply cmos gate like a 4011.  there the protection structures are for ESD only... they protect the chip when powered off. send any kind of constant current in them when powered on an there is NO guarantee that you will not turn on some parasitic element that could fry the chip.

If you pull that input UNDER or ABOVE the ground rail you can and will kick in the parasitic element. A negative or positive transient can activate that element. Has happened, will happen. If the chip is powered up at that time it will fry itself (if the power supply does not go into short circuit protection). Yes chips are designed to try to avoid this kind of latchup but if the spike is hard enough it will still go in latchup. And it's not only cmos that has this problem. There is many an opamp that ,when powered symetrically , has its input pulled below the rail will fry itself. AD811 are a prime example of such an opamp... The protection diodes to have a turn-on time. Any pulse with substantial energy , faster than that may trigger the scr.. I have seen many a board go 'poof' when subjected to ESD discharges when it was powered up... simply because there were no external protection devices installed. You cannot trust a complex system built from many chips to be fully self protecting. Put the damn protection circuit ! Put a moat of blank chasses connected copper around it. Slap a shield on it.
Put a surge arrester on it , or transil or transzorb or MOv or any other of the myriad of protection devices. do NOT blindly trust !

There is a reason we still have to employ things like proper power sequencing and external input clamping / clipping and it is just for this reason. Something sooner or later will give if it is not done properly.

The way protection structures work is by deliberately turning on a parasite to shunt the energy. as the energy disperses the shunt turns off all by itself ( just like a thyristor self-extinguishes on zero cross )

This needs clarification. This mechanism works when the chip is powered off. The incoming energy will trigger the scr , which will go in conduction , dissipate the energy and go back out of conduction once the spike has passed. This is a technique used in many SLIC for POTS ( the chip that is hooked up to the phone line in a Plain-Old-Telephone-System). Actually slics also have a crowbar circuit. When powered up they can short their inputs and let the energy decay. Principle of crowbar is used in many automotive devices as well in the input structure.

Telling people not to use simple gate clamp diodes citing ancient 4000 series CMOS

It's not only the old 4000 seires that has this problem. Plenty of opamps have this as well. Same with analog mulitplexers . What do you want me to do ? list all the devices susceptible to this ? it'll be a long list. Analog devices has some appnotes about opamps and analog switches and latchup...

Thanks to some processing refinements, SCR latch-up isn’t a problem with the M54HC/74HC Series. There are, however, limitations on the currents that the internal metallization and protection diodes can handle, so for high-level transients (pulse widths less than 20 ms and inputs above VCC or below ground), you must limit the current of the IC’s internal diode to 20 mA rms, 100 mA peak. Usually, a simple resistor configured in series with the input suffices.

Just because the fairchild 74Hc series has this, does not mean you can extrapolate this to all chips. Every manufacturer does it different. Besides ... 28 years ago they were messing around in 15 micrometer. Don't try this in 45 nanometer .... Silicon area costs money an stuff is designed way tighter no than then. They will still be protected against latchup but i would not use that 20 to 100mA as 'truth' with a modern device... check the datsheet. Do not blindly trust ...

The JEDEC standard test being developed for latch-up specifies that the input/output current should be equal to the maximum rating (±20 mA), and that VCC should also be not more than twice VCCmax (14 V) for testing latch-up immunity with excess supply voltage. HCMOS ICs have been extensively subjected to the previously described tests with test parameters far exceeding those quoted by JEDEC. In no case did latch-up occur. For example, it has been determined that an HCMOS input can typically withstand continuous current (5 s on, 15 s off) of 100 mA to 120 mA, or 1ms pulses of 300 mA with a duty factor of 0.001. An input can also withstand a discharge from a 200 pF capacitor charged to 330 V.

There is many different JEDEC standards and subchapters for this kind of stuff. And not only JEDEC has this. There's others too. Just because there is a standard does not mean that every device adheres to it. It is still up to the manufacturers discretion to subject the device to a particular standard or set of standards. Do not assume that every devices has gone through this. Unless it is explicitly mentioned that a device is compliant to xyz ... do not assume ... call them and ask. If in doubt : apply external protection circuitry.

This is not shit. This is reality. Call me a pessimist if you want to. I've seen too much stuff fry itself already in my 20 years+

[Baliszoft]

(puts pinkie in mouth a-la dr-evil) riiight ....

So you have built 2 or three of these hobby thingies, which have not gone through any kind of (automotive or other) certification and industry standard testing as per the relevant specs. The design is based on something you saw other people do without knowing the details...
You also claim that this is perfectly fine and the way it should be done.

Someone who raises questions to, and warns about the problems with, this approach is labeled 'full of shit' ...

riiight ....  have a great holiday... don't step in any ...

Dont worry about me or about my product. If i will need to make this project to go through any certification (some are planned though) in the future and if fails, then it will be my problem and not yours. I have already tested my device to withstand the circumstances it has to withstand.

Your suggestion (to put external clamping or zener or tvs) diodes before the device is of course right, i am not stating anything else either. It is just not practical (lots of board space, we arent talking about only 1 pin, but at least 6-8-10-20), it is excess cost, and furthermore it is unneccesary if the device has got input clamping diodes and the possible maximum current is safe for that device. I dont know what is so difficult for you to undestand in this?

It may not work on any devices and may not be good for every type of device, but as a digital input of a uC it is a "common practice" to do this. You are just discrediting yourself stating that it is bullshit, because anybody who has seen an automotive ecu disassembled (preferably from the current century) can verify this.

[Baliszoft]

Dont bother Rufus, you wont/cant be right.

Im sorry that this five star thread turned (again) into a flame war.

[dfnr2]

Guys, why are you beating up on Free_Electron?  I have to post in his support here.  I have not read his every post, but at least in this thread (and the one linked near the beginning), he has been spot on, and his posts are constructive.  He has given an example.  He has critiqued a design.  That's actual money in the bank value.  The problem is, there's so much BS and puffery and ego on the net, it's hard to tell when someone knows what they are talking about.  Pulling signal from noise is an engineer's job.  So let me set you straight.  In this thread, free_electron's posts are the signal.

His advised technique is standard and sound for high-speed single-ended signals, when the case and chassis are also attended to.  I have learned this from experience (by actually having my devices tested, and also by experimenting in the lab, blowing up and bulletproofing my circuits until they don't blow up any more; and also by reading and talking with consultants--I wasn't lucky enough to have a mentor in this area.)  If you look at one of my boards, you will see more in common with free_electron's description than differences.  That is because some things are just good design.

EMC/ESD is a whole-system problem.  A schematic doesn't paint the whole picture (unless it's lacking.)  Even the board layout (unless it's deficient) doesn't tell the whole picture without seeing how it fits in the case, and how the case is treated.   If you have an idea of case and chassis scheme, and your board layout, with the board sitting in the case, then you can start to evaluate the system. You need to be thinking about that from the start. 

In every productive engineering environment I've been in, "productive" discussions can at times look to outsiders like arguments, with each participant excitedly propounding his viewpoint.  However, at some point, you will have to look it up and admit if you are wrong.  That's how you learn.

By the way, if you think this thread is not worth five stars, read it again, minus the griping.

[free_electron]

I dont know what is so difficult for you to undestand in this?

let me try to put it in other words :
Let's say your system is commercial and millions are made. You buy parts with ppm failure rates. You get field returns (destroyed devices) that are well above what is normal. The standard procedure is to go whine to the semiconductor manufacturer that their devices fail prematurely. The Semi fab will launch a fault analysis. They will go over your design , test it , cut the damaged devices apart and look what has actually fried. If they detect that you rely for protection on the esd structure : hands-off. sorry no refund. It's that simple.

Now, your system may be a hobby project. Why would you want to cut corners ? Protection devices are avaialble in arrays . 4 or 8 per package. I looked at the pcb of your ECU. half the board is empty. So it's very easy to add these things. Cost ? negligible. It'll be 2 or 3$ on your entire system.

It's like someone who has woodworking as hobby (i'm channeling Steve Jobs here) and makes the most beautiful cabinet , but its nailed together with rusty nails , and he used flower and water as glue ...  just don't put anything on the top shelf huh .... It's like a museum showing Rembrandt or Van Gogh paintings hung, crooked,  on a wall with a staple gun or with thumb tacks ... a frame is not not needed. You can look at the painting anyway.. if it gets damage ? .. ah who cares, we'll ask him to paint another one ( or we'll put a photocopy in place )

That is the message i am trying to convey. The world is already full of crummy , corner cutting designs. Tv's and dvd players that fail 1 month after out of warranty. Let's not make more...

Have some pride in what you build ! Do it the right way. Even if it's only for hobby. It ain't that hard or expensive.

So there you have it. That's the part i don't understand.

Now, what you do is your decision and, frankly, i don't care if you put protection devices or not. It's your problem if it goes kablooie. What i do have a problem with is pushing this approach as 'the standard' . you don't need to make it better. What was on Bart Simpsons t-shirt again ?

[robrenz]

Well said!

[Baliszoft]

Electron,

I agree in most of your statements in your last post. My board has lots of space, i could put those diodes in, but i think i will just do it on the simple way and leave them out. Why? As i already said my uC is capable of handling the excess current. Why am i so sure in this? Microchip actually has an app note about this (mentioned earlier), and because i have tested it. I admit that i did not go until destruction, but will do as promised. If i can damage my uC i will put your diodes in, but if i cant, they wont have place on my board for sure.

[free_electron]

Fine with me. It's your design after all . You control it.

I wouldn't do it , but that's just me being prudent.

[codeboy2k]

Fine with me. It's your design after all . You control it.

I wouldn't do it , but that's just me being prudent.

I like prudent.

[Mechatrommer]

the problem are...

1) the newbie hobbiests meeting up with seasoned professionals, and they cant distinguish the knowledge level, field of discipline and target area, budget and specification etc to one another.

2) seasoned professionals, they are well... "highly professional" no doubt. but i believe their knowledge are doomed to obsolesence, esp most to people who stick so hard with what they are used to, my 2cnt... for me, i believe visual basic is still the way to make a PC application today

i know free_electron's circuit earlier must be it, the bulletproof input protection for digital IO. but (1) since i'm not expert so i dont know which one is shit or not, in the end maybe i should do my own research based on circumtances that i'm expecting (150% torture test etc) or maybe back refering to those standard and no blindfold duck tape "not engineering" approach. and (2) if i'm thinking of making a "handheld" device with 16 - 64 IOs, then adding beefed protection like free_electron did may end up my device sized larger than a PC motherboard. "chest sized held" not "handheld sized", so its quite a dilemma.

anyway, bookmarked this informative thread, i trust it'll become usefull later. i just wonder why this thread keep bumped, no wonder... soon it'll become proving "does god exist" thread have a nice day people. but still my kudos to free_electron for willingness to share information "boldly". good (righteous) peoples get hits hard! history proved! just to let u know. cheers.

[codeboy2k]

... soon it'll become proving "does god exist" thread

If He exists, I am sure He would use input protection.  He has to keep the nasties out of His kingdom with multiple levels of protection.

[Mechatrommer]

and leaving us "loosly" protected... but, its a "freedom" if you think about it

[free_electron]

The 11th commandmend might as well have read  :

"Thou shallt use input protection for i might smite thee !"

[Baliszoft]

1) the newbie hobbiests meeting up with seasoned professionals, and they cant distinguish the knowledge level, field of discipline and target area, budget and specification etc to one another.

Just a minor remark (advise) here; please don't fall into the mistake and measure "experience level" by the number of posts.

maybe i should do my own research based on circumtances that i'm expecting (150% torture test etc)

Watch out! You will be called duck taper too, no doubt. I am using 1% of the rated dc clamping current in my design and i have been called everything.

[Baliszoft]

The 11th commandmend might as well have read  :

"Thou shallt use input protection for i might smite thee !"

No need for this. You are already being treated as the god.

[Baliszoft]

THEORY OF OPERATION
This application takes advantage of the input static
protection circuitry that exists on all I/O pins of a CMOS
PIC16C5X. These protection circuits are designed to
short the inputs to the power supplies when a large
overvoltage is applied, thus protecting the chip from
static electricity spikes. On PIC16C5X microcontrollers,
this protection circuit is two large P-N diodes on each
input (Figure 1). These diodes will short any voltage
higher than VDD to the VDD supply and any voltage less
than VSS to the VSS supply. They can take several milliamps
of current without any damage to the chip. High
voltages can be applied directly to the chip inputs as
long as they are current limited.

[dfnr2]

THEORY OF OPERATION
This application takes advantage of the input static
protection circuitry that exists on all I/O pins of a CMOS
PIC16C5X. These protection circuits are designed to
short the inputs to the power supplies when a large
overvoltage is applied, thus protecting the chip from
static electricity spikes. On PIC16C5X microcontrollers,
this protection circuit is two large P-N diodes on each
input (Figure 1). These diodes will short any voltage
higher than VDD to the VDD supply and any voltage less
than VSS to the VSS supply. They can take several milliamps
of current without any damage to the chip. High
voltages can be applied directly to the chip inputs as
long as they are current limited.

Those diodes are are not really intended as primary ESD protection on chip.  They are more for mitigating ESD during (proper) handling.  Those diodes are just too tiny.  They can also handle the residual energy after your real ESD protection shunts off the majority.

Whether you actually put ESD protection at each pin is a trade-off, weighing the inconvenience/expense of putting it in against the consequences of a failure.  However, the built-in ESD diodes in a regular commercial chip do not significantly affect that equation.

[robrenz]

THEORY OF OPERATION
They can take several milliamps
of current without any damage to the chip. High
voltages can be applied directly to the chip inputs as
long as they are current limited.

"Several" does sound like a spec you can take to the bank.

[SeanB]

Weasel words, means - we tested it and they did not fail until we hit 10mA , and then only one in 10 chips died from it.

[Mechatrommer]

Just a minor remark (advise) here; please don't fall into the mistake and measure "experience level" by the number of posts.

dude you dont teach me that! i got one example of a person with great great number of posts but knows pretty much nothing.... myself! and i hung around much much more than anybody else here (i need a life!) so i know what free_electron had posted for so long, albeit he's newer than i am, and sure (didnt i tell you?) i dont know which part of his posts are shit.

No need for this. You are already being treated as the god.

right! and god get bashed! LOL ohh i love this kind of part when things get offtopic and as usual... i'll get easily... trolled, LOL.

[free_electron]

Call their bluff . Pick up phone and ask microchip : i have an application here. Volume 10 million devices. I want to send 110 volt in the chip using only a series resistor and use clamp diodes as limiter. Can you give me some hard numbers of what works ? I need 1ppm over 10 years?  Watch em scramble......  They will not give you anything. They will tell you : you do the work. We will not back such a design as the chip is not designed nor specced for that.
It may work, but you need to test your application. We cannot and will not do the test nor guarantee anything. We can custom build you something that we can guarantee, but not the off the shelf part.

No sane semiconductor manufacturer will back that. Besides, UL would have a field day for safety ...

And drop the god stuff right ? I'm not god. There's more stuff about electronics that i don't know than i do know. God ? No. Buddha ? Pot-belly wise yes, otherwise no either. ( working on it. Pot-belly that is)
What i post here comes out of my experience and what i have learned over the years. I have the luxury of having been involved in lots of different designs from automotive over dsl over wireless over mechatronics, industrial. Ive seen and done a lot of crazy things. ( like a chip to control the speed of a vacuum cleaner motor. A microphone was used to pick up the sound of dust in the intake. This signal got filtered , integrated and if no dust was deteced speed went down... So the person vacuum cleaning had feedback if a spot was clean. This was pre- arbitrary waveform generators .. So to generate this signal we had a bucked of calibrated dirt and a carpet in the lab..... I spend weeks vacuuming that patch of carpet..)
I've done design kit testing as well .( new silicon process. All parts need full qualification and characterisation and spice models need to be made).
One of those tests is esd. Human body model 1,2 and 3. Machine model 1 and 2 and a whole bunch of other models. This included the io structures with esd diodes. But those structures get 2 or three zaps and they pass. They are not tested for 1 million zaps. The esd structure in achip reasonably will get zapped while the chip is being manipulated and put on a board. If esd procedures are followed it should get zero zaps. But well accomodate a number ( the spec called for 10 zaps at one second interval with a certain model and energy). Anything beyond that is uncharted territory.
Once the chip is in an end product, it is the design of the entire system that needs to hold the overload. Semiconductor manufacturers do not think outside of the box. Outside meaning 'beyond the pins of the package'. That is the end users domain and he needs to do his testing.

This is different for protection devices. These are tested at a million or more strikes. A lot of protection devices are even underwritten by individual labs like vde and ul. They set the standards and stick out their necks. And such devices will carry the logo on them. That still does not mean your product will pass. It just means that one component is approved for its described usage of protection as per its specifications. The specifications have been independently verified and other tests like flammability, self extinguishing and others all pass as well.

Long story short : you do not use the esd structure as clamp. Can you get away with it. Yes . But it is not tested and not specced for such usage. And no manufacturer will guarantee anything hard on paper. Sure they will write vague app notes that you can do this , but in the end you will be responsible.

There is such a thing as due-dilignece and prudence. Murphy states that any expensive transistor protected by a fast acting fuse will protect the fuse by blowing first. And that is still the truth.

Some people are more adventurous. Fine with me. I'm a coward. If my circuit fries it will show due diligence and no fingers will be pointing at me. I did everything i could with the best practices around.

[Mechatrommer]

1) the newbie hobbiests meeting up with seasoned professionals, and they cant distinguish the knowledge level, field of discipline and target area, budget and specification etc to one another.

Just a minor remark (advise) here; please don't fall into the mistake and measure "experience level" by the number of posts.

and also please dont fall into the mistake that being "professional" or being "experienced" or "knowledgable" is a "good" thing. it can be bad and "no fun"... my friend

These diodes will short any voltage
higher than VDD to the VDD supply and any voltage less
than VSS to the VSS supply. They can take several milliamps
of current without any damage to the chip

is this for infinite amount of time? or only for very short duration? because i know one simple conductor that can take few amps (depending on the size), but if its too long say than a second, it will die. any clear cut to this? if its for infinite time, then i can trust using limiting resistor alone is sufficient, for any kind of high voltage torture/shape.