Well, on my HDL-softcore (fpga), I have designed the register file to have a full initialization to zero on every hw-reset event. Thus, I am sure that all registers are actually zero
I wonder if that kind of rigidity is necessary. Maybe you can design most the register file to be uninitialized.
AFAIK for AVR only the program counter (default to either zero or the beginning of the bootloader area, determined by a fuse) and the stack pointer (default to the end of RAM) have defined reset values. For ARM Cortex-M there is no initial value for all registers and the only guaranteed reset state is that the pipeline resets into the state as if loaded the instruction “ldm 0, {sp, pc}”