SAMD11 timer config using ASF

[kmm]

Howdy again all,
I'm in the process of trying to figure out the SAMD11C14 and ASF, and I'm running into a problem configuring the TCC timer for 4 channels of PWM output.
Based on the datasheet and the examples, I *think* I'm doing the right things to config the timer block and wgm mode (I am seeing PWM come out, and I can change the clocking and resolution to obvious effect), but the output I'm getting is weird.

Here's how I have the TCC set up:
Module is TCC0
Compare/match channel 0 is assigned to output "A" which is coming out on W04 and physically on PA08
Compare/match channel 1 is assigned to output "B" which is coming out on W05 and physically on PA09
Compare/match channel 1 is assigned to output "C" which is coming out on W00 and physically on PA14
Compare/match channel 1 is assigned to output "D" which is coming out on W01 and physically on PA15

Here's what I'm seeing when I set a match value on a given channel, and leave the rest at zero:
Channel A -> PWM output on A and C
Channel B -> PWM output on B and D
Channel C -> no output
Channel D -> no output

Based on the results I'm getting I think problem exists between TCC and output pins, probably related to the pin muxer.
I've attached a copy of the code I'm using (a hacked up ASF example) and the schematic; this may very well be simply a case of me not seeing an obvious error, so just another set of eyes would be appreciated.

Thanks for any input on this!

[ataradov]

Just in case you want to do this without ASF, here is the code for D21, but should work on D11 as well:

Code: [Select]

void APP_PwmInit(void)
{
  HAL_GPIO_R_out();
  HAL_GPIO_R_pmuxen(PORT_PMUX_PMUXE_F_Val);

  HAL_GPIO_G_out();
  HAL_GPIO_G_pmuxen(PORT_PMUX_PMUXE_F_Val);

  HAL_GPIO_B_out();
  HAL_GPIO_B_pmuxen(PORT_PMUX_PMUXE_F_Val);

  HAL_GPIO_W_out();
  HAL_GPIO_W_pmuxen(PORT_PMUX_PMUXE_F_Val);

  PM->APBCMASK.reg |= PM_APBCMASK_TCC0;

  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(26/*TCC0_GCLK_ID & TCC1_GCLK_ID*/) |
      GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(0);

  TCC0->CTRLA.reg =
      TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV1_Val) |
      TCC_CTRLA_PRESCSYNC(TCC_CTRLA_PRESCSYNC_PRESC_Val);

  TCC0->WAVE.reg = TCC_WAVE_WAVEGEN(TCC_WAVE_WAVEGEN_NPWM_Val);

  TCC0->PER.reg = PWM_TOP;

  TCC0->CTRLA.reg |= TCC_CTRLA_ENABLE;
}

static void pwmUpdatePwmChannels(void)
{
  TCC0->CTRLA.reg &= ~TCC_CTRLA_ENABLE;

  TCC0->COUNT.reg = 0;

  TCC0->CC[0].reg = 111;
  TCC0->CC[1].reg = 222;
  TCC0->CC[2].reg = 333;
  TCC0->CC[3].reg = 444;

  TCC0->CTRLA.reg |= TCC_CTRLA_ENABLE;
}


[ataradov]

I don't  think you can actually use WO > 3 this way. I think you need to use PMUX E for PA8 (WO[2]) and PA9 (WO[3]) and PMUX F for PA14  (WO[0]) and PA15 (WO[1]).

[kmm]

Cool, I'll look into that, and thanks for that sample code it's really helpful to be able to compare ASF vs direct register poking.

[kmm]

Alex, you were right on!
I changed the pin and mux parameters to use the TCC WO2 and WO3 outputs on block E, and I'm now getting 4 distinct PWM output channels.
They're not lining up with the pins as I'd expect them to, but this isn't a huge concern as I can just redefine my macro symbols appropriately.

Attached is the new main.c on the off chance it may help someone else.
(The channels map out from the program to my board [A:C, B:D, C:A, D:B], I haven't gotten into figuring out why yet...)