[Solved] Small-ish FPGA or CPLD 5V-tolerant ?

[Romain]

Hi all,

I'm to re-implement a hard-wired address decode (with lots of 74000) on a board, and to save place and allow upgradability, I'd like to do that in programmable logic.

I'm looking for something very small, and most importantly very cheap (sub $2). I think even a small CPLD or FPGA (with a few hundred LUTs) would be enough. TTL ICs are still cheap enough to not justify programmable logic when the operation only needs a few 10s of them...

Because the bus I'm interfacing with is 5V, it would be best to have 5V-tolerant inputs, and even better: a 5V device. Unfortunately, it's 2016 and most of these chips have become obsolete. I'm no beginner in CPLD and FPGA, but I've always used the big stuff: Spartan and Virtex on one hand, and low-power stuff: Smart-Fusion and Actel Igloo on the other.

Thanks if you have a few references in mind 

[nctnico]

Xilinx XC95C00 series

[obiwanjacobi]

I use an Altera Max II 240 (80 IO) CPLD with clamp diodes and current limiting / pull up resistors.
See also the Max II handbook chapter 8.

I got a single Max II 240 for $1.38 and 10 for under $10.00 on ebay.

[2c]

[janoc]

Xilinx XC95C00 series

Did you mean the XC9500XL series?

There is not 'C' in the middle (maybe you have confused it with the newer Coolrunners, but those are not 5V tolerant, AFAIK) and the XL at the end matters, because there is the obsolete and very expensive XC9500 5V series. XC9500XL is 3.3V but 5V tolerant.

[FrankBuss]

There is not 'C' in the middle (maybe you have confused it with the newer Coolrunners, but those are not 5V tolerant, AFAIK) and the XL at the end matters, because there is the obsolete and very expensive XC9500 5V series. XC9500XL is 3.3V but 5V tolerant.

I don't know if all of them are discontinued, but lots of other XC9500XL parts are now discontinued, too:
http://www.xilinx.com/support/documentation/customer_notices/xcn15006.pdf
And XC9500XL parts are not supported anymore in their latest design suite Vivado, you have to install an older ISE webpack version (another 10 GB software package). Looks like they really want to get rid of it, which is a shame, because this was one of the last parts with 5V tolerant inputs, cheap, only one supply voltage needed, integrated configuration flash, and still very useful for many projects (I built my C64 Kerberos MIDI cartridge with an XC95144XL).

That said, you can still get them on Digikey and the XC9536XL parts are very cheap and perfect for fast address decoding. Many 5V circuits work with 3.3V signals, too, so could be used as a replacement without external voltage converters, if you don't plan to sell a product for the next 10 years with it.

[andersm]

And XC9500XL parts are not supported anymore in their latest design suite Vivado, you have to install an older ISE webpack version (another 10 GB software package).

It's been years since I've looked at it, but AFAIK support for them was "frozen" somewhere around ISE 8-9 or so. Even though Xilinx' release notes for the newer versions of ISE promised generic improvements like not putting output files with your source code, none of those were supported by the XC9500XL toolchain. I also ran into some bugs, and when I reported them on their forums, the replies could best be summarised as "yeah, deal with it."

[Romain]

I got a single Max II 240 for $1.38 and 10 for under $10.00 on ebay.

Prices on Octoparts are between $6 and $10.
Do you have a reference in mind, or a link?

The XC96500 is under obsolecence : http://www.xilinx.com/support/documentation/data_sheets/DS063.pdf

One thing I missed in my first post, is that the product will be available for at least the next 5 years. If I have to put level converters to use a newer CPLD/FPGA and be safe, then so be it.
It looks like CPLDs are a dying technology to me... Embedded designs rely on SoC nowadays, while bigger designs use the horse power of FPGAs. The tradeoff for me would be to use a not-too-bad FPGA, and implement an ARM soft core for the on-board logic. But what's the point when you can get a STM32 with a Cortex-M0 for less than a buck?

[rstofer]

One thing I missed in my first post, is that the product will be available for at least the next 5 years. If I have to put level converters to use a newer CPLD/FPGA and be safe, then so be it.
It looks like CPLDs are a dying technology to me... Embedded designs rely on SoC nowadays, while bigger designs use the horse power of FPGAs. The tradeoff for me would be to use a not-too-bad FPGA, and implement an ARM soft core for the on-board logic. But what's the point when you can get a STM32 with a Cortex-M0 for less than a buck?

The price will never be close to $1 but the Zynq SoC devices have a dual core ARM processor plus FPGA fabric.  I'm looking forward to playing with one of these.

GALs are still available at Jameco  I have no idea how to program them...
http://www.jameco.com/webapp/wcs/stores/servlet/StoreCatalogDrillDownView?langId=-1&storeId=10001&catalogId=10001&freeText=PAL&search_type=jamecoall

http://www.uchobby.com/index.php/2008/03/30/gals-for-electronics-hobby/


CPLDs tend to have more easily managed packages whereas the vast majority of FPGAs use BGA packages.  Not hobbyist friendly!

[nctnico]

There is not 'C' in the middle (maybe you have confused it with the newer Coolrunners, but those are not 5V tolerant, AFAIK) and the XL at the end matters, because there is the obsolete and very expensive XC9500 5V series. XC9500XL is 3.3V but 5V tolerant.

I don't know if all of them are discontinued, but lots of other XC9500XL parts are now discontinued, too:
http://www.xilinx.com/support/documentation/customer_notices/xcn15006.pdf
And XC9500XL parts are not supported anymore in their latest design suite Vivado, you have to install an older ISE webpack version (another 10 GB software package). Looks like they really want to get rid of it

I think that is jumping to conclusions. Only the PLCC44 packages where discontinued. I don't see support in their Vivado design suite as mandatory either because there are still several things missing (AFAIK some VHDL synthesis constructs aren't supported) from Vivado as well so having ISE around is kinda mandatory anyway. And what is 10GB? Peanuts for today's hard drives.

Oh and don't mistake the XC9500 for the XC9500XL series like I do everytime 

[Romain]

I've had a look at a couple of CPLD series from Lattice and Altera, let me know what you think:

Altera: MAX II and MAX V families :
https://www.altera.com/products/cpld/max-series/max-ii/overview.html
https://www.altera.com/products/cpld/max-series/max-v/overview.html

Some price research giving $1 - $3:
https://octopart.com/search?q=MAX%202%20CPLD&view=list&sortby=avg_price%20asc
https://octopart.com/search?q=MAX%20V%20CPLD&view=list&sortby=avg_price%20asc
https://octopart.com/5m40zm64c5n-altera-20101003

Lattice:
https://octopart.com/isplsi2032e-110lj44-lattice+semiconductor-728551

Just skimming through the MAX V datasheet, it requires 1.8V for the core, and the IO can work at 3.3V.
So basically I'm putting a single chip FPGA, but I need LDOs and voltage converters to adapt the supply and all the voltages... it's kind of defeating the purpose

At this stage, I'm also considering putting a second STM32F0 just to do the address decoding... the bus is running at 5MHz, with a core running at 48MHz that leaves a few instructions to try decode the bus on the go 

[FrankBuss]

At this stage, I'm also considering putting a second STM32F0 just to do the address decoding... the bus is running at 5MHz, with a core running at 48MHz that leaves a few instructions to try decode the bus on the go 

The IOs could be slower, depends on the microcontroller, and requirements for setup and hold times could be too fast. It might work with 1 MHz buses, but 5 MHz sounds too high.

Zynq is a great idea and very useful, if you need a very fast and wide connection between an ARM core and a FPGA (I built a 64 bit / 100 MHz logic analyzer with it), but usually it is much cheaper to buy a cheap FPGA and use an external cheap ARM microcontroller with whatever additional peripherals you need, like USB.

If voltage level translators are no problem, I can recommend Lattice MachXO2. Small FPGAs and there are models with internal configuration flash and just one 3.3V supply voltage. And they are relatively cheap as well, if you consider that you don't need any external components like 1.8V regulator or configuration flash. I used it for a prototype of my CrazyCartridge, in combination with a microcontroller for USB communication.

[Carrington]

- Altera MAX3000A series (On the way to be obsolete, if it isn't already).
or
- Lattice ispMACH4000ZE series.   

[Romain]

Hi FrankBuss, the MachXO2 series look great!
If I don't need the bells and whistles, I'm even considering going for the (slightly cheaper) MacXO original serie. Do you know when it was introduced, and if there is a higher risk of obsolescence than the more recent XO2 and XO3 families?

The MAX3000A doesn't appear anymore on Altera's website. For a new design, it looks dangerous...
The ispMACH4000ZE looks good on paper, except that the core runs at 1.8V. Now, putting a SOT-5 LDO for a low power PLD isn't really a problem.

I'm downloading the Lattice Diamond Design Software to get a better idea, but so far only Lattice seems to be in the correct price range. By the way, do you know if the Free License will be ok to try out  the ispMACH 4000ZE and MachXO families?

Thanks!

[janoc]

The price will never be close to $1 but the Zynq SoC devices have a dual core ARM processor plus FPGA fabric.  I'm looking forward to playing with one of these.

Uh you have got to be kidding - using a Zynq for replacing discrete logic address decoder? That's  kinda like doing pizza deliveries in a Lambo.

The GALs like 16V8 and similar are programmed using a tool from Atmel, I believe. However, those are really old and limited - any CPLD will be running circles around a GAL and for less money.

[rstofer]

The price will never be close to $1 but the Zynq SoC devices have a dual core ARM processor plus FPGA fabric.  I'm looking forward to playing with one of these.

Uh you have got to be kidding - using a Zynq for replacing discrete logic address decoder? That's  kinda like doing pizza deliveries in a Lambo.

The GALs like 16V8 and similar are programmed using a tool from Atmel, I believe. However, those are really old and limited - any CPLD will be running circles around a GAL and for less money.

Well, SoC came up...

Here's the thing: nowhere in the discussion is there any mention of the number of inputs and outputs.  Address decoding shouldn't take a barn full of logic unless it is a very complicated machine.

Is this for a commercial project?

[Romain]

Here's the thing: nowhere in the discussion is there any mention of the number of inputs and outputs.  Address decoding shouldn't take a barn full of logic unless it is a very complicated machine.

Is this for a commercial project?

Nice asking the good questions 
Yes it is for a commercial project.
Number of signals:
- About 10 Address lines
- 2 buses of 8 bits
- About 5-8 control signals
Let's say a 48-pin should be up to the job. No need to go for the BGA stuff (even though the board will be manufactured, so it's not a problem).

Different addresses need to be decoded, and the data latched, so the microcontroller has time to read it. In a nutshell, it's a decode/latch engine that I'm looking for. Something to off-load the microcontroller from watching the 5MHz bus all the time. One good thing is that the data rate is quite slow (about 1kHz, no more). So the micro has plenty of time reading the latched date before the next one comes up.
I would even add: having a CPLD/FPGA that could be reprogrammed by the micro (SPI and al) would be absolutely amazing!

[rstofer]

Most every FPGA requires a configuration flash of one kind or another.  But that is only one way of loading the FPGA image.  It can also be done with a uC bypassing the requirement for any flash in the system.

Here's something from Xilinx:
http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf

Notice that their circuit uses a 2:1 MUX on the JTAG lines so you can program the chain with a regular JTAG programmer OR you can select the uC.  You can decide whether to incorporate the flash in the JTAG chain.

I haven't read the entire App Note.

http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf


ETA:  Theflash image gets large as the FPGA gets large.  I don't think I would incorporate the FPGA image into the uC code, I would probably see if I could justify adding an SD card.

[obiwanjacobi]

I got a single Max II 240 for $1.38 and 10 for under $10.00 on ebay.

Prices on Octoparts are between $6 and $10.
Do you have a reference in mind, or a link?

Search for 'epm240'...

[Romain]

Most every FPGA requires a configuration flash of one kind or another.  But that is only one way of loading the FPGA image.  It can also be done with a uC bypassing the requirement for any flash in the system.

Here's something from Xilinx:
http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf

Notice that their circuit uses a 2:1 MUX on the JTAG lines so you can program the chain with a regular JTAG programmer OR you can select the uC.  You can decide whether to incorporate the flash in the JTAG chain.

I haven't read the entire App Note.

http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf


ETA:  Theflash image gets large as the FPGA gets large.  I don't think I would incorporate the FPGA image into the uC code, I would probably see if I could justify adding an SD card.

This is true for bigger FPGAs, but thankfully not the case for the smallest CPLD/glue devices. While the biggest ones use RAM, and need to be programmed at every boot, low power devices store their configuration in a Flash matrix and have an instant boot.
Check the MaxOS product page, they have a boot time less than 1ms (which I find horrendously long, but I haven't read the datasheet yet).

On the system, the microcontroller is hooked to a bigger processor (with storage),  which will hold the new image for the FPGA, and reprogram it through the microcontroller's SPI bus.
Hope that clarifies the setup.

Thanks

[obiwanjacobi]

Just skimming through the MAX V datasheet, it requires 1.8V for the core, and the IO can work at 3.3V.
So basically I'm putting a single chip FPGA, but I need LDOs and voltage converters to adapt the supply and all the voltages... it's kind of defeating the purpose

The Max II is Just plain 3.3V and had flash. It doesn't get any simpler than that.

[Romain]

Hi all, thanks for your answers.

Lattice MachXO2:
The smallest device f the family is the XO2-256HC (3.3V with onboard LDO and flash). It has 256 Luts and 2kb of RAM (could be useful to buffer the data). It is available in 48-QFN (40 IO available) and 100-TQFP (55 IO available). This should be enough for my application.

Unlike Actel (now Microsemi) Igloo, the fabric isn't flash-based but is RAM-based:

The MachXO2 devices also provide flexible, reliable and secure configuration from on-chip Flash memory. These
devices can also configure themselves from external SPI Flash or be configured by an external master through the
JTAG test access port or through the I2C port. Additionally, MachXO2 devices support dual-boot capability (using
external Flash memory) and remote field upgrade (TransFR) capability.[...] the time taken for configuration and entry into user mode is specified as Flash Download Time (tREFRESH)
LCMXO2-256 0.6 ms
LCMXO2-1200 1.9 ms

Even though it saves cost on the BoM not having an external SPI flash, the boot up time isn't instantaneous, and the bigger the device is, the longer it takes (normal).

The price starts at $1.08 on Newark: "Available until stock is exhausted") then ramps up quickly on other distributors: $2.28 on Mouser and $2.83 on Digi.

I like the chip, but I don't feel confident in it's long term availability.

Altera MAXII:
The smallest device in the family is the EPM240 (thanks obiwanjacobi).
Searching for some pricing, I can't find anything cheaper than $5 per unit. See on Octoparts.
I've checked on eBay, but I'm sure you understand I can't buy (from China) on eBay to source my components for manufacturing in Europe.

To summarize, at this point I'd rather stay with good old 7400 TTL logic, than going for pricey, long-term risky chips.

[Yansi]

Yeah the pricing of Altera MAX II devices is interesting, huh. Any local distributor in EU --> 6$ or thereabout. (funny as hell if you realize you can have a full featured FPGA for that price).  MAX II on ebay/china?  $1 a piece.  I have bought a batch of these (I think 10pcs).  They came normally in a plastic tray  (sawn apart to fit only those 10 pcs), looked completely normal and brand new. Have already used a few of them, no problems whatsoever.

Btw, I think that MAX II support has been dropped from the recent Quartus versions too. (Or was that Cyclone II which were dropped? not sure).

MAX II also only single 3V supply, not 5V tolerant.

[FrankBuss]

Hi FrankBuss, the MachXO2 series look great!
If I don't need the bells and whistles, I'm even considering going for the (slightly cheaper) MacXO original serie. Do you know when it was introduced, and if there is a higher risk of obsolescence than the more recent XO2 and XO3 families?

I guess that's always a risk, except for Microchip, where I don't know any case where they discontinued a microcontroller. The MachXO family was introduced in 2005: http://www.eetimes.com/document.asp?doc_id=1296827 And unlike with the XC9500XL on the Xilinx site, it is only one click away on the products page and no notes "not intended for new designs". So maybe 10 more years, but maybe ask them how long they plan to produce it (and write it here). And then there is always the last buy option when they announce to discontinue it. For this low price you could do a lifetime buy for your product, but at least you have enough time to find a replacement.

I'm downloading the Lattice Diamond Design Software to get a better idea, but so far only Lattice seems to be in the correct price range. By the way, do you know if the Free License will be ok to try out  the ispMACH 4000ZE and MachXO families?

Last time I tried it, using it for MachXO2 was free.

[nctnico]

Hi all, thanks for your answers.


To summarize, at this point I'd rather stay with good old 7400 TTL logic, than going for pricey, long-term risky chips.

Last time I looked Xilinx XC9500XL series was very cheap and readily available in large quantities from various distributors. For example: Digikey has over 10,000 XC9572XL in various packages/speed grades in stock for immediate delivery. All in all I don't get why the Xilinx XC9500XL dropped from your list.

[Romain]

Last time I looked Xilinx XC9500XL series was very cheap and readily available in large quantities from various distributors. For example: Digikey has over 10,000 XC9572XL in various packages/speed grades in stock for immediate delivery. All in all I don't get why the Xilinx XC9500XL dropped from your list.

The XC9500XL series has completely disappeared from Xilinx website.
It's support has stopped in ISE8-9 according to andersm.
Even though it's price is competitive, it requires an external flash.
But what really IS the problem: the XC9500XL is NOT ROHS: "Contains lead / RoHS non-compliant". This alone is a no-no. I'm working on a commercial product.