Author Topic: SPARC is it dead?  (Read 2396 times)

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Offline mipl

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Re: SPARC is it dead?
« Reply #25 on: September 20, 2018, 06:55:55 am »
The "user space" and "kernel space" wrapped in the TrustZone name is now promote by ARM as feature of the Cortex M-23 / M-33. In that case of the MIPS, PowerPC and others, they had this feature since long time.... how it was implemented is the other story.

Regarding the SPARC and the niche of rad hard CPUs, it was also taken over by ARM... Atmel was manufacturing rad hard SPARCs for ESA (European Space Agency) and after Mirochip took over the company they are moving to ARM here as well.
http://www.microchip.com/design-centers/aerospace-and-defense/radiation-hardened
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Rad Hard Processors - Over the last 16 years, Microchip has steadily built a space microprocessor strategy based on the SPARC® architecture. With worldwide sales of over 4000 flight models featuring the Microchip® SPARC V7 TSC695 and SPARC V8 AT697, Microchip has acquired an unrivalled flight heritage experience in several kind of space applications. Based on this experience, Microchip is now going to introduce ARM Rad Hard solutions to cover the space market evolution in term of performances and more accessible ecosystem.

In general I would say that the PIC32Mx (MIPS) days at Microchip are counted and it will follow the path of the AVR32 as soon as PIC32Cx (ARM) become reality (if ever).
 

Offline westfw

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Re: SPARC is it dead?
« Reply #26 on: September 20, 2018, 08:25:23 am »
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much more clumsy architecture
that doesn't seem to be stopping the ARM CM0, which I'd also rate as "much more clumsy" than CM3.(although the number of vendors offering tiny and cheap CM4 chips is encouraging.)
 

Offline technix

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Re: SPARC is it dead?
« Reply #27 on: September 21, 2018, 02:22:26 am »
In general I would say that the PIC32Mx (MIPS) days at Microchip are counted and it will follow the path of the AVR32 as soon as PIC32Cx (ARM) become reality (if ever).
I don't find it likely that Microchip would have two distinctly-named product lines using the same core. What was PIC32C is mostly now folded into the ATSAM series.
 

Offline andersm

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Re: SPARC is it dead?
« Reply #28 on: September 21, 2018, 04:13:11 am »
Alright. I assumed the M4K was considered a part of the microAptiv line, apparently not. It doesn't change the reasoning though, and I believe the architectures are close enough.
It's a newer release of the architecture (MIPS32r3 vs MIPS32r2) which adds the microMIPS instruction set. So fairly similar, but also significant additions.

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I'm certainly no specialist of the MIPS architectures, but the split between a "kernel space" and "user space" bears some security advantages despite being somewhat more difficult to handle.
Not directly, as you still need some mechanism to actually map the address space into USEG. On PIC32s with fixed mapping translations you have Microchip's bus matrix controller, which isn't the greatest mechanism, and on others you have a TLB. In any case, adding virtual addresses to the mix certainly doesn't make things simpler.

On "grown-up" hardware, the fixed address space split also adds its own complications. Eg. OpenBSD dropped support for 32-bit MIPS not too long ago, because the limited address space didn't allow for effective address layout randomization.

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The Cortex-M3 and M4 have optional MPUs and a lot of MCUs have been released without one AFAIK.
Yes, and the specification of the MPU makes it almost unusuable, since the section size and alignment restrictions are far too coarse for practical use. I think this may have been improved in the ARMv8-M specification, but don't know offhand for sure.

Online james_s

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Re: SPARC is it dead?
« Reply #29 on: October 18, 2018, 03:44:13 am »
I still have several Sparc based workstations and a small Netra server but I don't often fire them up. They were really impressive stuff in their day, but now a Raspberry Pi is considerably more powerful.
 

Online brucehoult

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Re: SPARC is it dead?
« Reply #30 on: October 18, 2018, 01:50:06 pm »
Alright. I assumed the M4K was considered a part of the microAptiv line, apparently not. It doesn't change the reasoning though, and I believe the architectures are close enough.
It's a newer release of the architecture (MIPS32r3 vs MIPS32r2) which adds the microMIPS instruction set. So fairly similar, but also significant additions.

MicroMIPS is a bit ugly. The entirely new NanoMIPS encoding looks pretty nice though.
 


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