Author Topic: Signal Integrity simulation: results and did I set it right ?  (Read 1945 times)

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Offline MiyukiTopic starter

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Signal Integrity simulation: results and did I set it right ?
« on: February 09, 2017, 04:40:20 pm »
Hi
I want to ask, Im just considering one project and I need to transfer data from MAXII to Cyclone FPGA on other board and I want it to transfer on other board
Can I believe to this results ? It look so good I think something must be wrong. Or is it just so simple to transfer 250MHz data from board to board with ribbon cable  :o
Its just a raw setup but can I really transfer this fast signal over 10 in cable so easy ?
 

Offline T3sl4co1l

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Re: Signal Integrity simulation: results and did I set it right ?
« Reply #1 on: February 09, 2017, 08:31:37 pm »
Why wouldn't it?  The impedance isn't far off...

I wonder how accurately the line loss is modeled.  You may have more HF loss than you're expecting.  Though the waveforms look kind of "droopy", so it might not be too far off.

I would be more worried about radiation and interference around the ribbon cable: with an open transmission line like that, often the amount of signal lost in transmission, is lost to radiation rather than plain line loss...

(Importance of interference: 3V step into cable makes, say, -20dB --> 0.3V of interference.  Multiplied by accidental resonances, at a Q of 10 perhaps, that's 3V potentially floating around which will interfere with other signals.  Conversely, 30V (or for radiation, approx. 30V/m) of ambient interference will couple into the cable, corrupting logic levels.)

Best way to use ribbon cable is either as differential pair (which I would recommend), which gives you about 150 ohms differential impedance, and around 100 ohms common mode (if pairs are separated by ground wires: also recommended).  Or for single ended signals, use alternating signal and ground wires (Zo ~ 100 ohms).  Using lots of grounds (even when differential!) helps to reduce radiation / interference / susceptibility.

If you have lots of data, it may be reasonable to pack it into a Serdes (which I don't think the MAX will do natively, so will need an external IC; but the Cyclone may have one internal?), and use just one or two serial data streams instead of a ribbon full of parallel data lines.  Then you can use, well, smaller cables certainly, but maybe something designed for high speed signals too (SATA?).

HTH,

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline MiyukiTopic starter

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Re: Signal Integrity simulation: results and did I set it right ?
« Reply #2 on: February 09, 2017, 09:57:41 pm »
Ribbon cable is planed and simulated at ground-data-ground pattern, if I find cheap shielded ribbon with suitable impedance will use it
Paralle interface is used because of price, MAX II is about 1.5$ piece and ribbon cable with connectors are few cents, any serdes will be many times that price
 

Offline amb

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Re: Signal Integrity simulation: results and did I set it right ?
« Reply #3 on: February 11, 2017, 11:58:52 am »
In a previous life I often used G-S-G ribbon to transfer single ended parallel data and a clock between boards. We found that around 80MT/s was a practical limit. I think this was because of the impedance discontinuities (and associated reflections) from the connectors, which were not impedance controlled. Also, single ended signalling over unshielded ribbon is hopelessly susceptible to interference. I remember that if anyone left a phone on the desk near a system, the reliability of transfers would collapse. So reconsider the SerDes option, or maybe parallel LVDS (which can be driven but not received IIRC by a MAX V).
 


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