STM32: external VCO to drive an ADC conversion

[Dimitree]

Hello everybody
I'm trying to understand if I can use a STM32F405 to do the following:

Code: [Select]

when an exernal interrupt occurs, enter the interrupt handling routine, and here do the following:

start a 12bit analog conversion, when conversion is ready, store the resulting 12bit value in a circular buffer on the RAM
read a particular digital input, and store that bit in a second circular buffer on the RAM

move both circular buffers write pointers

load a 12bit value from the circular buffer (in the position pointed by the read pointer) into the DAC
load a bit from the second circular buffer (in the position pointed by the read pointer) into a digital output pin.

move both circular buffer read pointers.

exit interrupt routine

Some details:

- the external interrupt is driven by a square wave VCO that can swing in frequency by a minimun of 40KHz (or less) to a maximum of 78KHz.
The VCO pulse width is <10%, and I want the interrupt to trigger on the rising edge of the pulse. The pulse voltage is 0V to 5V
So I'd say I have more or less 12.8us, at the worst case, to do those tasks between each interrupt.

- the signal that I'm going to read from the ADC is an AC signal, but is already externally filtered and also already held by an external sample and hold (so it's really a "stable" DC signal)

- the additional bit that I'm reading at every interrupt on the digital input pin is a sort of 13th bit: the AC signal is compared (prior to the converter, but after the external SH) against a threshold voltage, if the input signal voltage is greater, than the input signal is attenuated (prior to the converter) and that condition is the bit that I'm storing.
I need to study better this part, since I need to be sure that the attenuation/condition is ready before the convertion starts, so that the 13th bit and the 12bit values are always related to the same measurement.

- the signal to be converted should have a 0V to 10V range (but I'm still not sure, I have to measure it yet), in that case, I'll need to voltage divide it in the right ADC range (and of course, boost it again after the DAC)

- the circular buffer size I need is about 128KBytes, so I think I'm fine with the interal RAM (192K)


my doubts:

1) is that doable with a STM32F405?
2) is there enough time between each interrupt to do those tasks, without employing the DMA or other advanced features?
3) is there enough time (out of the interrupt routine) to read an external voltage used as control to set the circular buffer size?
4) since the signal I'm providing to the ADC is already filtered and held by a SH, should I configure the ADC in a different manner of the usual?

thank you and sorry for my bad english

[mark03]

What is this, some kind of voltage-variable delay line?  No other processing on the samples between ADC and DAC, just the delay?

Some things to keep in mind:

1) You can count cycles at 200 MHz clock to see how many assembly instructions your ISR can have, but the memory will add wait states.  There is a "tightly coupled memory" (TCM) part of RAM which is zero-wait-state, but I don't think STM32F4 has 128kB of it.

2) The ADC won't be giving you 12 effective bits.  More like ten and a half I think.  You can look this up in the datasheet for the part.  Anyway, your "extra bit" scheme sounds complicated, and I wonder if you wouldn't be better off with an outboard ADC having the correct number of bits in the first place?

3) In the STM32F4 reference manual (that's the big 1000+ page document), read up on the "event subsystem".  That should tell you which event sources can be routed to the ADC start-conversion input, and whether you can route an external pin to this, instead of the more-common timer output.

[Dimitree]

What is this, some kind of voltage-variable delay line?  No other processing on the samples between ADC and DAC, just the delay?

yes exactly, no other processing, just delay

1) You can count cycles at 200 MHz clock to see how many assembly instructions your ISR can have, but the memory will add wait states.  There is a "tightly coupled memory" (TCM) part of RAM which is zero-wait-state, but I don't think STM32F4 has 128kB of it.

so the bottleneck here would be the internal RAM? what about the time between the start of the AD convertion and the end of conversion/data ready?

2) The ADC won't be giving you 12 effective bits.  More like ten and a half I think.  You can look this up in the datasheet for the part.  Anyway, your "extra bit" scheme sounds complicated, and I wonder if you wouldn't be better off with an outboard ADC having the correct number of bits in the first place?

I would use an external ADC, but I would need to source a suitable one that can be triggered by an external signal, and then I will still need to transfer the data to the uC with the right timing. A serial ADC would be a bit more complicate to use (at least for me), a parallel would be easier, right?
Or I could use a SPI ADC, like the MCP3201, but wouldn't that be too slow using SPI?

If the internal ADC would only give me less than 12 effective bits, I have no choice, I need an external ADC
The extra bit scheme sounds complicated but only because my english sucks so I can't explain it very well, but really it's just a digital condition that needs to be stored along with the current sample.

[Kleinstein]

The speed of the internal RAM will not be a problem - the RAM is still way faster than the internal ADC or the data transfer from an external ADC. 12 µs is a lot of time for such an µC. It would start to get tricky if you need more than 20 times the speed. Even an external RAM should work fast enough at that speed.

Finding an external ADC with true 12 Bit performance might require and ADC with higher than 12 Bit resolution. AFAIK the µC internal DAC is also not that great in performance, at least with some of the STM32F...

With just 78 kHz clock data transfer is not that critical. SPI is not a problem, even bit banging could work at that speed.

[Dimitree]

I checked the MCP3201 datasheet and noticed the maximum SPI clock is 1.6MHz, and if I made the calculations right, a single conversion would take about 10uS, so this ADC is out of question.
Am I right?

Finding an external ADC with true 12 Bit performance might require and ADC with higher than 12 Bit resolution

please forgive my ignorance, but why that? the signal I'm going to provide to the ADC is already filtered, already held (so it's a simple DC level) and below the ADC reference voltage. Why a 12 bit ADC would not perform well in quantizing such voltage to 12 bit?

[Dimitree]

in the meanwhile I've been studying the ADC topic a bit..
The original design that I'm trying to re-design uses an 12bit AM2054 SAR + AM6012 DAC to do the conversion.
I still don't have a schematic of the design, but I found this app.note:
http://cds.linear.com/docs/en/application-note/an17f.pdf
and comparing the schematic in Figure 1 with the tracing I did to my unit, I noticed it is almost the same.

I couldn't undestand from the app.note the order of accuracy of this ADC implementation, but this is what I'd like to match with the re-design (no better no worse).
Of course this is a parallel output ADC, and the output is connected to DRAM with lot of logic chips for the addressing/refresh.
I'll be fine replacing them with an external serial ADC+uC or uC with internal ADC, as long as I can match those performances.

I hope that tell us if I need "true 12 bit performance" or not

[tatus1969]

the stm32 can use dma to transfer adc results to a circular buffer. conversion can be triggered externally. don't remember if the adc has an own input for this, but you can always set up a timer to react on an external pulse and to trigger adc from it.

is the reason for high resolution that the signal has a high dynamic range? if yes, you could think of feeding it to two adc inputs in parallel, one direct and another one through a gain stage. for small signals, keep the amplified result. if that saturates from a larger amplitude, take the nin amplified result.

[Jeroen3]

Code: [Select]

when an exernal interrupt occurs, enter the interrupt handling routine, and here do the following:

start a 12bit analog conversion, when conversion is ready, store the resulting 12bit value in a circular buffer on the RAM
read a particular digital input, and store that bit in a second circular buffer on the RAM

move both circular buffers write pointers

load a 12bit value from the circular buffer (in the position pointed by the read pointer) into the DAC
load a bit from the second circular buffer (in the position pointed by the read pointer) into a digital output pin.

move both circular buffer read pointers.

exit interrupt routine

Nearly all of this can be done in hardware of the 405. You just have to puzzle the ADC,DAC,DMA and a TIM connections.

For example:
Your trigger can start a one shot timer.
The ADC can be triggered from the timer or external pin.
The DMA can do your buffering.
Another DMA can do the DAC from the timer.

The same applies to two DMA channels used for the boolean buffer, since you can use bitbanding.