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Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #50 on: August 06, 2017, 02:01:31 PM »
I ran some tests on my 3.2 GHz I7-860 quad core machine and, indeed, Vivado WebPack uses 8 logical processors.  It is consistent with the info in the linked manual, Page 7.

Synthesis doesn't seem to use multiple threads (and it shouldn't) but the other processes use all 8 as they should.

Place and route keep the CPU pretty busy.  Synthesis only uses about 18% but that's probably right because it only uses one thread.

I did notice that when the load gets high (80%+), the CPU throttles back from 3.2 GHz to 2.9 GHz.  Not the kind of thing I would have anticipated.

The new machine will be a 4.5 GHz I7-1770K with 32 GB of 4133 MHz DDR4.  I don't plan to overclock it but it is known to run at 5 GHz.  Cooling being an issue...

The big difference in the new machine is a SSD PCIe x4 with 1TB of room.  I have great hopes for this, especially at boot time.

AFAICT, 8 logical processors is all that Vivado will use.  I was looking at the AMD 16 core 32 thread chip but if Vivado won't use all the threads, why bother?

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_1/ug904-vivado-implementation.pdf

Right.  With Vivado loaded, select the Design Runs tab.  Right click inside this menu and select Launch Runs.   Select the number of jobs. 
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Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #51 on: August 06, 2017, 02:58:21 PM »
Quick and dirty probes for the Arty.     
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Online brucehoult

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Re: Typical speed of FPGAs
« Reply #52 on: August 06, 2017, 03:07:30 PM »
I did notice that when the load gets high (80%+), the CPU throttles back from 3.2 GHz to 2.9 GHz.  Not the kind of thing I would have anticipated.

Why? That's exactly the kind of thing you expect when the TDP is hit.

Quote
The new machine will be a 4.5 GHz I7-1770K with 32 GB of 4133 MHz DDR4.  I don't plan to overclock it but it is known to run at 5 GHz.  Cooling being an issue...

What the heck is a 1770K?
 

Offline ebastler

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Re: Typical speed of FPGAs
« Reply #53 on: August 06, 2017, 04:21:54 PM »
Quote
The new machine will be a 4.5 GHz I7-1770K with 32 GB of 4133 MHz DDR4.  I don't plan to overclock it but it is known to run at 5 GHz.  Cooling being an issue...

What the heck is a 1770K?

Intel i7-7700K, I assume?
 

Online brucehoult

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Re: Typical speed of FPGAs
« Reply #54 on: August 06, 2017, 04:43:17 PM »
Quote
The new machine will be a 4.5 GHz I7-1770K with 32 GB of 4133 MHz DDR4.  I don't plan to overclock it but it is known to run at 5 GHz.  Cooling being an issue...

What the heck is a 1770K?

Intel i7-7700K, I assume?

The current mainstream high end, yes. But 1770K has been repeated several times in different messages.

So far the 6700K is doing all I need and I've only had it 18 months.
 

Offline rstofer

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Re: Typical speed of FPGAs
« Reply #55 on: August 07, 2017, 12:51:02 AM »
Quote
The new machine will be a 4.5 GHz I7-1770K with 32 GB of 4133 MHz DDR4.  I don't plan to overclock it but it is known to run at 5 GHz.  Cooling being an issue...

What the heck is a 1770K?

Intel i7-7700K, I assume?

Yes...  The AMD is the 17xx

All typos are mine!
 

Offline rstofer

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Re: Typical speed of FPGAs
« Reply #56 on: August 07, 2017, 01:01:22 AM »
I did notice that when the load gets high (80%+), the CPU throttles back from 3.2 GHz to 2.9 GHz.  Not the kind of thing I would have anticipated.

Why? That's exactly the kind of thing you expect when the TDP is hit.


I thought about that.  It's hard to tell just how hard the processor is working without actually measuring temperature.  I don't have a convenient way to do that on the old CPU.  The new motherboard should have utilities for that kind of thing since folks have a tendency to seriously overclock the chip.

I suppose if an application is going to drive a CPU to the thermal limit, Vivado or ISE would be the ones to do it.  I don't have any other apps that create a long duration run.  Maybe some of my grandson's games...

I need to look into improving the cooling system.
 

Online brucehoult

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Re: Typical speed of FPGAs
« Reply #57 on: August 07, 2017, 01:24:36 AM »
I did notice that when the load gets high (80%+), the CPU throttles back from 3.2 GHz to 2.9 GHz.  Not the kind of thing I would have anticipated.

Why? That's exactly the kind of thing you expect when the TDP is hit.


I thought about that.  It's hard to tell just how hard the processor is working without actually measuring temperature.  I don't have a convenient way to do that on the old CPU.  The new motherboard should have utilities for that kind of thing since folks have a tendency to seriously overclock the chip.

I suppose if an application is going to drive a CPU to the thermal limit, Vivado or ISE would be the ones to do it.  I don't have any other apps that create a long duration run.  Maybe some of my grandson's games...

I need to look into improving the cooling system.

Try "Handbrake" aka a GUI wrapper around ffmpeg.

I haven't tried the 7700K but on earlier generations the stock cooler from Intel is not good enough to prevent thermal throttling below the advertised SpeedStep levels under heavy load. Get a 3rd party one. You don't need anything exotic: anything from Noctua or CoolerMaster in the US$30 - $100 range is fine.
 

Offline rstofer

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Re: Typical speed of FPGAs
« Reply #58 on: August 07, 2017, 03:39:08 AM »

Try "Handbrake" aka a GUI wrapper around ffmpeg.

I haven't tried the 7700K but on earlier generations the stock cooler from Intel is not good enough to prevent thermal throttling below the advertised SpeedStep levels under heavy load. Get a 3rd party one. You don't need anything exotic: anything from Noctua or CoolerMaster in the US$30 - $100 range is fine.

It's my understanding that Intel doesn't provide a cooler for the 7700K.

http://www.tomshardware.com/answers/id-3364162/bad-stock-cooler-7700k-overclock.html

Coolers turned into an Amazon 'review' nightmare.  It didn't matter which cooler I looked at, somebody was complaining that a) it was damaged in shipment b) no customer support c) didn't cool d) package was opened, obvious returned goods, etc.  Every single one! Now, I do take reviews with a grain of salt and some users should stick to playing with ball bearings but when the % gets above single digits, I start to pay attention.

So I bought the Cooler Master MasterLiquid Pro 240.  I don't know how it will turn out and I decided that I don't care.  If my first attempt doesn't work out, I'll just do it over.

http://www.coolermaster.com/cooling/cpu-liquid-cooler/masterliquid-pro-240/

One of the problems with ordering a bunch of parts is not knowing exactly how much space is available for the CPU cooler.  An example of a surprise: the Corsair Vengeance DDR4 comes with a snap-on fan that mounts over the top of the sticks and necessarily determines the clearance requirements for the bottom of the CPU cooler.  It shouldn't have been a surprise if I had researched a little more but it's a good thing I bought a liquid cooler for a first cut.

I'm expecting surprises when I mount the cooler to the CPU and when I mount the radiator to the case.  I have no idea how that's going to turn out.

Sometimes you just don't know what you don't know!
« Last Edit: August 07, 2017, 06:18:46 AM by rstofer »
 

Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #59 on: August 07, 2017, 05:31:08 AM »
If you are not familiar with the ARTY board, connectors JA&D use 200 ohm series resistors.  The small interface board I made uses 450 ohms to get me the 10X.  This is why I started out with 3.5ish and get 2.5ish.   

JC&D use zero ohm jumpers rather than the 200 ohms.   I changed over to connector JC, then added an MMCM to drive the clock.   Simulation seems to work fine with the MMCM.   Lots of little steps but getting more comfortable with the tool set.   
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Online brucehoult

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Re: Typical speed of FPGAs
« Reply #60 on: August 07, 2017, 08:17:34 AM »
Liquid cooling seems overkill. A decent air cooler is much simpler to fit, more reliable, and will keep the temperature well under 100C under even the heaviest loads.

Trying to keep the temp down to under 90, under 80 etc is just a for of cooler masturbation. You won't keep a computer long enough to hurt the CPU at 100 C.

People of course disagree over relative merits of brands. I've been pleased with Noctua 12, 14, 15 (depending on socket or case size or whatever). Not the cheapest, but not crazy expensive, and they are easy to fit and definitely do the business. So I haven't bothered to try anything else.
 

Offline rstofer

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Re: Typical speed of FPGAs
« Reply #61 on: August 07, 2017, 09:43:12 AM »
One advantage the liquid cooler has is that the appendage over the CPU is much smaller in every dimension.  I don't have the motherboard, I don't have the case, I didn't know about the RAM fan, etc.  I didn't really want to go with liquid cooling (still don't) but, of the choices I could make, with what little I knew at the time, it seemed like the safest thing to buy.

It may very well turn out that one of the air coolers will fit just fine.  But I didn't know that at the time I ordered the parts.  Once I see how everything fits together, I may just order one of the better air coolers.  Coolers are inexpensive so changing to air at a later date is certainly possible.

The choice of liquid cooling was never about temperature (to me).  It was somewhat related to noise but mostly I wanted the best chance of everything fitting in the case the first time I tried.
 

Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #62 on: August 07, 2017, 12:00:22 PM »
Looks like the slew rate and drive strength all work.  Shown with all four set to fast and slow and sweeping the drive strength.  These are all set to LVCMOS33 which would normally default to slow/12.

One thing I have been unable to find is if I drive the constraints from an XDC file, I can't find a way to combine multiple properties on a single line like with a UCF.   I have not found any mention of this in the documents.  They always seem to show one line per property.    It throws an error on every attempt I made.   Not a big deal, just a little strange.  Other than that, the tools still look pretty good. 

The scope I have been using is only 600MHz, not to mention the home cobble probe board.  I was surprised the 600MHz signal even showed up in the one plot. 
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Offline rstofer

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Re: Typical speed of FPGAs
« Reply #63 on: August 07, 2017, 02:58:02 PM »
This is known to work and combines pin number and drive level
Code: [Select]
set_property -dict { PACKAGE_PIN D5    IOSTANDARD LVCMOS33 } [get_ports { eth_ref_clk }]; # Sch=eth_ref_clk

This came from a Digilent Nexys4_DDR Echo Server project:
https://reference.digilentinc.com/learn/programmable-logic/tutorials/nexys-4-ddr-getting-started-with-microblaze-servers/start

I'm pretty sure the -dict { ... } allows a list of options but I sure didn't find a document that confirms it.
 

Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #64 on: August 07, 2017, 08:36:44 PM »
This is known to work and combines pin number and drive level
Code: [Select]
set_property -dict { PACKAGE_PIN D5    IOSTANDARD LVCMOS33 } [get_ports { eth_ref_clk }]; # Sch=eth_ref_clk

This came from a Digilent Nexys4_DDR Echo Server project:
https://reference.digilentinc.com/learn/programmable-logic/tutorials/nexys-4-ddr-getting-started-with-microblaze-servers/start

I'm pretty sure the -dict { ... } allows a list of options but I sure didn't find a document that confirms it.

That's a good find.  I just tried 
Quote
set_property -dict { PACKAGE_PIN U12 SLEW SLOW DRIVE 4 IOSTANDARD LVCMOS33 }
and indeed this works.  In Docnav, searching for -dict yields no results.  But Google did not let me down:
https://www.xilinx.com/support/answers/62465.html

Searching for just "dict" in docnav, the UG903 Vivado Design Suite User Guide Using Constraints

The Tcl dict command can be used to build a dictionary (associative array) of cells and
absolute grid RLOCs for the update_macro command. A Tcl associative array is a series of
key-value pairs. The cells and RLOCs can be arranged as such as series using the dict
command. The array keys are the macro cell objects. The array values are the cell RLOCs.
This helps to automate the process of creating macros with many cells.
How electrically robust is your meter?? http://www.youtube.com/channel/UCsK99WXk9VhcghnAauTBsbg
 

Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #65 on: August 13, 2017, 11:56:43 AM »
Still having fun with the Arty.   This new board for the Arty has a differential driver.   The FPGA core is just a diff buffer and forwards the signal to an output.   Shown with the differential input near 600MHz.   I have not tried to simulate the differential input. 
How electrically robust is your meter?? http://www.youtube.com/channel/UCsK99WXk9VhcghnAauTBsbg
 

Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #66 on: August 14, 2017, 02:03:30 AM »
I had just assumed that Digilent would have provided jumpers to allow you to set the VCCO voltages to allow use of some of the various standards.  Sadly, not the case and all banks are stuck at 3.3V.   The LVDS input is no problem as Xilinx allows it  with a 3.3V as long as you are not using the internal termination (which is how I show it).  But for an LVDS output, they are tri-stated if the voltage exceeds 2.85.   The 3.3 is used for other devices like the Ethernet, so that idea is out.   

The RF signal is divided by two, so I am clocking it at 700MHz.     

Still a fun little board to play with and it may be useful for some quick and dirty experiment.  Time to play with the SDK.   

I would like to get something with an UltraScale device to play with.
How electrically robust is your meter?? http://www.youtube.com/channel/UCsK99WXk9VhcghnAauTBsbg
 

Offline rstofer

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Re: Typical speed of FPGAs
« Reply #67 on: August 15, 2017, 06:18:38 AM »
 

Still a fun little board to play with and it may be useful for some quick and dirty experiment.  Time to play with the SDK.   


The Echo Server demonstrates the entire process from block design through to the SDK where everything is compiled and the executable jammed into the bitfile.  All of the code runs out of DDR memory with nothing more than a bootloader running out of BlockRam.

I have done this project for the Arty and the Nexys4_DDR.  Both worked well when I actually did what the instructions said to do.  Freestyle might not be the best approach!
 

Offline joeqsmith

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Re: Typical speed of FPGAs
« Reply #68 on: August 17, 2017, 10:20:52 AM »
 

Still a fun little board to play with and it may be useful for some quick and dirty experiment.  Time to play with the SDK.   


The Echo Server demonstrates the entire process from block design through to the SDK where everything is compiled and the executable jammed into the bitfile.  All of the code runs out of DDR memory with nothing more than a bootloader running out of BlockRam.

I have done this project for the Arty and the Nexys4_DDR.  Both worked well when I actually did what the instructions said to do.  Freestyle might not be the best approach!

I worked the demos back on the first page when I first started playing with the board.   As you suggest, just follow the simple instructions and no problems.   
How electrically robust is your meter?? http://www.youtube.com/channel/UCsK99WXk9VhcghnAauTBsbg
 


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