Author Topic: What is considered a valid interrupt edge - STM32  (Read 4889 times)

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Offline mblessTopic starter

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What is considered a valid interrupt edge - STM32
« on: March 22, 2017, 04:41:41 pm »
This is a general question for all MCUs, but the answer probably differs based on the specific brand and architecture. I'm using a STM32F4 and I have a noisy interrupt signal, so I'm getting a lot of unintended triggered interrupts. I predicted this might be an issue so I designed the board with pads for a low-pass filter. Right now I'm trying to figure out what RC combination to use to bring the noise spikes down to a level that doesn't trigger the ISR. Of course I don't want too strong of a filter because I lose edge timing accuracy.

So my question is what constitutes a valid edges, rising or falling, to trigger an interrupt? Does it have to change from the valid TTL low/high levels (0.8V and 2V in my case), valid CMOS levels (1V and 2.3V in my case) or is there some other threshold? I can't find anything in the datasheets, so I don't know if I'm not using the correct terminology.
 

Offline ajb

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Re: What is considered a valid interrupt edge - STM32
« Reply #1 on: March 22, 2017, 05:05:16 pm »
Unless otherwise specified, the thresholds will be the same as when the pin is configured as a general purpose digital input.  So the specified VIL and VIH levels should hold.  In the STM32F7 datasheet I have open, these are given in section 5.3.20: I/O static characteristics.  Note that STM32 parts may have different IO structures on different pins (FT, TT, TTa), so be sure you know which structure the pin you're dealing with has (specified in the Pin definitions table) so you consult the right input specs.

For additional noise immunity, an external schmitt trigger may be useful after the LPF.

« Last Edit: March 23, 2017, 11:33:48 am by ajb »
 

Offline newbrain

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Re: What is considered a valid interrupt edge - STM32
« Reply #2 on: March 23, 2017, 08:01:44 am »
In addition to the levels, the minimum pulse width for an interrupt to be recognised has to be considered.

This is described in the EXTI chapter as:
Quote
The EXTI can detect an external line with a pulse width shorter than the Internal APB2 clock period.
and then later on in the AC I/O characteristics:
Quote
tEXTIpw Pulse width of external signals detected by the EXTIcontroller:  min 10ns

(checked for some F4 and F7, same values).

So, in general, anything longer than 10ns will be caught by the edge detector.
« Last Edit: March 23, 2017, 08:17:45 am by newbrain »
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