It seems the answer is finally in - I've just noticed that the LPC43S70, which includes an AES engine for decrypting the boot image, has been announced. Don't know when it will be available or how much extra it will cost though.
Now all they need to do is release it in something other than a BGA package so that you aren't forced to use a costly 6 or 8 layer (or more) PCB.
I think the OP, like me, is drawn to the BGA only LPC4370 specifically by its integrated high speed 80Msps 12 bit ADC.
Yes exactly that. I have to say that I'm disappointed that ST didn't take the opportunity to put better ADCs on the new STM32F7 rather than sticking with the old STM32F4 ADCs. The STM32F303 for example have up to 4 x 5MSPS ADCs with a max INL of +/-2LSBs and min ENOB of 11.2bits (@25C, 3.3V) and can be used single-ended or fully differential.
Compare that to the STM32F7 which has 3 x single-ended 2MSPS ADCs with max INL of +/-3LSBs and ENOB of 10.6bits. Actually they will run at 2.4MSPS but then the max INL increases to +/-6LSBs!
Bizarrely though the STM32F3s have a maximum CPU clock speed of only 72MHz so its very difficult to actually handle up to 20MSPS of 12 bit ADC data, whereas the STM32F7 has bags of processing power but only 6 to 7.2MSPS of ADC data. I guess using the old STM32F4 as a starting point was seen as the quickest way to market for the M7 - hopefully they will give it better ADCs in due course (but I doubt they'll appear any time soon).
I've largely got over my BGA phobia, but could probably use some more practice. I managed to fan out the 100 pin 0.8mm pitch device using standard pool-based PCB specs (5mil track and gap, 2.5mm drill). It can even be done 2 layer, but I wouldn't recommend it, your ADC performance will likely be rubbish due to lack of ground plane.
Ah so perhaps you don't need 6+ layers. Perhaps BGA isn't quite so bad after all.