Why our MCU's have low frequency!

[BrianHG]

Thanks guys for the hints and your feedback

But I have some other issues with Regarding the SPEED! Compare the Intel parts with simple 74xx or CD4000 series logic's, They had F,S and ALS ect... series (which was intended for high speed), and I'm sure none of these old babies goes more than 300MHz for example CD4017  could do it under 20MHz, even the recent ultra high speed single gate devices like (SN74AUC06RGYR) barley achieve 1GHz operation, So are the Intel MOSFET's are MOSFET'!?  what's your opinion? Intel parts was over 1GHz before 2000

Oh really, funny, this AND/NAND/OR/NOR logic gate seems to be plenty fast: HMC843LC4B
http://www.analog.com/media/en/technical-documentation/data-sheets/hmc843.pdf
http://www.analog.com/media/en/technical-documentation/data-sheets/hmc844.pdf   (Xor/Xnor gate)
http://www.analog.com/media/en/technical-documentation/data-sheets/hmc841.pdf  (D flip-flop)
Note that Analog devices has a whole HMC84xxxxx line of logic ICs.

http://www.potatosemi.com/

Just watch out. Don't put more than 2pF load on it, otherwise it won't work, like a few cm (at most) of PCB traces.

Those are already super slow slugs/snails, why even mention them.  They cant even drive a respectable 1Ghz to multiple output gates.

[David Hess]

I don't think P5 devices ever reached 266MHz. It was the much more complex, longer pipeline, OOO P6 based devices which reached that speed.

P55C topped out at 233MHz, the mobile Tillamook part reached 300MHz. Both were several process generations ahead of the original P5 though. (Knights Corner, which was based on P54C, reached a bit over 1.2GHz.)

I had to refresh my memory.  Intel's Socket 7 parts only made it to 233MHz but AMD's updated Super Socket 7 increased the bus speed to 100 MHz and CPU speed to 450MHz or 550MHz.  I really liked the AMDK6-III.

[David Hess]

But I have some other issues with Regarding the SPEED! Compare the Intel parts with simple 74xx or CD4000 series logic's, They had F,S and ALS ect... series (which was intended for high speed), and I'm sure none of these old babies goes more than 300MHz for example CD4017  could do it under 20MHz, even the recent ultra high speed single gate devices like (SN74AUC06RGYR) barley achieve 1GHz operation, So are the Intel MOSFET's are MOSFET'!?  what's your opinion? Intel parts was over 1GHz before 2000

It still goes back to the memory or cache access time and load-to-use latency.  The longer the access time and the shorter the load-to-use latency the more work is done per instruction stage and fewer instruction stages are used producing a lower clock rate.

Discrete logic was not dense enough to support the complexity required for a longer load-to-use latency and memory at the time had a long access time so clock speeds were slow.  Things did not take off until increasing integration allowed the entire processor and cache memory to be located on the same integrated circuit.  Try disabling the cache on a modern processor to see how fast it runs without it.

If you wanted to push the clock rate during the era of TTL, then you used ECL (emitter coupled logic) and ECL memory like Cray and others did but increasing integration from Moore's Law in CMOS won the performance race.

It might be a fun project to implement a simple (!) out-of-order processor for high load-to-use latency in an FPGA to see what clock rate is achievable.

[BrianHG]

Or, if you are a millionaire, build a processor and ram out of the logic gates from Analog devices which I listed above and achieve faster than Intel CPU clock speeds.  Though, 630mw per D-Flipflop would make a processor approaching the smallest PIC MCU consume a few kilowatts of power, maybe a megawatt...  But, holly shit, it would be the damn fastest PIC anyone could ever dream of...

You would need to buy the dies & direct bond for minimum latency and mount the thing on a room sized heatsink in a pool of liquid nitrogen.

[hans]

And find a solution around the 270 clock phase margin @ 40GHz ;-)

How many flip-flops would a 8-bit PIC contain? This page suggests ~600, i.e. that would be 380W in flip-flops alone.

The reason I mentioned the PotatoSemi parts is not only because of the name, but also to highlight how ridiculous idea it is.

Sure those Hittite parts probably serve a purpose in some industry, but are also 600$+ each 

[NorthGuy]

Or, if you are a millionaire, build a processor and ram out of the logic gates from Analog devices which I listed above and achieve faster than Intel CPU clock speeds.

Setting aside the (unsolvable) problem of putting the ICs in the space without producing extra delays, the signal will need to pass through a lot of gates between two consecutive clock edges. For example, think how many consecutive gates you'd need to create a simple 64-bit adder. Divide 40GHz by that number. That's the maximum clock speed you can achieve. I don't think you can get to Intel's 5GHz, even if you use reasonable pipelining.

[ali_asadzadeh]

Thanks guys, So maybe we could reach this idea that Intel is the best MOSFET creator in world! because see how many of them is in their i9 extreme editions or xeon CPU's, and see their power and price and divide the CPU price with the number of transistors, and you see the numbers, so if making this very good MOSFET with this very affordable price, Intel or other companies does not make use of them in other chips as well!?

[theoldwizard1]

MCUs run from flash, and their performance is limited by the flash speed. Creating specs from the MCU is a balancing act. If you want to go faster, the memory will be a limiting factor, so you need caches and faster buses, which makes the price go up.

Although I have been retired for over 10 years from the world of automotive electronics, the above statement is spot on !  High end single chip embedded controllers have been fighting this issue for many, MANY years.  Years ago. I was told by silicon designers that it is very difficult to design a single chip with a CPU (random logic) and Flash and RAM (both "regular"/repeated logic) because in the "real" world these are manufactured on totally different processors.

The Infineon TriCore family of MCUs is very popular in the automotive world.  Even though their latest chips have 4MB of Flash and and 256KB of RAM, it is just not enough.  External memory devices are relatively "slow" and cause processor stalls.

If you look at a die photo of one of these chips, the CPU including Floating Point Processor take about 10% of the die !

[theoldwizard1]

What exactly are you doing that requires a fast MCU? Usually you care about response time, in which parallelism is usually more helpful, you could take a look at xcore, 16 cores will let you do quite a lot with insanely snappy response times if you distribute your tasks correctly.

Not when they are competing for the same on-chip resource, like Flash or RAM.

[theoldwizard1]

I finally stumbled across the specific document I was looking for ! This relates to the Infineon Tricore V1.6 architecture which is less than 10 years old. It is a heavily pipeline processor. This is a true Harvard Architecture processor. PMI = Program Memory Interface (instructions). DMI = Data Memory Interface. In both cases there is cache and "scratch pad" (PSPR and DSPR) memory include in the memory interface. Anything in either memory interface can be accessed in 1 clock.



The SRI Cross Bar Interface means that both the instruction cache can fill and the data cache can fill at the same time providing they are not accessing the same memory resource (PM0, PM1 or LMU) at the same time.

Now from  Infineon Tricore V1.6 Application Note AP32168, page 10 here is the real interesting part

[theoldwizard1]

Duplicate

[rstofer]

The Analog Devices Blackfin MCU has been around for a long time and it runs at 600 MHz.  It doesn't have an MMU so it runs uClinux.  Very fast with a lot of DSP capability and a large assortment of peripherals.

[ogden]

I finally stumbled across the specific document I was looking for ! This relates to the Infineon Tricore V1.6 architecture which is less than 10 years old. It is a heavily pipeline processor. This is a true Harvard Architecture processor. PMI = Program Memory Interface (instructions). DMI = Data Memory Interface. In both cases there is cache and "scratch pad" (PSPR and DSPR) memory include in the memory interface. Anything in either memory interface can be accessed in 1 clock.

Data and instruction bus, that's it? I would say - outdated tech
Kind of basic ARM microcontroller, stm32f3xx can do five access operations in 1 clock, have two SRAM memories and one FLASH.

p.s. eevblog is broken - do not let me attach small 50kb .png file. You shall find picture yourself, in page 6:

ST appnote AN4296