Will ST add HS-USB to STM32 at some point ?

[Koen]

Hello,

      I was wondering if anyone of you knew of a roadmap for ST to add HighSpeed-USB to their MCU ? Not the external PHY ULPI solution, a native HS-USB implementation.

      If I recall correctly, some NXP LPC parts had it for years.

Thank you,
Koen

[MosherIV]

Hi

I might be incorrect, it is early (for me) in the morning and I am going by memory.

I think Stm32 already support 'hs' - this was stupid marketing which was suppose to sell to consumers.
If I remeber rightly HS actually refers to USB 1.

The stm32 support usb1 & 2 so should already support hs.

[hans]

No, since USB1.0 we have 1.5Mbit/s LS devices and 12Mbit/s FS devices.
USB2.0 is an updated protocol, and you will see most devices boasting USB2.0 protocol compatability. Additionally, USB2.0 has a negotiation feature that can bump the speed up to 480Mbit/s (USB HS).

For example the STM32F407 chip has 2 USB peripherals; an embedded USB FS OTG peripheral with integrated phy. But if you want to use USB HS you must add an external USB ULPI phy, which means routing a 60MHz 8-bit + control parallel bus on your board.

Indeed, the STM32F4 could very much use this. E.g. PIC32MZ also has an integrated USB2.0 HS Phy in them, although I haven't used it so can't tell much about bugs or ease of use.

[Jeroen3]

A USB phy takes an enourmous amount of space due to the fast output drivers for several meters of wire.
I can't find any die photo's right now. But I've seen a die, and the usb takes up almost half of the die.

edit: found one http://www.m31tech.com/eng/products/USB2.0.html

[Brutte]

You would like to put a 480MHz IC on a ~120MHz die. That does not look like economically viable solution. Doable but expensive. Besides ULPI PHY is 1$ in volume so I do not see the point of integrating that.

Also mind HS is 40MB/s which means that if you would like to process that with 120MHz uC, you have to do it in 3 clocks per byte, average!! Thus Cortex M3 is not capable of any reasonalble processing of that stream.
You can do more with Cortex M4 as it has DSP engine as it performs some 8-bit operands 4x faster but that would be the bordering edge, asm loops etc.

[Koen]

Thank you guys. It seems Atmel SAM, NXP LPC, Microchip PIC32, FreeScale Kinetis and probably others in the same league as STM32F7 have variants with on-board HS PHY. I'm very space constrained and would have to move to LQFP-144, add a QFN32 PHY, a 1.8V LDO and the ULPI pins on the STM32 have been, mmmh, randomly placed which doesn't help. I'll probably forget it.

Anyway, if you know a similar chip to STM32F7 with > 256K RAM, HS-USB, parallel memory controller and a low power timer, please fill me in.

[Brutte]

STM32F7 application and QFN32 space constrained??
How much of real estate does your TFT + SDRAM interface occupy then?

[Koen]

There's other chips on board but they use UART and SPI which all MCU provide.


PIC32MZ1024ECG100 looked promising but there's no interface to SD cards aside SPI ?

[Kilrah]

Again what's your reason for wanting USB-HS? As already mentioned you might be looking for something that's actually useless. For example your reason is fast access files on an SD card it would be totally useless to have USB-HS since on an STM32 the bottleneck already isn't USB even in FS mode.
Unless you do things with practically no overhead (think Saleae Logic analyzer, read an 8-bit port and send that through USB without any processing) you're very unlikely to saturate an FS link.

[Koen]

Well that's a good point actually. I spent the night going from datasheet to datasheet without wondering about this point.

So, I've got a nice hobby prototype. The only thing I'm sad about is that the transfer of files from it to the computer through USB-MSC is painfully slow (850KB/s).

And now I can't even find benchmarks of MSC using the onboard FS and external HS so I'll head to sleep.

[Bassman59]

Again what's your reason for wanting USB-HS? As already mentioned you might be looking for something that's actually useless.

Full-duplex stereo digital audio at sampling frequencies greater than 48 kHz requires High Speed USB.

[timb]

Again what's your reason for wanting USB-HS? As already mentioned you might be looking for something that's actually useless.

Full-duplex stereo digital audio at sampling frequencies greater than 48 kHz requires High Speed USB.

No it doesn't.... Maybe if you're talking about a 8x2 channels of 48khz 192kbit DTS or something... But just standard 2 channel stereo doesn't.




Sent from my Smartphone

[bktemp]

Again what's your reason for wanting USB-HS? As already mentioned you might be looking for something that's actually useless. For example your reason is fast access files on an SD card it would be totally useless to have USB-HS since on an STM32 the bottleneck already isn't USB even in FS mode.

Using an STM32F469 with an external ULPI USB-HS phy I can read files form an USB drive at 13Mbytes/s and write at 8Mbytes/s. There are many applications where the high data rate is useful.
Using USB-FS you can hardly reach more than 1Mbyte/s. It makes a big difference if the user has to wait 1s or 10s for something to write or read.

[Bassman59]

Again what's your reason for wanting USB-HS? As already mentioned you might be looking for something that's actually useless.

Full-duplex stereo digital audio at sampling frequencies greater than 48 kHz requires High Speed USB.

No it doesn't.... Maybe if you're talking about a 8x2 channels of 48khz 192kbit DTS or something... But just standard 2 channel stereo doesn't.

Full duplex, which is simultaneous record and play, stereo 96kHz 24-bit audio (in other words four channels), requires about 9.2 Mbps bandwidth, which is less than the 12 Mbps wire speed, but when you consider that the OS generally reserves about 10% of the bandwidth for the control pipe, and otherother overhead, in practice it doesn't work. Hence, the need for High Speed USB.

[dgtl]

I've pushed the STM32F205 USB to 30MB/s. Totally doable, the uc is running at 120MHz, data is lifted by DMAs and everything goes 4-bits at a time (32-bit busses). Also I've reached 21MB/s download speed from 8-bit eMMC flash via USB to host. The limiting factor was the small block read speed of eMMC or the lack of buffer ram (I used only internal SRAM); eMMC (like SD cards) does not perform well doing small block reads; going larger was not possible due to lack of memory. Self-written bare-metal code, triple buffering, one DMA is pumping data from eMMC to SRAM, another DMA is pumping data to USB. The cpu does not touch the data, just handles buffer pointers.
Around 30-40MB/s is the limit of HS usb. 480Mbit/s is the signalling speed, the protocol has its overhead. In addition, most host controllers have limits of how many transfers they can schedule in one microframe, this limit also limits the total throughput.

So HS usb is very appropriate for 32-bit controllers, even cortex-M3.

[langwadt]

I've pushed the STM32F205 USB to 30MB/s. Totally doable, the uc is running at 120MHz, data is lifted by DMAs and everything goes 4-bits at a time (32-bit busses). Also I've reached 21MB/s download speed from 8-bit eMMC flash via USB to host. The limiting factor was the small block read speed of eMMC or the lack of buffer ram (I used only internal SRAM); eMMC (like SD cards) does not perform well doing small block reads; going larger was not possible due to lack of memory. Self-written bare-metal code, triple buffering, one DMA is pumping data from eMMC to SRAM, another DMA is pumping data to USB. The cpu does not touch the data, just handles buffer pointers.
Around 30-40MB/s is the limit of HS usb. 480Mbit/s is the signalling speed, the protocol has its overhead. In addition, most host controllers have limits of how many transfers they can schedule in one microframe, this limit also limits the total throughput.

So HS usb is very appropriate for 32-bit controllers, even cortex-M3.

afaik alot of the usb flash, usb parallel bus interface, etc. ICs are basically fancy DMA and an 8051

[Rasz]

afaik alot of the usb flash, usb parallel bus interface, etc. ICs are basically fancy DMA and an 8051

as are usb 3.0 ones, for example GL3220 based flash card readers (Transcend TS-RDF5K, Lexar® Professional USB 3.0 Dual-Slot UDMA7 Reader)
GL3220 is 8051 + dma datapump reaching >120MB/s with no problem in CF mode (16 bit parallel bus), firmware is small and easy to understand, would be perfect for adopting into hobby projects as a cheap USB 3.0 interface if not for lousy availability of those chips (only shady alibaba listings)

[Brutte]

The cpu does not touch the data, just handles buffer pointers (..).
So HS usb is very appropriate for 32-bit controllers, even cortex-M3.

Do you read what you write?

3 CPU clocks for each processed byte.
How many algorithms are there that can be accomplished in 3 clocks on CM3?
 

[Jeroen3]

The core can do 4 bytes per read/write on aligned data. And it has LDM and STM instructions to have 1 instruction for 7 word read/writes. If I'm reading the manual correctly. (I always let the compiler sort this stuff out for me)
But it still does not compete with a single bit write "start dma" though.

[Koen]

STM32F7x3 will have an on-chip high-speed USB PHY.

[bobaruni]

Unfortunately the new STM32H7 doesn't have a HS phy included, still need to use en external ULPI phy.
I wonder why they would do this on possibly the fastest cortex M ever made.

[westfw]

Also mind HS is 40MB/s which means that if you would like to process that with 120MHz uC, you have to do it in 3 clocks per byte, average!! Thus Cortex M3 is not capable of any reasonalble processing of that stream.

Sure, but there are plenty of "average data rates" in between ~1MB/s ("full speed") and the ~40MB of "HS" that are sensible on a typical CM3...

[dgtl]

And in addition to that, some use cases do not require processing. For example, the data is processed and stored to flash; fast USB is needed to download the flash contents at one go. Although the USB HS is 480Mbit/s, the real maximum throughput is around 35MB/s and this varies with different host adapters (depends on how many transfers per microframe can be scheduled). The clocks-per-byte metrics is not the best because the cortex-m has internally 32-bit AHB bus; so 120/35*4~=13.7 clocks per bus cycle. This is totally doable with DMAs.
Personally, I've pushed 25MB/s from eMMC flash to HS usb via STM32F205 in a data logger application (read back 8GB data). Using a low/full speed USB would have been terribly slow. Internal PHY would have been useful. Without reading from flash, 30MB/s was no issue; flash read speed was the bottleneck.
ST told that H7 uses smaller process; perhaps the PHY was not available in that process or they decided not to incldue it. Or they included it and it did not work, so they are not including it in specs.

[Brutte]

Also mind HS is 40MB/s which means that if you would like to process that with 120MHz uC, you have to do it in 3 clocks per byte, average!! Thus Cortex M3 is not capable of any reasonalble processing of that stream.

Sure, but there are plenty of "average data rates" in between ~1MB/s ("full speed") and the ~40MB of "HS" that are sensible on a typical CM3...

I guess these intermediate {1MB/s : 40 MB/s} speeds explain why some ~100MHz uCs support HS. I am sure there are even s'lower performance uCs that do HS.

Perhaps not pointless on 120MHz CM3 but IMHO that HS is a niche application only for a 3 to 119 clocks algorithm per byte (average, including USB servicing, IRQs etc).

Going same route, with an assembler and just DMA streaming (no processing) the data, one could hit 41MB/s limit. 120MHz CM3 with SS 

[kfishy]

Cypress did integrated USB-HS Phy on 48MHz 8051's so certainly a 120MHz or higher Cortex-M should be able to handle it no problem.