Will this kind of sound hardware work on a 80C88 system?

[technix]

The sound hardware includes:

* One 8-bit parallel DAC with latched input,
* One 16-bit reloadable counter,
* Two 16-bit latches,
* One channel on the PIT.
* One channel on the DMA,
* Glue logic

This sound hardware have twomodes of operation: PIO and DMA.

In the PIO mode, the DAC is addressed directly by the processor through its I/O port. The counter and latches are unused, and the PIT channel is disabled.

In the DMA mode, the two latches are used to store the beginning and ending pointers of the audio buffer in the memory, and the PIT channel is used to set the sampling rate. When the PIT fires the sound hardware generates a DMA request, pulling one sample off the main memory, and shoves it to the DAC. The counter is loaded with the beginning address (in latch A) when either its value is equal to the ending address (in latch B), or when latch A is being written to, or when the counter itself is being written to.

[Cervisia]

This looks quote similar to the digital part of the AD1848.

DMA requests are typically triggered by some internal clock, not by the PIT.

Why are you mentioning the address latches? Isn't that handled by the DMA controller?

[technix]

I was planning for some way too simple DMA controllers. I have checked the 82C37 datasheet and obviously it have built-in address counters and latches. The use of PIT as the sample clock for the sake of reduced circuit. And this also allows me to build two operation modes out of no additional hardware: no PIT = PIO mode, PIT on = DMA mode.