WTF!? Atmega328P vs 2N7002F - fails to turn off!

[KL27x]

Ok, I have now completed my own missing jigsaw pieces.

Working on my earlier idea that the discrete distance of the barrier at the diode junction represents this minimum voltage of effectiveness:

Imagine a piece of thick cardboard is the barrier. And use two magnets on either side to represent the charge. There's a minimum strength of magnet where the attraction will be strong enough to effectively reach across this cardboard and be significant.

Now replace the cardboard with a sheet of paper. The minimum strength of the magnets will be less.

Silicon = carboard diode junction

Paper = germanium diode junction

And similar effect is happening in the gate of a FET; hence this lower voltage limit is set by material of diode junction. 0.7V not coincidence.

  Duh, basically gate is a diode. A diode junction has a discrete width. And minimum switching charge is due to attraction being dependent on inverse of distance squared. In order to have FET that switches at lower voltage would require a new material which makes a smaller gap. That's perhaps not completely correct, but it works good enough to me and it's not so complicated.

[dannyf]

In the case of a mosfet, it is more like a capacitor: the voltage applied on the gate opens / closes the channel of conduction between the drain and source.

In the case of a jfet, it can also be thought of as a capacitor - so long as the pn junction is reverse biased. That's why you should never forward bias the gate of a jfet.

[dadler]

I think the possibility of new physics here is the most exciting part. Move over LHC...

...or...

[KL27x]

In the case of a mosfet, it is more like a capacitor: the voltage applied on the gate opens / closes the channel of conduction between the drain and source.

Yes. I'm looking specifically at the dielectric barrier between this capacitor and what I forget the name for, let's call the channel. This meeting point is one of the diode boundaries I'm discussing.* And I'm trying to understand why the minimum voltage of this junction is 0.7V (or maybe it's not!), by necessity, before significant conduction can be achieved.

So the thickness of this barrier determines how far apart are the, say the positively charged plate of that gate capacitor and the semiconductor channel. And this is (I think) at least a very significant reason for the minimum voltage. (Although full saturation can be adjusted to however high you want via size/shape/distance/doping). This is (I think) possibly related to the VFD of an LED*. This is (I think) the reason for the minimum threshold for a FET. If you could metaphysically superimpose the two plates, you could reduce distance to nothing, and force of attraction between positive and negative charges would be infinite. But there is a discrete distance of the barrier, itself, and of the materials carrying those charges.

Stepping back one step.... the attraction is necessary to hold the electrons in the channel... so farther apart your positive gate cap plate from the channel the higher the charge before you can start packing the channel with conductors. And this attraction being dependent on inverse of distance squared, the closer you can put these charges and still keep them separate, the lower the threshold voltage where channel saturation may begin. Furthermore, the construction of these semiconductors and thickness of the dielectrics that can be "grown" on these dies are dependent on many things including the materials used. Which is why I brought up germanium and silicon diode junctions in my earlier post analogy. So apologies if I skipped a few steps.

Looking at the explanations for how a FET works, at least the basic searches I did, does not include this information how if/why there might be a minimum threshold. Yet article such as I linked suggests 0.7V min. Experience with FETs says it's same.

I suspect if I were to research how a diode works, and why it has a certain VFD, perhaps there are more clues.

*I know the diode boundary in a regular diode is different than a gate. Maybe I should leave that out. And perhaps I'm misusing the terminology of what a diode junction technically means (my understanding of the Art of Electronics is certainly not complete). I mean the boundary between two semiconductors, in this case between the gate capacitor and the semiconducting channel. I keep connecting the two because of the 0.7V thing, but perhaps a diode has 0.7V drop for a completely different reason and it's coincidence that this number is the same.

Maybe I'm just stating common knowledge. Or academic minutia which no one should bother to remember, or maybe even to learn in the first place.

Or maybe I'm inventing new physics, as another member so kindly suggests. If someone can help me to understand why (or even if ) FET needs about 0.7V min to switch? And if this is the case, is it a coincidence that this is the VFD of a silicon diode? I already asked with no one responding. So I have tried to figure this out myself.

Maybe this is a question for Jim Williams.

[dannyf]

"why (or even if ) FET needs about 0.7V min to switch in"

It doesn't: FETs can turn on over a wide range of voltage, from negative to positive. So you are really seeking an answer to a question that's invalid.

[dadler]

Or maybe I'm inventing new physics, as another member so kindly suggests. If someone can help me to understand why (or even if ) FET needs about 0.7V min to switch? And if this is the case, is it a coincidence that this is the VFD of a silicon diode? I already asked with no one responding. So I have tried to figure this out myself.

Maybe this is a question for Jim Williams.

I was referring to the OP, not you 

[KL27x]

^Oh, thanks for clarifying. For the record, I am not prone to taking anything personally. I have been schooled by so many people on various forums, I can't remember half of them. I hope someone can do so, here, but at least end up explaining how this really goes.

It doesn't: FETs can turn on over a wide range of voltage, from negative to positive. So you are really seeking an answer to a question that's invalid.

Ok, this is the part I'm still not comfortable with the answer, due to my own observation of FET behavior and then reading this

http://electronicdesign.com/analog/zero-threshold-fet-devices-run-unbiased-consume-microwatts

... see the second sentence, in particular. And then also why the reason for having to combine two different FETS after carefully measuring their gate capacitance and going to a whole lot of trouble to get "a single" FET that switches at millivolt gate potential.

For some reason, I felt this was the case (see my previous post here, which I made before even finding this article):

but inherently it seems to be improbable that anything interesting can happen very much below the VFD [0.6-7V for silicon] of a diode junction?

I felt so strongly on this, I made a case as if this was fact. I later came up with other independent evidence that supported my case (and OP confirmed by backing out of a gentlemen's bet, lol), but I still do not know this initial assumption for fact, at all. Dannyf doesn't feel this is correct. I have a sort of hypothesis, but it is relying on too much air and wishful thinking.

I have just realized I haven't read the Art of Electronics in many years and it's not even on my shelf. I'm going to dig it out of the garage before I speculate too far on false assumptions.

*I'm flying well outside my comfort zone, here, and I'm fully prepared for egg-to-face.

[KL27x]

Still have some reading to do.

But it is easy enough to verify DannyF is correct, and FETs come in threshold rated at various levels, with the lowest NFET listed by Mouser as 0.3V.* But it turns out Mouser is listing the the extreme spreads of the parts, and the maximum value of these same part looks to be anywhere from 0.8-1V, with max value of threshold of 1V being somewhat the most common. Lowest typical/average value I have seen actually listed so far is 0.55V. All these FETs have max Vgs of +-8V, which suggests they have ability to make dielectric in the pn junction thinner than in higher voltage FETs, facilitating this lower Vgs th. The high degree of manufacturing variance is perhaps reflecting fact that FETs have relatively large and/or complex PN junctions, compared to say a simple diode.

So while there's still no (single) NFET I can find that would conduct at all, at anything below 300mV, they go pretty low. As per my hunch, no lower than about 0.3V. And this does not seem to correlate in any precise way to the voltage drop of a silicon diode as oft cited, anyway, at .6-.7V. OTOH, Vfd of actual silicon diodes vary a lot, too, often listed as below 0.3V to over 1.2V, and also depending on current of course. A diode is just a single, simple PN junction, and the lowest max voltage and tiny current-rated Shottky with the minimum voltage drop available might be an example of a minimum possible voltage saturating PN junction currently possible to economically manufacture, today?

Anyhow, it appears (to me) that most semiconductors can't operate at any much under 0.3V. Other than some oddballs like the combo matched pair FET. Until some new materials process is created or some other discovery is made.

And indeed an NFET that has Vgs th of under 50mV would appear to be a unicorn (even simply judging from what's currently available, since I still have no proof that I understand the first thing I'm talking about.)

Regarding "crap" parts or manufacturer, I might wonder if a good European manufacturer could even do on purpose what it is I think the other guy can apparently achieve on accident. By cutting corners.

*One FET is listed at Vgs th of 0.2V. It's the hybrid FET from the article.:

http://www.mouser.com/ds/2/8/ALD212900-225961.pdf

[dannyf]

while there's still no (single) NFET I can find that would conduct at all, at anything below 300mV

Pretty much all jfet works under negative Vgs.

Depletion mosfets are rare but not non-existent: type "depletion mosfet" on digikey and you will find quite a few of them.

[c4757p]

Some people seem to be under the impression that a depletion-mode FET is a fundamentally different thing, and that when considering the function of enhancement-mode FETs they should be ignoring the former. This is not the case - the two are identical, except that the Id(Vgs) curve is shifted to the left or right by the doping configuration. "Enhancement" and "depletion" are somewhat artificial distinctions meaning "threshold is positive" or "threshold is negative" (keep in mind the exact point called the 'threshold' is somewhat arbitrary); FETs can be had that are in between the two as well, where Vgs=0 causes small but non-negligible current, not quite "fully on" but not quite "fully off" either. (Ask Advanced Linear Devices for those.)

[KL27x]

^Yes, this is my thought, exactly. So what if the depletion mode switches negative. It does so at minimum potential of 0.3mV, just like enhancement mode FET. Add a negative sign if you like.

I mentioned the case of these ALD combo enhancement-depletion, matched pair, zero-switching FETs and even linked the datasheet. This seems to have been invented in 1997.

As for JFET, I will save this for a future study, if Danny persists to object. I have no practical experience with. But quick google says JFET VGS(off) varies from -0.3V to -10V. There's that magic number, again. JFET is made from a PN diode junction like any other semiconductor. The only difference is shape and wiring of this junction. Of course, the maximum value of saturation can be as high as you want to make it. What I'm saying is there's a practical minimum. This partly being due to the fact that force of attraction between charges is proportional to V/d^2. Below this voltage, you will not find a silicon PN junction to develop any detectable/functional depletion zone.

edit: The way I imagine it, take your PN sandwich. You can add electrons to one half and/or remove them from the other half, creating a voltage/potential. Until this voltage reaches critical mass, those extra charged particles you added/removed are just going to be dispersed throughout their half of the sandwich, randomly. Nothing has happened, yet. You just primed the pump.

When "critical mass" is achieved is when the potential is large enough for these charged particles to effect each other. They will start to pile up against this PN boundary across from each other, creating a depletion zone (if I'm using the terminology correctly). This is where things start to get interesting. And I contend that "critical mass" can be made as high as you like, but can only be practically reduced to ~0.3V.

[c4757p]

I think well before 1997, but I'm not sure. I distinctly remember working on a device designed in the early 80s that had a signal FET listed as "enhancement-depletion" mode, but I wasn't able to find any real data on it, it was an obscure little bugger. Made sense in the circuit it was in that it had a roughly 0V threshold, though.

[KL27x]

If you say this, I believe you over my other "source." I'm just going by a journal article. And just because ALD started MARKETING it in 1997, and this journal is CLAIMING it is new, it doesn't mean it wasn't around for decades. Possibly ALD invented a way to improve it and/or to make it cheaper, is all. My mistake.

http://electronicdesign.com/analog/zero-threshold-fet-devices-run-unbiased-consume-microwatts

[c4757p]

Nah - ALD did invent something new. Specifically the "EPAD" (Electrically Programmable Analog Device) technology, described here - they have a neat way to trim the characteristics electronically to ensure good yield, which is pretty cool. I suspect this device from the 80s, which was in a very expensive voltage standard anyway, was the sort of thing that's "made" by binning a large number of devices until you find the 0.1% that behave the way you want