Hello all,
I've been rattling around with idea I have and I think it might be good. It also might be terrible. I have no idea.
Basically, it is an ADC that should ideally work as fast as a flash ADC, but use only 3 comparators per stage vice the 2^n of a flash ADC. The savings are clear (if it works). At just 3 bits of resolution, you are saving 2 comparators. At full 8-bit resolution, you are saving 232 comparators.
Obviously, it is too good to be true.
The system takes an input signal, compares it to a reference voltage and outputs a binary signal. The clever bit is that it then switches a mosfet to reduce the input signal by the reference voltage and then uses that as an input to the next stage. The input signal continues to get chopped in this way until it reaches the last stage.
I built this circuit in LTSpice and it seems to work at least up to 1kHz. I think I can get it to work up to higher frequencies and in real life. Before I waste more time however, I would like a second opinion. The LTSpice circuit is attached as well as a picture.
I request the following free services:
1) Has this already been done? If true=>project end
2) Is there a basic reason this circuit won't work in real life? If true=>project end
3) Is there an obviously better way to do this?
-Comeau