Author Topic: Advice on FFT ADC protection  (Read 3532 times)

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Offline Aodhan145Topic starter

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Advice on FFT ADC protection
« on: October 07, 2015, 10:36:07 pm »
Hi,
 I am currently designing a spectrum analyzer music visualizer. I was going to use FFT to get the frequency bands from the audio signal. The audio signal goes to an ADC which then the value goes to a micro controller. I don't want any voltage outside of the range of 0 - 5V for input into the ADC. I worked out my computer at max volume produces a 5v pk-pk signal with no dc bias. I designed a circuit in spice to remove the bias and divide the signal by ~0.83... Could someone take a look over the circuit for me and see If I have fallen into any traps. I've designed it in LTSpice and have provided the file.
Thanks in advance.
 

Offline tggzzz

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Re: Advice on FFT ADC protection
« Reply #1 on: October 07, 2015, 10:54:50 pm »
Why don't you tell us what each part of the circuit is intended to do? For example, what is the purpose of U1? (Etc!)
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline Aodhan145Topic starter

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Re: Advice on FFT ADC protection
« Reply #2 on: October 07, 2015, 11:30:47 pm »
Why don't you tell us what each part of the circuit is intended to do? For example, what is the purpose of U1? (Etc!)
Its fairly simple. The first op amp U5 is a summing amp. It takes the audio signal and adds 2.5V to give the signal a DC bias but it also inverts the voltage. The second opamp U1 buffers the first stage from the third stage. The third opamp U2 multiplies by ~-0.83 this is just to make sure the signal doesnt go over 5V. The caps and the diodes below supply a negative rail. R6 and D3 form a shunt regulator to regulate the rail to 6.3V this lowers the ripple and prevents adding noise on the audio signal. The 555 timer just supplies the charge pump inverter with a 0-12V ~10khz square wave ~66% duty cycle.
 

Offline ajb

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Re: Advice on FFT ADC protection
« Reply #3 on: October 08, 2015, 05:25:37 am »
U1 is superfluous.  The output of U5 is already a low impedance node, so rebuffering it doesn't provide any benefit.

A simpler approach may be to AC-couple the input, since you presumably only care about AC anyway.  By biasing the input to the middle of your supply, you can eliminate the negative rail and just use a RRIO op amp powered from your ADC's analog supply to buffer the signal if your ADC requires a low impedance source (they usually do).  You can optionally add some attenuation (using a resistor divider followed by a unity-gain buffer is usually better than running an op amp at gain<1), but the op amp's output will be limited to within its rails (which are the same as your ADC's rails) so that's only necessary if you want to limit the range to something less than the supply (say, to a lower reference voltage).

You're also going to want to incorporate some filtering to limit your input the the portion of the audio band that you care about.
 

Offline tggzzz

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Re: Advice on FFT ADC protection
« Reply #4 on: October 08, 2015, 07:34:39 am »
Why don't you tell us what each part of the circuit is intended to do? For example, what is the purpose of U1? (Etc!)
Its fairly simple. The first op amp U5 is a summing amp. It takes the audio signal and adds 2.5V to give the signal a DC bias but it also inverts the voltage.

That's what they do. I asked what they are intended to do, i.e. their purpose or why they are there.

It would also help if you could articulate the purpose of voltage limiting, i.e. why it is important that the voltage doesn't exceed 5V, and what would happen if it did.

Quote
The second opamp U1 buffers the first stage from the third stage. The third opamp U2 multiplies by ~-0.83 this is just to make sure the signal doesnt go over 5V.

You will need to consider how opamps behave near the supply rails. Personally I wouldn't rely on a spice model until I had determined which subset of behaviour is it intended to model.

I suggest you google for "voltage limiter" "voltage clip" with and without "opamp". There are many circuits, each of which is better/worse for different purposes (see above).

Quote
The caps and the diodes below supply a negative rail. R6 and D3 form a shunt regulator to regulate the rail to 6.3V this lowers the ripple and prevents adding noise on the audio signal. The 555 timer just supplies the charge pump inverter with a 0-12V ~10khz square wave ~66% duty cycle.

Are you unconcerned about noise and interference from such a circuit?
« Last Edit: October 08, 2015, 09:47:42 am by tggzzz »
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline Aodhan145Topic starter

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Re: Advice on FFT ADC protection
« Reply #5 on: October 08, 2015, 03:45:19 pm »
Why don't you tell us what each part of the circuit is intended to do? For example, what is the purpose of U1? (Etc!)
Its fairly simple. The first op amp U5 is a summing amp. It takes the audio signal and adds 2.5V to give the signal a DC bias but it also inverts the voltage.

That's what they do. I asked what they are intended to do, i.e. their purpose or why they are there.

It would also help if you could articulate the purpose of voltage limiting, i.e. why it is important that the voltage doesn't exceed 5V, and what would happen if it did.

Quote
The second opamp U1 buffers the first stage from the third stage. The third opamp U2 multiplies by ~-0.83 this is just to make sure the signal doesnt go over 5V.

You will need to consider how opamps behave near the supply rails. Personally I wouldn't rely on a spice model until I had determined which subset of behaviour is it intended to model.

I suggest you google for "voltage limiter" "voltage clip" with and without "opamp". There are many circuits, each of which is better/worse for different purposes (see above).

Quote
The caps and the diodes below supply a negative rail. R6 and D3 form a shunt regulator to regulate the rail to 6.3V this lowers the ripple and prevents adding noise on the audio signal. The 555 timer just supplies the charge pump inverter with a 0-12V ~10khz square wave ~66% duty cycle.

Are you unconcerned about noise and interference from such a circuit?

The output signal is going to an ADC. I haven't decided which yet. I might use an atmega analog input. This cant go below 0V or above 5V so the signal needs to be within these voltages. Hence why I need this circuit. A voltage clip or limited would cause distortion to the signal. The charge pump inverter is noisy but I will do some more tests and might add a small LDO to regulate it to -6V
« Last Edit: October 08, 2015, 03:57:30 pm by Aodhan145 »
 

Offline Aodhan145Topic starter

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Re: Advice on FFT ADC protection
« Reply #6 on: October 08, 2015, 04:00:02 pm »
U1 is superfluous.  The output of U5 is already a low impedance node, so rebuffering it doesn't provide any benefit.

A simpler approach may be to AC-couple the input, since you presumably only care about AC anyway.  By biasing the input to the middle of your supply, you can eliminate the negative rail and just use a RRIO op amp powered from your ADC's analog supply to buffer the signal if your ADC requires a low impedance source (they usually do).  You can optionally add some attenuation (using a resistor divider followed by a unity-gain buffer is usually better than running an op amp at gain<1), but the op amp's output will be limited to within its rails (which are the same as your ADC's rails) so that's only necessary if you want to limit the range to something less than the supply (say, to a lower reference voltage).

You're also going to want to incorporate some filtering to limit your input the the portion of the audio band that you care about.

Thanks very much. I remove U1 which reduced the cost for a decent opamp. How you go about biasing the input thats what I was doing with the summing amp.
 

Offline nctnico

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Re: Advice on FFT ADC protection
« Reply #7 on: October 08, 2015, 04:13:11 pm »
I'd feed the ADC from a log detector. You'll need less bits (8 bits will be more than enough) for a larger dynamic range. A dual diode (one leg with a known current and the other with the to-be-measured signal) can be used to calibrate the voltage drop in the diode. The ratio between the two is a measure for the input signal.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline tggzzz

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Re: Advice on FFT ADC protection
« Reply #8 on: October 08, 2015, 04:21:00 pm »
This cant go below 0V or above 5V so the signal needs to be within these voltages. Hence why I need this circuit. A voltage clip or limited would cause distortion to the signal.

Your circuit will prevent neither clipping nor distortion.

You need to distinguish between "integrity" (a property of a correctly functioning system) and "protection" (prevention of damage).
There are lies, damned lies, statistics - and ADC/DAC specs.
Glider pilot's aphorism: "there is no substitute for span". Retort: "There is a substitute: skill+imagination. But you can buy span".
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Offline Kalvin

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Re: Advice on FFT ADC protection
« Reply #9 on: October 08, 2015, 04:37:42 pm »
Maybe something like this?

 

Offline Aodhan145Topic starter

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Re: Advice on FFT ADC protection
« Reply #10 on: October 08, 2015, 05:26:08 pm »
Maybe something like this?
Thanks very much exactly what I was looking for. Why did I not think of something this simple  :palm:
 

Offline Kalvin

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Re: Advice on FFT ADC protection
« Reply #11 on: October 08, 2015, 05:33:10 pm »
Maybe something like this?
Thanks very much exactly what I was looking for. Why did I not think of something this simple  :palm:

It is quite simple and modest. Just make sure that you understand what each component does in that circuit.
 

Offline Aodhan145Topic starter

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Re: Advice on FFT ADC protection
« Reply #12 on: October 08, 2015, 06:12:15 pm »
Maybe something like this?
Thanks very much exactly what I was looking for. Why did I not think of something this simple  :palm:

It is quite simple and modest. Just make sure that you understand what each component does in that circuit.

Yeah I understand how it works. I feel a bit stupid.
 


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