I'll throw my $0.02. Granted that $0.02 has been hard earned from many hours of fires and "maybe if i stare at this scope capture long enough something will happen".
I'll also say that I get pretty excited about motor controller work and I skimmed your thread to get to the point of being able to reply. I know that sounds horrible and ill informed but I hope it provides some ideas. So here we go.
The idea of using a snubber system to quell output ripple is sound in theory. In practice with the types of power levels involved with motor control, it's difficult to really see through to fruition. If output filter must be used, try getting some blocking ferrites inline or around your motor output phases. These are very effective. Otherwise look to the other side of the FET. How is it being controlled? It may be doing
exactly what your telling it to, and the ripple is a byproduct of the switch event - which of course it is.
Here's how I approach smooth switching for motor control applications.
- What does your FET driver power source look like under loaded switching conditions? Is there a lot of ripple and hash back up the 12v (or 15v) power line? If there is do your best to isolate that power line with possibly a ferrite at the output(meaning physically close) of your PSU, followed by SMT decoupling caps at each gate driver. You need clean power to switch cleanly. But if your switch event is out of control, no practical decoupling will calm 12v/15v line down.
- Lets look at the FET switching event! I see you got a scope with a short ground clip and took a quick grab of the Turn On/Turn Off events. But man, that's a 30,000ft view! Get down in there and take a peak through the Miller time (that flat spot during the turn on). What does that look like? Even from the 30,000ft view i can see it's a roller coaster. So what can we do about it? I think you're half way there with gate resistance and a gate snubber cap, but that snubber cap can just be a source of energy for a resonant system. lets calm it down with a 1-2 ohm resistor between the Cap and the Gate of the FET. Ultimately this is a T network with your ~10 Ohm Gate R on the left of the T, your Cap on the vertical of the T,
and a Series Resistor on the right of the T. Keep this all as physically close to the FET gate as reasonable, specially the cap and the series resistance. The 10ohm Gate resistor is not a bad place to start. You could do some modeling w/ your FET's gate capacitance, PCB parasitics, and driver system. But laying it out and hitting it with a scope is more fun 
- You already found the caveat of Gate driver's and their switched node negative voltage transient susceptibility. So you're really digging into datasheets. A 1-5 ohm resistor in series with your switched node as close as possible to your Gate Driver should quell the transient here. With good layout, and reasonable motor currents this shouldn't be much of an issue. But a 1 ohm doesn't harm you much and does a lot to guard the Gate Driver from a fault or failure. It does slows down your high side boost cap's recharge time a bit, and add's in series with your gate resistance really effecting your turn off more then turn on event.
Now you have the elements in place to really tackle the FET switching event.
Ensure your dead times are adequate between devices before examining FET switching behavior. -If complimentary PWM is in play.
Next go through and bring the system up to a low load, not no load, but low load. Things just bounce around under no load and the FET Gate transients don't quite show as well. Get something like 1/10-1/5 your expected load going on the motor and use that snub scope probe to closely look at your FET Vgs during turn on and turn off. Get down in there and get a good clear view of your Miller time - When the FET Vgs rises, then goes almost horizontal for a bit then continues to rise in a typical RC charge fashion. That Miller time should be smooth and controlled. You shouldn't see ripples and roller coasters here as they'll directly translate to your output.
With the gate snubber cap removed, bring your Gate Resistance up to slow down the FET switch event and try to calm out the big waves in the Miller event under some mild load. Ensure you don't extend the transient time to overlap with your deadtime and cause shoot troughs (again, complimentary PWM only). Really watch your FET temps. Once those start to increase rapidly, bring your Gate Resistance back and start adding gate snubber capacitance to your T network in low nF region to start. I've found this capacitance to be incredible effective to calm the switch event. Ensure your measuring Vgs on the FET legs itself. Experiment and walk around your snubber capacitance value and gate resistance value. Keep the series resistance low at 1-2 ohms to keep the snubber capacitance in the game, you don't want to raise that resistance and decrease the effectiveness of the added capacitance, you just want to slow down that fast MLCC.
Start to walk your load up and watch how the Miller event changes. Higher FET current, longer Miller event and generally less stable. Adjust as needed, keeping things fast for thermal performance, but smooth for noise.
Get Your high and low side Miller events as close as possible. This will very likely require different value Gate Resistors. You'll likely be able to keep the capacitance the same, and keep your series resistance the same.
Now take a look at your Gate Driver voltage supply rail, has that calmed down? I bet it has.
How about your Vds switch event? Little smoother now? I've found AC coupling to work a treat here to really get a good view of the noise during that transient.
Looking down to your phase outputs if there's still noise being emitted, throw some ferrites around it and call it a day! (hopefully!
I hope that helps, and isn't muddying the water with other options offered in this thread. Like i said i didn't read everything but i think i got a decent grasp of what was done. And let me know if some of that isn't clear. I can draw up a simple schematic or the like later if needed.
Oh! and keep the bulk electrolytics! If you run only MLCC for your main bus capacitance it'll be way to fast and cause all sorts of nasty voltage transients. Place some resistance in series with the MLCC bank if you must go this route. Now, "some" MLCC in parallel with the bulk electrolytic is a good move, just watch your Vds transient as you add more. And of course power planes and de-loop every nook and cranny you can!
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