@testin I feel it would be a little premature at this stage as it's a first prototype and have not even powered it up yet so am not sure if I have a expensive zero ohm resistor on my hands or what. But I'll post schematics in due course.
Having said that I'm happy to provide an overview of whats on the board.
The internal 10MHz reference comes from either of these AOCJY2 or a much cheaper AST3TQ both are single ended. I have loaded the AST one but included both foot prints. I'm using the MAX54B1ETE digital pot for fine adjustments of the references.
The internal reference and an optional external reference are fed in to a mux that can direct either signal to the system clock or the calibration clock. The Mux is designed using four MHC544A's. In this way I can Use either the internal or external as the system clock or perform a calibration of the internal clock to an external clock.
The actual calibration is performed by a Lattice LC4256ZE. I selected this part simple because it was the smallest device in the range the found fit the verilog I wrote. Although I'll admit it's a rather large device on the PCB for such a small task. The basic function of the CPLD is a frequency counter that's read back by the MCU. The counter has a third channel that I'm using for an external counter input.
Anyway the main system clock (what ever is selected) goes in to a pll (LMX2582RHAT) whose sole purpose is to take the 10MHz reference and push out a 180MHz clock that the AD9201 DAC wants to see at the end of the day.
The 180MHz goes to a clock distribution driver (AD9514BCPZ) this has three outputs. Ch0 divide by 1 is the differential clock for the ADC CH0, Ch1 also divide by one for ADC CH1, and Ch2 is divide by 9 to give the 20MHz clock for the ATSAM MCU HF Clock.
So the clocking signals are 1) Single ended from the reference or differential from an external source. 2) LVPECL between the PLL and Distribution chip 3) LVPECTL to LVDC converted between the Distribution chip and the AD9102's. The MCU HS clock is CMOS.
Analog front end driver is a THS3091 with +-15 volt rals provided by the TPS65130. I mentioned that part of the circuit briefly
here It has other peripherals that I wholesale stole from ATSAM4E dev board reference designs such at Ethernet, Serial, USB and so on but that I've already tested in previous projects so are good.
Oh year the core is ATSAM4E16 running FreeRTOS. It's also not a cheap chip that takes up lots of board space so will either be looking to go BGA next time or change to a different Cortex chip.