cyberfish - a modern x86 cpu can do as many instructions per clock as many pipelines does it have. if it have 2 pipeline, it can do 2, if it have 4, it can do maximum 4 (in most cases, in theory). the same applies to subleq and arm. modern arm cpus have 3 pipelines. having more pipelines than 1 called superscalar design, and you can put ugly amouts of pipelines into a subleq cpu too if you want, more than into a very complex x86. the question is of course, how much you can effectively add to keep the things easy and effective.
having more pipelines will incrase the alu size, and that decrases the clock. so there should be a sweet spot.
if you say 50 ghz is not possible, you probably have right, maybe i will erase these datas from the website, becouse i dont want to advertise with bullshit
Yes, but a subleq CPU would be very difficult to make super-scalar because of both branching and data dependencies (all in memory due to lack of registers, which means you can't do register renaming). And like I mentioned before, how many instructions you can execute per second isn't important. How much useful work you can do per second is.
A subleq CPU would have a much simpler decoder and ALU than a conventional CPU, but those circuits don't take up most of the silicon area on modern processors anyways - most of the area is used for memory, which a subleq CPU would also need. Cost of a CPU mostly depends on silicon area. A subleq CPU also won't run much faster since the subleq instruction is a pretty complicated instruction by RISC standards. How fast you can clock a CPU doesn't depend on how many instructions you have - it depends mostly on your most complicated instruction.
So you have a CPU that's slightly cheaper, clocked at about the same speed, but has an extremely inefficient instruction set that requires multiple instructions to do anything useful.
When you have a "revolutionary idea" for an alternative way of doing anything, it's always a good idea to try to find out WHY people do things the current way. Is it because all the Intel and ARM CPU designers are stupid and don't know you can have a Turing-complete CPU with one instruction? Or do they know, but chose to design their instruction sets with many instructions? What are those reasons? Hint: it's not because they are stupid.
Now you can say you have different priorities and decided to take a different tradeoff - for example, you can say you really like the simplicity of having a CPU with just one instruction, and you are willing to take a 100x performance penalty for it. That would be perfectly valid.
Saying you can get a 100x SPEEDUP is delusional.
The reason why your code is so slow is not because it's running on an emulated CPU. Emulating a very simple CPU like subleq is very easy, and the slowdown should be no more than 5x at worst. That means on a modern Intel CPU, you should be getting the emulated speed of a 2010-era Intel CPU. It's clearly much much worse than that.
No, the real reason it's so slow is because the instruction set is horribly inefficient at actually getting things done.