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Author Topic: DIY Ghz sampling head for <100Mhz scopes  (Read 11864 times)

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Offline Mosaic

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #50 on: May 18, 2016, 12:28:35 AM »
Picked up this as a reference:
http://www.cambridge.org/us/academic/subjects/engineering/circuits-and-systems/circuits-electronic-instrumentation

Seems very pertinent.

Ramp based delays and SMPS PWM triggers/controllers go hand in hand. Perhaps there's a possibility there.
 
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Offline LaserSteve

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #51 on: May 18, 2016, 01:09:10 AM »
This PDF covers the simplified SRD based sampling head used in a very popular microwave "Brick" oscillator with very low phase noise used by us HAMs.   Page 5 covers the sampler schematic used to lock the 1.2 Ghz  sapphire rod/cavity  oscillator used in the brick.  The sampler is driven from a ~100 Mhz crystal oscillator...

      The ~1.2 Ghz oscillator, at a Watt or more is multiplied up to the final frequency by a harmonic generator...  I'm posting the link so that those who bought the Ebay sampler can see an implementation...  Simple, no prescaler, and the phase noise is very low, which is needed for long distance, narrowband, SSB comms with microwaves..

John,  KE5FX, deserves a lot of credit for hosting this... I know it has helped me considerably...

http://www.ke5fx.com/brick/fwbrick.pdf

Steve



« Last Edit: May 18, 2016, 01:13:50 AM by LaserSteve »
 
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Offline Marco

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #52 on: May 18, 2016, 01:44:17 AM »
Is there any advantage to the test circuit from Skyworks using an isolating balun to drive the SRD over the unun transformer in the Brick oscillator?

If the ADC isn't all that fast you should add a buffer and peak detector behind the resistor combiner, Schottkys leak a lot.
« Last Edit: May 18, 2016, 01:49:46 AM by Marco »
 

Offline rfeecs

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #53 on: May 18, 2016, 02:59:49 AM »
If the ADC isn't all that fast you should add a buffer and peak detector behind the resistor combiner, Schottkys leak a lot.

Apparently it was common practice to feedback a portion of the amplified sample.  This is described here as "slide-back feed-back":
http://w140.com/tek_sampling_notes.pdf

It is also mentioned here:
http://w140.com/andrews_construction_of_broadband_sampling_head.pdf

The manual for the Tek S-4 sampler gives a great description of the theory of operation and schematics for the sampler.  It uses a "traveling wave sampler" which is described elsewhere.  Great pictures of it on this page, too.:
http://w140.com/tekwiki/wiki/S-4

I love these old manuals and the detail they go into.  All open source.

Clearly there are a lot of secondary issues like "blow-by" that they found ways to deal with.

Amazing that this stuff is 50 years old now.
 

Offline LaserSteve

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #54 on: May 18, 2016, 03:01:46 AM »
When working with low noise microwave sources, or any RF at all, ANY additional isolation is always a good idea.
Hence the Skyworks board layout. A lack of isolation in a PLL almost always results in more sidebands or noise....
In a sampling scope it is far more sensitive to any lack of isolation.

The toroid transformer  in the microwave  brick is encased by a 2.5 mm thick steel case that holds the crystal  oscillator and  sampler,  on one PC board.  The probe extends out of the case, into the power VCO.  However the sampler probe  is going to radiate into the VCO  oscillator a bit... But the field in the VCO oscillator cavity is so high (watts)   that it will swamp tiny amounts of reverse injection...

The sweep ramp and phase lock/ lock detector opamps, as well as the VCO driver are on another board, mounted in a
different cavity on the main block, which serves to aid in isolation from any RF. As these units were designed to be master oscillators in a RF noisy environment in a microwave relay station or Telco switching office, the shielding is well thought out and all lines into and out of the block are on capacitive, hermetic sealed, feed throughs.

If the device were not built the way it is, with very highly isolated modules, I'm sure more isolation at the injection frequency would have been used. Still amazing to obtain 10.244 Ghz with no prescaler, no counter, and a couple of op-amps as the signal processing.  This way the sideband noise is low, and the reliability is extremely high, with a loss of lock often triggering a automatic switch to a "protection channel" with a complete backup TX-RX system to ensure communications continues.  All done with a few opamps and some "jellybean" discrete transistors, with a second SRD installed in a microwave  filter creating the harmonics of the 1.2 Ghz oscillator up at 10 Ghz....

For bench tests, you could certainly get away with a toroid transformer with no shield... However I'd  want the baluns on my implementation.

I have no idea which SRD is used in the Brick's discrete  sampler, but the sampling diodes are 5082-2835 in the big glass packages, even at 1 Ghz...  Checking for a data sheet revealed this little gem:

http://www.rf-microwave.com/uploads/diodes/AN942.pdf
« Last Edit: May 18, 2016, 03:31:13 AM by LaserSteve »
 

Offline LaserSteve

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #55 on: May 18, 2016, 03:52:31 AM »
One more link...  If this were only 1/5th the price...

http://www.semiconductorstore.com/cart/pc/viewPrd.asp?idproduct=46951

Steve
 

Offline rfeecs

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #56 on: May 18, 2016, 04:07:37 AM »
And yet another classic ap note, on step recovery diodes:
"Pulse and Waveform Generation with Step Recovery Diodes (AN 918)"
http://literature.cdn.keysight.com/litweb/pdf/5954-2056.pdf

And one more from the frequency domain point of view:
"Harmonic Generation Using Step Recovery Diodes and SRD Modules (AN 920)"
http://cp.literature.agilent.com/litweb/pdf/5989-6258EN.pdf
« Last Edit: May 18, 2016, 04:15:47 AM by rfeecs »
 

Offline Marco

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #57 on: May 18, 2016, 05:07:14 AM »
This PDF covers the simplified SRD based sampling head used in a very popular microwave "Brick" oscillator with very low phase noise used by us HAMs.   Page 5 covers the sampler schematic used to lock the 1.2 Ghz  sapphire rod/cavity  oscillator used in the brick.  The sampler is driven from a ~100 Mhz crystal oscillator...

How does it create pulses from the SRD step by the way? Reflections from the 150 Ohm resistors?
 

Offline Mosaic

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #58 on: May 18, 2016, 06:26:01 AM »
Found this to be useful  regarding phase noise/jitter measurement techniques. There's also a pdf online for the Rigol DSA 815 TG on the subject....as i have that I mention it here as well.
http://www.rohde-schwarz-usa.com/PhaseNoiseOnDemand.html?aliId=11319444
 

Offline Mosaic

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #59 on: May 18, 2016, 06:28:13 AM »
One more link...  If this were only 1/5th the price...

http://www.semiconductorstore.com/cart/pc/viewPrd.asp?idproduct=46951

Steve

yeah, that was pointed out early in the thread, but maybe we can do one for that? DIY though, not retail via middleman distributor.
 

Offline rfeecs

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #60 on: May 18, 2016, 06:49:08 AM »
This PDF covers the simplified SRD based sampling head used in a very popular microwave "Brick" oscillator with very low phase noise used by us HAMs.   Page 5 covers the sampler schematic used to lock the 1.2 Ghz  sapphire rod/cavity  oscillator used in the brick.  The sampler is driven from a ~100 Mhz crystal oscillator...

How does it create pulses from the SRD step by the way? Reflections from the 150 Ohm resistors?

Refer to page 2, figure 3:
http://cp.literature.agilent.com/litweb/pdf/5989-6258EN.pdf

On one half cycle, the SRD is forward biased and charge is stored in the SRD junction.  On the other half cycle, current is pulled out of the diode and energy is stored in the inductance of the transformer secondary.  When its stored charge is depleted, the SRD snaps off very fast.  The current switches to the Schottky diodes and the energy in the transformer inductance discharges in a short impulse.
 

Offline LaserSteve

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #61 on: May 19, 2016, 12:03:00 AM »
Some more Literature: One of my Favorite Journals is Review of Scientific Instruments... The nitty gritty "How To" journal of applied science that does not attract mere  theoreticians. 

Sampling Oscilloscope for Milli-microsecond Pulses at a 30 Mc Repetition Rate
Arnold S. Farber
Citation: Review of Scientific Instruments 31, 15 (1960); doi: 10.1063/1.1716780

Uses a simple diode shunt switch across a waveguide to act as a sampler to view a  10 Ghz carrier, downside, signal must be in a waveguide and have enough amplitude to drive a shunt switch and a diode detector, rep rate is 30 Mhz and uses vacuum tubes except for the detector and shunt switch diodes...  Gate pulse generated by a 2C39A disk triode.  Brilliantly simple for what it is.. Author found that by injecting a RF  signal to be viewed into the gate diode's cable, he could view those signals as well, via mixing.


---------------------------------------------------------------

Time-to-digital converter of very high pulse stretching ratio for digital storage
oscilloscopes


Keunoh Park and Jaehong Park
Citation: Review of Scientific Instruments 70, 1568 (1999); doi: 10.1063/1.1149626

Generates a ECL signal proportional to the time between a sampling gate pulse and a 250 Mhz sampling gate clock for interpolation of signals, ~ 20 picosecond resolution, up to 4 nanoseconds period...  Uses a series of ECL chips  and a current source driven ramp to generate a time measurement.  Worth viewing if you wish to have a means of calibrating the time between sampling pulses.

---------------------------------------------------


Optically coupled electrical sampling system with 4 GHz bandwidth

S. B. Samaan, L. Wilson Pearson, and Charles E. Smith
Citation: Review of Scientific Instruments 58, 60 (1987); doi: 10.1063/1.1139514

Turns a TEK  S6 Sampling head into a optical TDR using a 1 nanosecond, six amp,  Avalanche pulse to drive a laser diode.. Very interesting pulse generator and diode detector, plus it levels the laser pulse to pulse amplitude using feedback..... Many of the parts are pure un-obtainium, but there are modern equivalents...

---------------------------------------------------------------------------------------

High Speed Single Event Sampler
Hector A. Baldis and Jamshid Aazam-Zanganeh
Citation: Review of Scientific Instruments 44, 712 (1973); doi: 10.1063/1.1686228

Has a schematic of a complete sampling gate  head using HP diodes and an avalanche driver for said gate.
Uses matched HP 5082-2800 in a bridge, and author claims gate can pass 500-700 ps pulses..
Probably a 500 Mhz unit, but worth a read...  Author used 16 such gates as a sequential sample and hold matrix  driven by a 125 Mhz clock, using for the time, overdriven Schottkey  TTL counters.  Of course its missing feedback, slide thru protection, all the other stuff needed for a serious sampling scope...  No, they do not mention what the transformer material is...  Sensitivity is supposed to be 20 mV and up, no mention of upper limit...   And they do not describe how they did a high bandwidth, DC Coupled,  1:16 Fanout,  50 Ohm splitter for the input...

Partial Pic attached per Educational Use Clause... I deleted a good deal..   If you want more details, buy the article from RSI...

-------------------------------



Steve




« Last Edit: May 19, 2016, 12:52:32 AM by LaserSteve »
 

Offline Mosaic

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #62 on: May 20, 2016, 03:07:46 PM »
 

Offline PA4TIM

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #63 on: May 20, 2016, 04:19:33 PM »
I have a HP 3GHz prescaler unit from a counter that is modded by someone in the past to a standalone unit that can be used for a scope. The output is 0-50 MHz. But instead of feeding it to a counter you feed it to a scope. Maybe something to look at.

Just something I think of now, most DSO's have an equivalent sampling mode (or something like that) I never tried it but I think it does what you want; seeing higher frequency repetitive signals

I have a Philips 3400 1GHz dual channel sample scope, two 1GHz Tek 1S1 plugins and a 5GHz Tek 1S2 plugin. The latter is great for TDR but a disaster as sample scope unless you use it with a delay line (a rather big suitcase with a lot of cable).
Besides that, I use them only to play with pulsgens or other experiments, but never used them for something serious, tried them a few years back to repair a wifi router but they are not suitable for that. Finally I used a spectrum analyser to do the job.
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Offline Mosaic

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #64 on: May 21, 2016, 01:46:15 AM »
I have a HP 3GHz prescaler unit from a counter that is modded by someone in the past to a standalone unit that can be used for a scope. The output is 0-50 MHz. But instead of feeding it to a counter you feed it to a scope. Maybe something to look at.


How shall we look at it?
 

Offline Mosaic

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Concept comparator approach
« Reply #65 on: May 26, 2016, 05:02:53 PM »
I've devised an approach to throw out for comments. It goes like this.

1) A digital attenuator front end controlled by a uC.
2) A trigger comparator (ADCMP58x) next, feeding a 5ps stepping digital delay chip (sy8927u?, 2ns min delay, 7 ns max)
3) A 2.5 ns delay line (about 15" of 50 ohm FR4 microstrip, maybe U shaped) going to item 4.
4) A peak detect (ADCMP58x) comparator 'sampler' with a flash 8 bit DAC resistor R-2R  ladder Vref. driven by a uC & the nearby (<1") delay chip signal from (2).

Ok, the 8 bit DAC R-2R ladder is configured in 'reverse' where the delay chip pulse feeds the top via a current limiting resistor and the uC either floats or grounds the  'legs'  for the R-2R DAC to establish a Vref tapped just after the current limit  resistor fed by the delay line. This effectively becomes the 'sampling pulse' for the 2nd comparator.
The duration of the sampling 'pulse' from the delay chip can be controlled by a TDR grounded leg cancelling reflection and by the hysteresis of the first comparator to a suitable period.

The basic operation goes like this.
The uC steps the dig. RF attenuator and the Vref of comparator #1 (a regular R-2R 8 bit affair) to obtain a peak triggering of say 80% of the max comparator voltage input. This gives some DAC resolution control and a bit of input protection. This 'trigger' becomes the time reference for the sampling.

Once the trigger occurs, it is shaped by the hysteresis of  comp#1 and a TDR ground leg into a fixed length pulse period, suitable for use by comp#2.
The delay chip  has a 2nS min, which requires the 2.5nS delay line so we can peak sample a bit BEFORE the trigger event, which I think is a useful capability.

Now once the delay chip time period is set the  comp# 2 will 'sample' based on the analog  Vref produced by the trigger pulse and controlled by 8 uC lines. In order to get a peak sample, the uC will have to start from a max Vref and work down via the 8 bit control until comp# 2 triggers. Using comp#2 latch setting will inform the uC of the peak detection and it can calculate the actual Vref that = peak detect based on the known amplitude of the delay trigger and the setting of the 8 DAC lines. Achieving this first peak detection will take a few cycles of the RF input while the uC steps down the DAC Vref.

Having obtained the first known Peak detection and the first known time step from the trigger based on the delay chip setting, the uC can proceed to repeat this process by resetting the latches of the comparators after adding known delays (delay chip), maxing the 2nd comparator's Vref again and resampling the signal detection (now time offset triggered from the ref. peak) thereby building up a sequential profile of the signal.

The data from the sampling can be laid off to some FRAM memory to allow for upload via USB to a PC or output via a calculated 10 bit PWM & low pass filter to a low speed scope.

Depending on the uC speed and the fact that the parallel sampled DAC Vref/ Vpeak is derived on the fly with a simple calc with no use of an ADC I'd  venture that a couple hundred KSPS can be obtained.
The uC will know when a complete signal period is complete when a delayed signal sample = the peak sample. (This will require a manual tolerance tuning input by the user - perhaps by a quadrature encoder to prevent false period detection due to noise etc.). The uC  can  then report on frequency or perhaps do useful things like focus/zoom by oversampling of some part of the wave for better  time resolution samples and improved details.

Well, time to poke some holes in the concept folks. :)








« Last Edit: May 26, 2016, 05:18:30 PM by Mosaic »
 

Offline rfeecs

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #66 on: May 27, 2016, 04:47:48 AM »
Item number 3 stands out for me.

15" of microstrip on FR-4.  I would worry that might distort your signal.  Microstrip is dispersive and any lossy transmission line is dispersive.  So its loss and phase velocity changes with frequency.

According to this article (which may be biased against FR-4), at 3GHz the loss would be about 0.3dB per inch:
https://www.rogerscorp.com/documents/2122/acm/articles/Understanding-When-To-Use-FR-4-Or-High-Frequency-Laminates.pdf

So 15" would have about 1.5dB loss at 1GHz and 4.5dB loss at 3GHz.  That seems like a potential problem.

Notice the Electronics Design article mentioned at the beginning of this thread uses a loss compensation circuit for the delay line.
 

Offline Mosaic

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #67 on: May 27, 2016, 05:26:50 AM »
Yes. that looks like a good area to  invest more thought into. Perhaps some low loss semi rigid coax is required.

Also, I have to think some more on the sampling of the signal. The way it is the  2nd comparator can still trigger/latch high once there is no High Vref present as it is seeing the RF signal all the time or the digital hi from the 1st latched comparator once the trigger occurs.
This  would still happen when there is no sampling trigger presenting a high Vref via the R-2R ladder.

Introducing capacitive coupling post the 1st comparator driving the coax 2.5nS delay line will prevent any 'high' latched DC comp signal from  propagating to the 2nd voltage sampling comp. except for a quick transient pulse. Once that pulse isn't long enough or large enough to be noticed by the 2nd comp. the sampling should be ok.
 Then the 2nd Voltage sampling comparator will only latch high when  the Vref (trigger & DAC combo level) steps below the actual peak RF signal.

That capacitive coupling will have to have a fairly high resonance Frq and very low inductance to not cause issues at the freq span of interest. Also it will limit the low end of the freq span by acting as an HPF. But that should be manageable.






 

Offline rfeecs

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Re: Concept comparator approach
« Reply #68 on: May 27, 2016, 10:47:17 AM »
I've devised an approach to throw out for comments. It goes like this.

1) A digital attenuator front end controlled by a uC.
2) A trigger comparator (ADCMP58x) next, feeding a 5ps stepping digital delay chip (sy8927u?, 2ns min delay, 7 ns max)
3) A 2.5 ns delay line (about 15" of 50 ohm FR4 microstrip, maybe U shaped) going to item 4.
4) A peak detect (ADCMP58x) comparator 'sampler' with a flash 8 bit DAC resistor R-2R  ladder Vref. driven by a uC & the nearby (<1") delay chip signal from (2).

Ok, the 8 bit DAC R-2R ladder is configured in 'reverse' where the delay chip pulse feeds the top via a current limiting resistor and the uC either floats or grounds the  'legs'  for the R-2R DAC to establish a Vref tapped just after the current limit  resistor fed by the delay line. This effectively becomes the 'sampling pulse' for the 2nd comparator.
The duration of the sampling 'pulse' from the delay chip can be controlled by a TDR grounded leg cancelling reflection and by the hysteresis of the first comparator to a suitable period.


You are driving an R-2R ladder from the output of a delay chip with a 50 ohm impedance and a 55pS rise/fall time?  I can't see how that is going to work.  Your R-2R ladder will need to be able to pass a 6 GHz bandwidth signal through it to maintain that rise time.

Maybe just use a DC DAC signal for the comparator input and drive the latch on the comparator with your delayed trigger edge?
 

Offline PA4TIM

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #69 on: May 27, 2016, 04:50:54 PM »
I have a HP 3GHz prescaler unit from a counter that is modded by someone in the past to a standalone unit that can be used for a scope. The output is 0-50 MHz. But instead of feeding it to a counter you feed it to a scope. Maybe something to look at.


How shall we look at it?

Sorry, I missed it. I wanted to add the model number in my previous post but I forgot it. I mean looking in the manual/schematics from that plug in for ideas. Thinking outside the box. Just because it does work but it is a totally different way. Prescalers are cheap today and maybe it is an easy way to use them for instance for triggering.

It is the HP5254C. The mod is a power supply to use it stand alone and a smal 0-50MHz counter display. if you tune it for, let say, 2,524 Hz, you set the dial to 2,5 and the 7 segment led display at 24. To my surprise  this works better as my sample scope. http://www.pa4tim.nl/?p=1040 a picture of the plugin.

I have designed and build a 25MHz to 2GHz sweep generator. I made an attenuator with pin diodes and coplanar waveguide made from  FR-4.  https://en.wikipedia.org/wiki/Coplanar_waveguide That turned out to be a real pain in the .. The first setup worked rather well, but with an other piece of FR-4 to build it for my friend it was a disaster. I made filters and a VCO before this, but with microstrip based on FR4 and that worked better as coplanar waveguide. Reading about it at that time, the problem is the "epoxy" they use to make it hard (can not remember the English word for it) is not very constant and can differ from brand to brand and even within a brand. Also the moisture absorbed by the pcb from the air can have an influence. The better way is teflon (but not tried that myself)


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Offline Marco

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #70 on: May 27, 2016, 09:37:44 PM »
I think the clock interrupted capacitor charge method makes most sense for a delay generator. This paper describes an example of a time to digital converter which combines capacitor charging with a clock in an similar way to how a delay generator would do it. I'm not a fan of all the ECL logic and high end opamps though, because it would jack the price up, but still it shows the potential of what can be done with discrete components.

The delay ranges you can get with those ECL programmable delay ICs is simply insufficient in my opinion.
« Last Edit: May 27, 2016, 11:21:13 PM by Marco »
 

Offline Lukas

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #71 on: May 28, 2016, 06:31:31 AM »
The delay ranges you can get with those ECL programmable delay ICs is simply insufficient in my opinion.

That's why I included the triggered oscillator in my design. It may not be the best solution, but it's rather simple since it doesn't involve any fast analog wizardry. It's easy to calibrate as well.
 

Offline Marco

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #72 on: May 28, 2016, 12:09:57 PM »
That is one of two options, I just think the other option is superior.

The problem with a square wave delay line oscillator is that jitter is a random walk additive process. This prevents them from being able to provide the stable longer delays "normal" oscillators can, where the cycle to cycle jitter at the amplifier has a much smaller effect on the fundamental oscillation in the tank circuit.
 

Offline Lukas

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #73 on: June 28, 2016, 11:56:09 PM »
Someone wrote me an email, asking for schematics of my sampling scope design, so I may as well post them here. Sorry for them being so messy... For some reason part numbers are missing, but they should be pretty easy to guess.

Some random notes:
IC3 selects between the two trigger inputs and rising/falling edge trigger. When a trigger arrives, IC4's output goes high starting the ring oscillator made of IC5 and IC6. The feedback
All single jumpers are pin headers for connecting control signals. The feedback path is approximatly 25cm long. Its output gets divided to reduce the ring delay line's length.
This clocks U$1 and IC8. U$1 is a counter that can be pre-set. When it reaches 0xff, the TC output goes low for one clock cycle, thus by changing the pre-set value, I can adjust the sampling instant in steps of approx. 10ns. The TC output gets resampled by IC8 to improve timing accuracy. Fine delay is adjusted using IC10 (should be an MC100EP196). The circuitry surrounding it is for configuring it as an ring oscillator for calibration purposes. Its output then gets buffered by IC12 and strobes both ADCMP582.
 

Offline David Hess

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Re: DIY Ghz sampling head for <100Mhz scopes
« Reply #74 on: June 29, 2016, 03:40:34 PM »
Mosaic, I thought maybe we might have discussed this over at [email protected] but a search did not turn up anything.  Other people have proposed and discussed your idea there.

I looked at this a couple years ago and concluded the following:

1. A sample head based on the Tektronix S-2 will work to at least 4 GHz and probably more like 8 GHz with modern schottky diodes which are better than what Tektronix used.  One of the participants in the [email protected] group documented a rebuilt of his S-2 with diodes from Avago and got considerably improved performance.

2. Traveling wave gate samplers like the Tektronix S-4 have the advantage of working with step recovery diode pulse generators instead of avalanche pulse generators but are more complex and seem to suffer more from blowby.

3. Varactor and PIN diodes can be qualified to operate as step recovery diodes.  I remember it being mentioned that some bipolar transistors can be used this way as well.

4. I would completely throw out sequential operation and go with random sampling like the Tektronix 7T11 supports simply to get rid of any delay line and pretrigger requirements for viewing the leading edge of a pulse.  Unfortunately this means measuring positive or negative time between the sampling strobe and trigger but the 7T11 manages it just fine.  A modern implementation could get away with using two separate time-to-voltage converters.  Note that small amounts of trigger to strobe jitter are an advantage in this case and irrelevant if you only measure the actual trigger to strobe delay.

5. I would keep the internal trigger source function of the S-2 and S-4.  This would allow eye diagrams *without* a separate clock signal.  Note that when using random sampling, the strobe will corrupt the trigger where they meet but this could be seen as an advantage because it shows where the actual trigger point is visually.  When making eye diagrams, this is irrelevant because you can use a different area of the waveform for measurements.

6. When I looked into this, I concluded based on interest that it was uneconomical.  The people who could most use it have the funds to buy something from Picotech.  Maybe adding TDR capability like the Tektronix 11k series sampling heads would help but I doubt it would be enough.

7. Current integrating time to amplitude and amplitude to time circuits are completely adequate to get below 10ps resolution.  Power supply rejection will be critical however.

Take a look at "Circuits for Electronic Instrumentation" by T.H. O'Dell.  It has many chapters on pulse generation and sampling including an intriguing idea for using an open transmission line in place of the sampling storage capacitance.
 


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