Hello folks,
I've been trying to design a simple and low cost power supply that has the following features:
- Mainsfailure detection & shutdown on event
- Constant load on the power transistors for stability
- Latching pushbutton to enable/disable the output
- Temperature protection
- CC and CV indication
- Peak current limiting
My target is an output of 20V @ 1.5A, but this is not set in stone. I could add a preregulator like blackdog's, but that's for later. I don't prioritize the user interface like some do, I'd rather hava stable PSU that doesn't fry the DUT on turn-on or turn-off. I currently use potentiometers for the setpoints of the current and voltage output, which are referenced from the ground of the opamp supply. If I want to control my PSU digitally I can easily replace the potentionmeters with a DAC in the future. I still got some ICL volt meter IC's lying around so I might use them as well to keep the amount of digital in this PSU as low as possible.
I've included a schematic of my design in the attachment. It's still a lot of work in progress, but I've build a prototype on perfboard to check whether everything would work as I though it would. After a lot of bug fixing and correcting wrong connections I got the PSU to work. I don't have a dynamic load so i started to search for the ones previously made by other eevblog members. I came across Jay_diddy's_B excelent tutorial on dynamic load. I tested a few designs in LTspice and wanted to use this on my current PSu design to determine the stability of my PSU design. But before that I'd like to highlight a few bit's of my design:
Mainsfailure detectionAs i used as much components as possible which I already had available, I've used a NE555 timer for mainsfailure detection. The AC pulses from the transformer that supplies the opamps are used to keep the threshold of the 555 low with a npn transistor, which pulls the pin to ground. When the mains is disconnected and the pulses stop, the RC combination will charge up. When the internal threshold of the NE555 is reached, the output will go low and reset the pushbutton latch. On the reset of the 555 is an RC combination to ensure that the 555 doesn't glitch when the mains is connected. The diode accross the reset resistor makes sure that if the PSU's mains switch is quickly toggled the capacitor quickly loses it's charge on turn-off.
Pushbutton latchI wanted my PSU design to always power on with the ouptput disabled, since I've had some experience with people turning on a power supply with the DUT connected. Polyfuses will die in a spectaculair way when connected to a PSU set on 30V @ 10A and a battery charger in series. Therefore I needed a pushbutton latch that would reset default to off when the mains is connected. Again a pair of NE555 did the trick, with just two resistors, a cap and a switch a latching pushbutton was created. with the NE555's reset connected to the output of the mains failure detection, the PSU is turned off in a mainsfailure event and will always be default off when the mains is switched on.
Constant current source & constant current loadThe output of the pushbutton latch is connected to a transistor that turn's the constant current source and constant current load on and off. The current source provides a 3-5 mA current to bias the TIP142. The current and voltage loop will draw current to regulate the output to either voltage or current setpoints. The constant current load draws around 10mA from the TIP's emitter to ensure that the PSU has no stability or slow response when a high impedance load is connected on the output.
The rest I think you've probably seen more than enough supplies to know how the voltage and current error amplifiers, so I won't explain that. I just wanted to highlight the mains failure and pushbutton latch interworking, as that can be a bit difficult to visualize from the schematic how that works.
AC stabilityI wouldn't have given this thread the name is has if I didn't have an AC stability problem. I've created a simplified design in LTspice to check the stability of my design and determine the compensation values for the current and voltage regulation. However, the design is fairly close to oscillation as can be as seen on the picture below.
The phase margin is 6.27°, gain margin 63.4dB with the -3dB point at 22.4kHz. However as the image shows the phase will go as low as 1.1°on the lower frequencies. I assumed this is not something I want for stability, sine the phase almost is 0°, but I can't find the cause of this. I assume the used opamp and darlington stage cause the phase to behave like this.
I tinkered around for a bit and found that when a 10nF capacitor is placed on the voltage divider, the phase and gain margins improve quite a bit.
Phase margin goes up to 23.3°, gain margin to 42.8 dB and the -3dB point is at 79.4 kHz. Still I find the phase margin quite low. I wonder if I put the AC source on the correct place or if the gain and phase margins are acceptable as they are?
LTspice simulation is in the attachment!