Author Topic: Dynamic Electronic Load Project  (Read 69784 times)

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Offline RichardD

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Re: Dynamic Electronic Load Project
« Reply #25 on: January 16, 2015, 10:28:09 am »
Hi - can you comment on why you used an inverting op amp configuration?  Typically you see electronic load circuits that use a non-inverting op amp configuration, so just wondering if there were any particular advantages to the non-inverting configuration (e.g., stability, easier to configure the summing node, etc.)?
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #26 on: January 16, 2015, 12:43:44 pm »
Hi - can you comment on why you used an inverting op amp configuration?  Typically you see electronic load circuits that use a non-inverting op amp configuration, so just wondering if there were any particular advantages to the non-inverting configuration (e.g., stability, easier to configure the summing node, etc.)?

The main reason for using the inverting configuration was it allows the dc reference and the pulsed reference to be easily summed together.

The main disadvantage of the circuit is that two power supplies are required. The op-amps are operating with their inputs and outputs between the rails. The allows a very large selection of op-amps to be used in the circuit.

The non-inverting configuration, when operated with a single supply, does not require rail-to-rail inputs, but it does require op-amps that work with their inputs at the negative supply voltage. These include LM324, LM358 etc.

Regards,

Jay_Diddy_B
 
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Offline BravoV

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Re: Dynamic Electronic Load Project
« Reply #27 on: January 22, 2015, 02:20:30 am »
 

Offline diyaudio

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Re: Dynamic Electronic Load Project
« Reply #28 on: January 22, 2015, 02:31:27 am »
Jay_Diddy_B,

Thanks a lot for putting in the effort to explain your analysis. It is by far the most clear explanation I've seen so far. It is the most useful explanation I have seen so far ...   :-+

Could you explain in a bit more details please how you read the last two charts of your post. Specifically, how do you determine if the circuit is stable.

If I read it right, the unity gain of the loop is at 30 kHz. But in both cases (before and after dampening is added) the phase shift seems to be pretty far away from 180. 
Or do I read it wrong?

Thanks.

Hi,
 I have zoomed in on the area that we are interested in. Here is the results without the damping network:



I have used arrows to indicate the phase margin and the gain margin. The phase margin is a very good 84 degrees. The gain margin is low, only 3dB.

If I add the damping network. I get the following result:



I have the same phase margin 84 degrees, but the gain margin has increased to a massive 52dB.

So why is this problem?  :-//

Both of these loops are stable. The issue is that part of the control loop, the transconductance of the MOSFET varies with the operating point. The gain increases as the current increases. If I modify my model to this:



Here I am stepping the load current from 0.5A to 5A. I get this result:



The high current result is unstable, the gain is 3dB when the phase angle is 0 degrees.

If I switch to the time domain. In this model I am ramping the load current from 0 - 5A:



I get this result:



You can see the control loop breaks into oscillation when the current is greater than 1.9A.
Note, that I had to add a little ripple, just 10mV, to disturb the control loop to get the oscillation to show up.

If I add the damping network I can sweep the current from 0-5A and there are no oscillation as predicted in the frequency domain. (There is nothing to see, so I have not included the results).

An alternative solution to the damping network, is to reduce the loop gain. If I increase the capacitor by factor 10, to 2200pF, I get this result:



This is a very stable system, but the limited bandwidth, would prevent the circuit being useful for transient load tests.

Regards,

Jay_Diddy_B

@Jay_Diddy_B

Thanks for this,studying compensation networks myself and these these simulations looks pretty good.



 

Offline scopeman

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Re: Dynamic Electronic Load Project
« Reply #29 on: March 16, 2015, 01:26:07 pm »
Hi Jay,

Do you have a PCB layout file or Gerbers you can post for this circuit?

Thanks,

Sam
W3OHM
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #30 on: March 16, 2015, 01:53:55 pm »
Hi Jay,

Do you have a PCB layout file or Gerbers you can post for this circuit?

Thanks,

Sam
W3OHM

Sam,

Here are the Gerbers and the latest version of the schematic.

This is a two sided layout. There are a few vias that connect the two sides.

The board was designed to fit the extruded case that I found at my local junk shop.

73,

Jay_Diddy_B
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #31 on: March 16, 2015, 02:16:33 pm »
Hi,

The Gerbers should look like this:



And




Jay_Diddy_B
 

Offline BravoV

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Re: Dynamic Electronic Load Project
« Reply #32 on: November 02, 2016, 02:03:12 am »
... <snip>....

Features:

0-5A maximum continuous current
0-5A pulsed current at 330Hz

Jay, I have this 500V 46A "linear" mosfet IXTN46N50L (photo) , datasheet (HERE). 

It has a whopping gate capacitance (Ciss) at 7000 pF, just wonder if the circuit needs a major revision just to make it work as pulsing dummy load ? Say at "reasonable" rise & fall time for working at "common" power supply types. Also when running at the static continuous current, does need modification too ?
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #33 on: November 02, 2016, 01:04:47 pm »
BravoV,

Let start by coming up with a specification. That MOSFET on a CPU cooler should handle around 200W. So let us set the maximum current at 20A.
If we choose a voltage drop on the shunt of 200mV, we have 4W of dissipation in the shunt.
20A/0.2V = 10m?

We can make the sense resistor using ten 100m? resistors in parallel.

AC Analysis

We repeat some of the AC analysis that was performed in this message.

http://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg462562/#msg462562

We can the value of transconductance from this graph on the datasheet. Using a value of 12 will give us a little margin.




The capacitance varies as a function of the drain source voltage. This is shown on the datasheet like this:



The values at Vds =3V and Vds=15V will be used in the analysis.

Small signal SPICE model

A small signal SPICE model can be built using the information derived from the datasheet:




The results show that the bandwidth of the output stage is a respectable 190 kHz.




Repeat the analysis at Vds =15V

Vds=15V Model




Vds=15V Results




The 3dB point is slightly higher in frequency at 240 kHz.

Gate Drive Requirements


The transfer characteristic of the MOSFET are shown in this graph from the datasheet:



The graph reveals that we will need to able to provide at least 12V of gate drive. So the op-amps we use will be powered from +15V and -5V rails.

We can add the transfer characteristics to the small signal model by putting a dc voltage in series with the gate:




To be continued ....

Regards,

Jay_Diddy_B

« Last Edit: November 02, 2016, 01:08:10 pm by Jay_Diddy_B »
 
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Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #34 on: November 02, 2016, 01:16:50 pm »
Complete Load
The error amplifier can be added to the model:



Note: the model includes an inductor to representing the wiring to the power supply. An RC damping network has been added, this is explained earlier in this thread.

The model can be tested at the 3V operating point:



The model can be tested at the 15V operating point:



Bode plots
The model can be modified to look at the small signal behaviour, by inserting a disturbance in the feedback path. Plot V(a)/V(b) to display the control loop gain.




Bode plot for 3V



Bode plot for 15V





The control loop has about 25 kHz of bandwidth. This is fairly conservative. I have not built this circuit, so I am giving safe values.

I have attached a zipfile with the LTspice files for those playing along at home.

Regards,

Jay_Diddy_B

« Last Edit: November 02, 2016, 01:18:46 pm by Jay_Diddy_B »
 
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Offline BravoV

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Re: Dynamic Electronic Load Project
« Reply #35 on: November 05, 2016, 05:16:03 am »
Jay, thank you for your effort. To be honest, I need time to get the grip on above simulations.  :palm:

Sorry Jay, its just I'm not sure how above simulation translated into real circuit.  :'(
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #36 on: November 07, 2016, 09:28:22 pm »
BravoV and the group,

I have expanded the LTspice model that I was using earlier to make it more like a real circuit. This model should be much easier to implement in hardware:





This model uses an IXYS generated model for the MOSFET, downloaded from the IXYS website. I am not sure about the small-signal accuracy of this model with low Vds.

A large MOSFET in this application does not require large GATE currents. Here is the gate current waveform:



The 100 gate resistor, isolates the op-amp from the input capacitance of the MOSFET so it is not necessary to use C-load stable op-amps.


I have attached the expanded LTspice model.

Regards,

Jay_Diddy_B
« Last Edit: November 07, 2016, 09:39:20 pm by Jay_Diddy_B »
 
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Offline BravoV

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Re: Dynamic Electronic Load Project
« Reply #37 on: November 08, 2016, 12:56:34 pm »
Thanks a lot Jay !  :-+ Definitely this will be my nice project for the upcoming end of the year holidays.


This model uses an IXYS generated model for the MOSFET, downloaded from the IXYS website. I am not sure about the small-signal accuracy of this model with low Vds.

What does this mean ?

What do I need to look at, especially low Vds as in testing low voltage power supply ?


A large MOSFET in this application does not require large GATE currents. Here is the gate current waveform:

Is that because we don't need a really-really fast turn on/off ? Say at sub microsecond ?
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #38 on: November 08, 2016, 01:53:05 pm »
Thanks a lot Jay !  :-+ Definitely this will be my nice project for the upcoming end of the year holidays.


This model uses an IXYS generated model for the MOSFET, downloaded from the IXYS website. I am not sure about the small-signal accuracy of this model with low Vds.

What does this mean ?

What do I need to look at, especially low Vds as in testing low voltage power supply ?


A large MOSFET in this application does not require large GATE currents. Here is the gate current waveform:

Is that because we don't need a really-really fast turn on/off ? Say at sub microsecond ?

BravoV and the group,

This my main concern with the IXYS MOSFET model. The datasheet shows this set of curves:



I don't see anything in the model that accounts for the step in Crss. The value of Crss changes by a factor of 10.


Because of this step, the MOSFET behave differently at low voltages, 3V, than it does at higher voltages say 15V. This is why I did the earlier modelling with two different input voltages.

The component values that I have given should be safe. It may be possible to get more performance out of the MOSFET, but that would require bench testing.

In a load like this, the amount you have to change the gate voltage is small. If the transconductance of the MOSFET is 5, that is a change in drain current of 5A for a 1V change in gate voltage. To increase the output current by 5A you have increase the voltage on Ciss by 1V and decrease the voltage on Crss by 1V.

If you wanted to switch this MOSFET with a 400V drain voltage, you would have to charge Ciss with 10V and discharge Crss by 400V, much bigger changes and therefore higher currents.

Here are the waveforms from the model:



Regards,

Jay_Diddy_B



 
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Offline BravoV

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Re: Dynamic Electronic Load Project
« Reply #39 on: November 08, 2016, 02:30:32 pm »
I don't see anything in the model that accounts for the step in Crss. The value of Crss changes by a factor of 10.

Because of this step, the MOSFET behave differently at low voltages, 3V, than it does at higher voltages say 15V. This is why I did the earlier modelling with two different input voltages.

The component values that I have given should be safe. It may be possible to get more performance out of the MOSFET, but that would require bench testing.

In a load like this, the amount you have to change the gate voltage is small. If the transconductance of the MOSFET is 5, that is a change in drain current of 5A for a 1V change in gate voltage. To increase the output current by 5A you have increase the voltage on Ciss by 1V and decrease the voltage on Crss by 1V.

If you wanted to switch this MOSFET with a 400V drain voltage, you would have to charge Ciss with 10V and discharge Crss by 400V, much bigger changes and therefore higher currents.

This reminds me of a famous quote ... "“The more I learn, the more I realize how much I don't know.”  :P

For sure once built, I will definitely report it here on low voltage range < 5 V.

Thank you Sir.  :-+
 

Offline Floyo

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Re: Dynamic Electronic Load Project
« Reply #40 on: November 11, 2016, 07:47:24 am »
Hi Jay_Diddy_B and others,

I was wondering how the loop would change if instead of Fets Bjts were used.
The reason I'm asking is that I have recently come in the possession of a somewhat old multi
channel electronic load using the good old 2N3055 as the pass elements. The control circuit
on these however is a bit crude and non-dynamic and the single turn wire wound pots are shot, so I would like to update it a bit.
Since the beta of the 2n3055 is so low on the biggest channels (9 pass elements, 300w) there are two driver stages, one BD237 and
one 2n3055 driving the others.

I would really like to know how this added gain affects the control loop so I can design a nice new driver board.
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #41 on: November 11, 2016, 07:58:48 am »
Floyo,

BJTs should be good, may be even a little faster than the MOSFETs because you don't have to deal with the input capacitance.

The 'secret' to making a good dynamic load is to make sure that the wiring inductance between the load an the power supply is included in the analysis. I have added an RC damping circuit to help with this.

To recycle the load that you have, I would keep the power stage, any power supplies and cooling etc. and build a new control circuit.

Can you draw the schematic of the power stage?

Regards,

Jay_Diddy_B
 

Offline Floyo

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Re: Dynamic Electronic Load Project
« Reply #42 on: November 11, 2016, 09:11:38 am »
Here is the power stage as I just traced it out, the full schematic I did some time earlier. They might contain some errors, but it seems reasonable. This is of the biggest stages, where the power stage is basically a darlington driven by the bd237, the smaller stages are driven straight by the bd237.
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #43 on: November 11, 2016, 09:18:47 am »
Do you know the value of the shunt?

Regards,

Jay_Diddy_B
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #44 on: November 11, 2016, 02:15:47 pm »
Hi Jay_Diddy_B and others,

I was wondering how the loop would change if instead of Fets Bjts were used.
The reason I'm asking is that I have recently come in the possession of a somewhat old multi
channel electronic load using the good old 2N3055 as the pass elements. The control circuit
on these however is a bit crude and non-dynamic and the single turn wire wound pots are shot, so I would like to update it a bit.
Since the beta of the 2n3055 is so low on the biggest channels (9 pass elements, 300w) there are two driver stages, one BD237 and
one 2n3055 driving the others.

I would really like to know how this added gain affects the control loop so I can design a nice new driver board.


Based on the information in the later posts I have put a model together for a load based on the BJT power stage.

LTspice Model




The M=8 in SPICE means 8 devices in parallel. This saves having to draw all the parallel parts.

Plot V(a)/V(b) to plot the loop gain.

Modelling Results



I have picked component values for the op-amp stage to stabilize the control loop. I also guessed the value of the emitter resistors and the shunt.

I have attached the LTspice model if you want to try other values.

Regards,

Jay_Diddy_B

 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #45 on: November 11, 2016, 02:30:03 pm »
Hi,

This last model didn't look right. I played around a bit and I found that the model for Q3 is probably wrong. If I substitute a different transistor in the Q3 location I get much better results.

I was able to reduce the value of C1 and get more bandwidth.

Modified Model



Results



The performance is the same as the MOSFET load presented earlier.

Remember to check the Safe Operating Area, FBSOA, on the BJT datasheet.

I have attached the model.

Regards,

Jay_Diddy_B

« Last Edit: November 11, 2016, 02:32:30 pm by Jay_Diddy_B »
 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #46 on: November 11, 2016, 02:41:55 pm »
Hi group,

With the 2SCR574D transistor in the Q3 position. Here is the modeling for the time domain.

Model




Results




I have attached the model.

Regards,

Jay_Diddy_B
 

Offline BravoV

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Re: Dynamic Electronic Load Project
« Reply #47 on: November 11, 2016, 03:58:26 pm »
Jay,

Is it ok to replace the pulse generator part with this highlighted ones using simple 555 ics ? without disrupting the control loop ?

I just love the extra adjustabilities like the freq and pulse width.  :P

Its from TI AN-1733.

 

Offline Jay_Diddy_B

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Re: Dynamic Electronic Load Project
« Reply #48 on: November 11, 2016, 04:10:14 pm »
Jay,

Is it ok to replace the pulse generator part with this highlighted ones using simple 555 ics ? without disrupting the control loop ?

I just love the extra adjustabilities like the freq and pulse width.  :P


Yes, you can use the 2x 555 circuit. You may have to play with C2 and C4 to the frequency range and pulse width that you desire.

Regards,

Jay_Diddy_B
 

Offline Floyo

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Re: Dynamic Electronic Load Project
« Reply #49 on: November 11, 2016, 06:59:10 pm »
Hi Jay_Diddy_B,


Thanks for the simulations, that gives me enough info to start
prototyping. The values of the shunt vary quite a bit between the four channels since their ratings are quite different.
The data can be found attached, for completeness sake. The voltage ratings on the channels seem to be chosen so that the rated current produces the rated power dissipation
at that voltage. Keeping in mind the SOA curves they will handle voltages quite a bit higher. I might end up replacing the transistors of some of the smaller channels with some higher VCEmax types, with matching soa to make some higher voltage channels.

I'll have to see if the 1mOhm shunt of the 60A channel gives satisfactory performance at the low end of the scale, if not
I might replace it with something more reasonable for a 20A range or so.

The rest of the load is fine to reuse, it just needs some minor mods to make it become a rather handy tool. The fans in particular will receive some "dimming", 2*20w of fan is *Loud*.

 


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