Electronic Load Project - TLV171 & IRFP250 with KiCad Files

[t1d]

I am posting my KiCad schematic, for my revised personal choices, for Jay’s Dynamic E-Load. Extra proofing, suggestions and comments are v-e-r-y welcome. I will be ordering the board, soon.

The only other thing that has been suggested is adding a switch, to disable some of the MOSFETs, for smaller loads. I may do that.

I would really appreciate someone open the Kicad files and confirming that the custom libraries work.

My choices, based on my stocks, or purchase preferences, are
- Dual power supply
- Dynamic, including an auxiliary input, for a Function Generator
- TLV171 Op Amps
- IRFP230 MOSFETs
- LT1019_2.5v Voltage Reference
- The MOSFETs will be wired directly to the PCB and abutted to the heat sink

The auxiliary input, for the function generator, is a new feature option. I researched it, through an independent thread. https://www.eevblog.com/forum/projects/hacking-a-dynamic-electronic-load-circuit-to-use-an-external-function-generator/
It is based on
- Injection of the FG signal, before the attenuation pot
- Signal diodes, in the controlling op amp and the driving op amps, placed in parallel to the feedback circuit.
- A 50 ohm termination resistor
I do not have the knowledge, to create this feature… I am thankful to those that helped design it.

Kia, over at TI, has modeled the circuit and it should be stable.

I am using a trick, to be able to use a cheap 100 x 100mm Chinese board… I will cut the board into two pieces, overlap them and tie the traces together, with TH pins, to get the length that I need. My heat sink is very long. So, some of the repetitive symbols, on the schematic, are to facilitate that. The remaining netwire connections will be made, by connecting the boards.



I am, presently, writing a tutorial, for this process and will release it, soon. The trick is in how to make the exact placement of the upper and lower pads so that they will line up, perfectly.

Special thanks to Jay Diddy B, Kleinstein, JS, Kia and all the others, who have so graciously helped me learn, understand and create.

Jay’s thread, with various versions; Post #144
https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/125/

You are free to make any and all use, of the files. However, in doing so, you release me from absolutely all liability. I am not an electrical engineer. I do not guarantee that there are no mistakes. You must verify absolutely everything, for yourself. I did not design the operational circuit.

[t1d]

Kia, over at TI, said:
The usual input bias cancelling resistors from the +inputs of TLV171 to GND are not needed when working with the TLV171, though, because the input bias currents are ultra low.
So, those could be removed, and the space and cost saved.

[Kleinstein]

The current sensing resistors are way to small / low power.  For a reasonable control the drop on the resistors should be more like 0.2 - 0.5 V, maybe even 1 V for a low noise version. So the power level actually used would be up to 0.5 -1 W.  To keep self heating effects reasonable small the resistor should be rated to something like 10 times that. So think about 5-10 W resistors. So this os nothing for 0805 form factor SMD, bit more like THT  wire would power resistors like these:
http://cdn-reichelt.de/documents/datenblatt/B400/KH_SERIES.pdf

Besides the power rating one should also have an eye on the TC. Some of the low ohms resistors have rather higher TC - this could be intentional for use as current sharing emitter resistors.

So the board would not be that compact - more like 3 or 4 output channels on a 100x100 mm board. No need to chop the board in pieces.
If more power is needed, use a 2nd identical board with the small input section not populated.

For just a single piece, and a 1 st test one should not make it that extremely small.

[t1d]

Thanks, Kleinstein, as usual, you have great insight. It always takes me a little time, to study out comments, as I am still a bit of a noob. But, in the meantime, I think some e-load designs use this type of current sensing shunt.

I had known that I needed a way to select the number of MOSFETs I was using, based on the test parameters. I really like your suggestion to use multiple boards.

I intend to make a test board, of a single MOSFET. It occurred to me that, if I make it rather nice, there would be no reason that it could not be used, regularly. That would do, for small tests, then, the two/three split, that you suggest, for the big unit. All of those would give me a lot of divisions and total capacity.

I'm still considering all of it. But, I think I am getting closer, truly, thanks to the good help, of folks like you.

[t1d]

Kia, over at TI, said:
The usual input bias cancelling resistors from the +inputs of TLV171 to GND are not needed when working with the TLV171, though, because the input bias currents are ultra low.
So, those could be removed, and the space and cost saved.

I had thought that it would be easy to eliminate the resistor and rearrange the board layout. Well, it is not so easy, with the current layout design goals.

My goal was to have long, compact MOSFET circuit blocks, to move as many components as possible away from the heat sink. So, with that in mind, I don't see a way to move things around that would be of benefit.

The circuit blocks could, likely, be compacted, by widening them. But, this brings more components closer to the heat sink. If others desire to do that, I will leave that to them, to accomplish. The KiCad files should give them a great start, toward that end. As for myself, I think I will just use a zero ohm resistor, to fill the footprint.

[Kleinstein]

The layout would change a little with a larger resistor / shunt.  I think it is still a little early to start with the layout - it helps if one knows the final circuit first  .

I don't think one would need such a large one as depicted - that one is more like a few mOhms for 10s of amps.  Depending on the requirements one can consider using a single good shunt for the combined current and than have cheap individual resistors for the separate MOSFETs responsible for load sharing. This could be interesting of a load made for very high currents. For just a 1 st test I would keep it at maybe 2 MOSFETs.

It helps if one has clear target specs.  In a hobby project these may be more lose, but one still needs to know the possible use and priorities. The next step are than a few possible circuits (e.g. different number of MOSFETs, different OPs, 1 precision shunt vs. totally separate channels)  that can be compared.

[t1d]

The layout would change a little with a larger resistor / shunt.  I think it is still a little early to start with the layout - it helps if one knows the final circuit first.

It helps if one has clear target specs.  In a hobby project these may be more lose, but one still needs to know the possible use and priorities. The next step are than a few possible circuits (e.g. different number of MOSFETs, different OPs, 1 precision shunt vs. totally separate channels)  that can be compared.

This is a true and excellent point. I thought the circuit was complete; it has been released, in various forms, for a little bit of time.

As a noob, I am learning, by relying on the circuits of others and reverse engineering how things function, by making adaptations, to my own preferences. This is an extremely poor means of learning, but it holds my interest. A little learning, a little KiCad work and a little solder smoke... I have health challenges that effect understanding and retention (I don't recommend aging, to anyone) and working, in this way, I am able to learn.

I am working on a single MOSFET model, first. That way, if there is a single problem, it can't be coming from multiples, of the same circuit. It will be easier, to track down, that way.

I don't think one would need such a large one as depicted - that one is more like a few mOhms for 10s of amps.  Depending on the requirements one can consider using a single good shunt for the combined current and than have cheap individual resistors for the separate MOSFETs responsible for load sharing. This could be interesting of a load made for very high currents. For just a 1 st test I would keep it at maybe 2 MOSFETs.

I did not think that actually using this type of shunt was of interest to me, so I did not study out why they were using them... I only saw it a couple of times...

[t1d]

Just for fun... Here is a rough draft, of the single MOSFET layout. It is intended to be used, permanently, without a case. I have a few more traces to run. I will release the Kicad files, when it is complete.

It will be cut, from a 100x100mm board. So, there is lots of room, to add on other circuits, to make a panel, of multiple designs.

[jrsikken]

You may want to look at my most recent version of my Arduino based electronic load.

https://github.com/jrsikken/ElectronicLoadR3

Here I discuss the changes to make it a better device.

I have changed the MCP6002 opamp to MCP6072 to reduce the offset and to make the output voltage swing to GND as low as possible.

I have changed the mosfet to a BTS133 mosfet which is super robust. It has over voltage, over current, over power protection. This is very useful because people will hot plug the power supply under test and then the mosfet is gone. In addition it has ESD and thermal protection. Thermal protection is also very useful because it will save you an extra temperature sensor and thermal protection circuit!

I had oscillation in my constant current circuit (opamp, mosfet, and sense resistor) and so I had tuned the passive components around it to prevent oscillation but for fastest setttling time. I managed to make it settle in 15-20us. Basically now it does pulsed loads. It's fast enough to simluate the 550us wide 2A pulses from GSM modules.

My circuit uses the MCP4725 DAC with I2C interface. Right now DAC output can change voltage about 5000 times per seconds. But I believe I can make it change at 60kHz acording to this forum post. http://www.stm32duino.com/viewtopic.php?t=1048  I have tested this guy his sketch and it outputs a 3kHz sine wave at 60kHz sample rate. I have not tested it on my electronic load yet, but it should be able to output a 3kHz sine wave. Anyway this means any waveshape can be generate by the MCU itself..

[Kleinstein]

There is a good reason that a good quality electronic load should use a reasonable size (power rating) shunt: self heating of the shunt is a serious limitation and making the resistance very small makes the demands on the OPs precision higher. So a miniature 0805 SMD shunt is not a real option for a current sink in the 1 A range - that would be more for the sub 1 mA range.

It usually also take a good precision OP. So the TLV171 is about the lower useful limit in this respect and not a good choice with a small shunt. The voltage at the shunt is still small and this offset, drift but also low frequency noise can be important. The smaller the shunt, the higher the demands on the OP.

The BTS133 might not be a good choice for linear operation as it is low voltage and relatively modern.  It has thermal protection, but I don't see and SOA protection. Large MOSFETs are usually not really sensitive to ESD from drain to source.

[t1d]

There is a good reason that a good quality electronic load should use a reasonable size (power rating) shunt: self heating of the shunt is a serious limitation and making the resistance very small makes the demands on the OPs precision higher. So a miniature 0805 SMD shunt is not a real option for a current sink in the 1 A range - that would be more for the sub 1 mA range.

Thankfully, I discovered that I had specified the wrong size footprints, for the two shunts and the snubber cap.

Here are the comments, from the original thread that were added to the schematic.
All the resistors can be 1%. The cost of 1%
versus 5% is minimal. Most parts can be 0603,
0805 or 1206 whatever you are comfortable
working with. You need 2512 resistors for the
shunts. The 2.2uF/100V should be 100V 1210 size.

All the resistors can be 1%. The cost of 1%
versus 5% is minimal. Most parts can be 0603,
0805 or 1206 whatever you are comfortable
working with. You need 2512 resistors for the
shunts. The 2.2uF/100V should be 100V 1210 size.

I have adjusted the components, on my board, to meet these size specifications. But, I continue to think on the matter.

As for the matter of component tolerances, I am having significant difficulty, finding 1% resistors and capacitors. And, when I do find one, it is ten times the price. The best that I am going to be able to do is 5% resistors and 10% caps.

It is very good practice, to spend a lot of time, going over a board design. I found several other things. You will see those, the next time I post pictures.

Kleinstein, thank you, for your continued help. I appreciate it.

[Kleinstein]

There is absolutely not need for 1% capacitors - 10% is good enough here, and even 50% would likely be OK.

For the shunts size 2512 is a little better, if the layout (copper area) can carry the heat away. Tolerance is not that import, it is more about the TC.
For the shunts it would help to really see what resistors are actually available. One should also check the parameters if they are really suitable (TC low, power rating high enough). For SMD parts the power rating usually requires a rather large copper area, this can be misleading and in sum the 2512 SMD form might need more space than a 10 W THT resistor.

Resistor tolerance would be only relevant for the scale factor of the current readout. If needed this could be adjusted independently.

[t1d]

There is absolutely not need for 1% capacitors - 10% is good enough here, and even 50% would likely be OK.

Great!

Tolerance is not that import, it is more about the TC... One should also check the parameters if they are really suitable (TC low, power rating high enough).

So, for TC, what would be an acceptable number? Looks like, in both footprints, it is mostly 100ppm... Some are less. See TT Electronics, below.

Resistor tolerance would be only relevant for the scale factor of the current readout. If needed this could be adjusted independently.

Do you mean a resistor with an add trimming pot?

How about this, for a wire wound, for the bigger boards?
https://www.mouser.com/ProductDetail/?qs=SpUj42xpVX7KvrMepLk9lQ%3d%3d

How about this, for a SMD 2512, for the single MOSFET test board? These are 2 watts.
https://www.mouser.com/ProductDetail/Bourns/CRM2512-FX-R200ELF?qs=sGAEpiMZZMtlleCFQhR%2fzQ75E81L6H6zZ7KV21VIi2U%3d

The Welwyn/TT Electronics’ model LRMAP-200-FT4 would be the best, of the 2512 footprint… 1%/3w/+/- 50ppm. But, Mouser does not have it in stock.

All said, it looks like the best cost option, even for the test board, is the wire wound model. It is expensive, but, if need arose, it could be moved to a bigger board.

[t1d]

I changed my search perimeters, at Mouser, and came up with some better sink resistor options.

For the test board, I think I will go with this WW, Chassis Mount, 17mmx17mm, 10w, 5%, 50ppm, $3.65USD.
https://www.mouser.com/ProductDetail/279-HSA5R10J

For the bigger board, I am thinking of going with this guys bigger brother, which is cheaper.
WW, Chassis Mount, 29mmx28mm, 25w, 5%, 50ppm, $2.73USD.
https://www.mouser.com/ProductDetail/279-HSA25R10J

For the two above, Mouser mistakenly has a sale flyer, for the Data Sheets. Find the data sheets, here.
https://www.te.com/commerce/DocumentDelivery/DDEController



I even found an interesting SMD, 2818, 10w, 1%, 75ppm, $1.28USD.
https://www.mouser.com/ProductDetail/71-WSHP2818R1000FEA

[t1d]

This is very close to finished. There are only two considerations, before printing the board on paper and confirming the component sizes…

1) Should the FG Aux Input BNC be turned toward the front, or the side, as pictured? I say the side, to keep the front uncluttered, as the FG will be only occasionally used. What do you think and why?

2) I would like to add a 12vdc output, to drive a cooling fan. But, I am not sure how to create the PSU, for it, because it needs a full bridge rectifier and there is already a half bridge rectifier on the board. Crossing up the ground with the negative source is the concern. See picture.

I will be researching this. If you know the solution, please clue me in… Maybe, use the rectified +9vdc and -9vdc, being 18v and regulate that? Input = +9vdc, ground = -9vdc, output = 12vdc, with the fan input 12vdc and fan ground tied to circuit ground?



I am using these trace sizes…
- 25mils, for the input signal.
- 50mils, for the first op amp’s output, to the second op amp’s input.
- 75mils, for the positive and negative power legs.
- 125mils, for the DUT load.

Here is the schematic and board. Please help me proof them. The more eyes, the better.

Thank you, for your help.

[t1d]

Oops, I see that I have forgotten the DUT Load Fuse, yet again. I will add it, right now.

[t1d]

Updates to the Test Board Design...
1) Shunt resistor footprint tweaked
2) Power input components relocated farther away from heat sink
3) Power and signal ground planes separated
4) Ground plane backed away from heat sink
5) Auxiliary fan power connector added

A couple of considerations
1) The MOSFET ratings are for AC power. I understand, that when used in DC circuits, they should be derated sixty to seventy percent. The advertised ratings are 200v and 30a. At a case temperature of 150*C, the amperage rating drops to 12.5a. If I get 3a and 30v out of it, I will be extremely pleased. What do you think?
2) The fan supply is 12v, half wave. This makes for a 50% duty cycle. So, I can either use a 12v fan and suffer the duty cycle speed decrease, or, maybe, use a ~10v zener clamp, and a 5v fan. My noob brain wonders which would create more airflow... Thoughts?

I am putting together the release of the KiCad files, for the test board. Have I forgotten anything?

[Kleinstein]

The MOSFET ratings are usually not for AC, but in most cases maximum values for one parameter at a time. So maximum current with good cooling (low temperature) and fully switched on. The maximum voltage is in Off mode, or very small current.

For the electronic load it would be the DC (forward biased) SOA that matters, at a higher temperature (e.g. around 50 C case).

For a TO247 MOSFET, 90 W is already quite a bit and would requite a very good heat sink (e.g. fan with high air flow).  So I would be a little more conservative and use only around 2 A, maybe 2.5 A if the voltage is really only 30 V max. Besides the thermal limit, there could be stability limits of the SOA at more than about 30 V. So 1 A to 60 V is way more critical than 2 A at 30 V. One has to remember that not all sources specify an DC SOA - so nothing is for sure. One should definite do a test (possibly destructive for the FET) before real use. The smaller the allowed load the less likely is a failure of the FET.  The good thing in that unless very much on the edge (which is unlikely) the test should not do harm to a good transistor, but only blow a bad one.

It depedends on the fan how well it works with a half way rectified supply. Many fans with BL motor have an buffer cap inside an would thus run not much slower, but mainly put strain on the transformer, diode and capacitor. A simple resistor or low voltage zener in series might be better to reduce the speed.

[t1d]

Kleinstein, it is good to hear from you. I was hoping you would stop by. I can always count on you, for good information. I think I will add footprints, for a few optional passives, in the fan leg, and call it done.

[t1d]

I have ordered the needed parts to assemble the single MOSFET test model. When they arrive,  I will print the board, to scale, on paper and confirm the footprint.

I am confident, enough, that there will be no problems, to release the Single Model KiCad files, now. The zip will include the complete KiCad project files, including custom symbol and footprint libraries. Get the schematic and board, as jpg, here.

The zip file is too big, to combine it with other attachments. You will find it, in a separate, following post.

You will see that I fully developed the Full Wave Fan PSU.

[t1d]

You are free to make any and all use, of the files. However, in doing so, you release me from absolutely all liability. I am not an electrical engineer. I do not guarantee that there are no mistakes. You must verify absolutely everything, for yourself. I did not design the operational circuit.

EDIT: I see that I left off the resistor value, for the current sink resistor. I have updated the files, for that.
HSA10R10J = 0.1R @ 10w. I also added the custom library paths...

EDIT #2: The pinout for Pot1 is set for CCW operations. This is a mistake. You will need to rotate the pot symbol, on the schematic, to swap pin 1 and 3, rebuild the netlist, read the new netlist, into the board, and correct the traces, on the board. As this is a test board, I will not be modifying the files. You can do that, if it is important to you.

EDIT #3: KiCad does not show the values/names of the MOSFET and the BNC connector, on the PCB board editor image, or on the Gerbers (IIRC.) But, they show up, in manufacturing. The fix is to edit these two components and make their values/names invisible, or place them, in a clear spot.

[t1d]

I am also working on a Two MOSFET layout. I am wondering, if I can use a single, 0.1R/25w, sink resistor, for this design. See drawing. Do I have it drawn correctly? If not, how should it be?

[Kleinstein]

One can use a single sense resistor. However one would still need additional individual source resistors. There would be one loop (OP) to control the overall current and a second OP to make sure the current sharing is working. The OP for the current sharing does not needs to be as accurate and fast as the one for the sum. The resistors for current sharing can also be lower grade and lower power.
So a single sense resistor version can make sense if high accuracy is wanted and thus an expensive shunt is used, precision OPs (e.g. OP27) are not that expensive anymore that it really matters.
A downside is that the main current regulator would need to drive 2 gates with quite some capacitance, which can make the whole thing slower. There is also a higher minimum drop, due to the extra source resistors.

The plan as shown has another error: The upper power stage input is connected wrong, it should have a separate resistor similar to R9.

[t1d]

Thanks, Kleinstein!

One can use a single sense resistor. However one would still need additional individual source resistors. There would be one loop (OP) to control the overall current and a second OP to make sure the current sharing is working. The OP for the current sharing does not needs to be as accurate and fast as the one for the sum. The resistors for current sharing can also be lower grade and lower power.
So a single sense resistor version can make sense if high accuracy is wanted and thus an expensive shunt is used, precision OPs (e.g. OP27) are not that expensive anymore that it really matters.
A downside is that the main current regulator would need to drive 2 gates with quite some capacitance, which can make the whole thing slower. There is also a higher minimum drop, due to the extra source resistors.

While I can follow what you are saying, this would be beyond my (present) skill set. Maybe you would like to sketch it out?

The plan as shown has another error: The upper power stage input is connected wrong, it should have a separate resistor similar to R9.

This is the correction...

[t1d]

The parts arrived. I printed the board layout, on paper, and verified all the component sizes. Various layout tweaks, followed.

This is what I intend to be the final design, before ordering the Single MOSFET Test Boards. I am using this post, to show the layout, and bump the thread, to ask for a final review, by everyone.

Kleinstein, does any of this apply to the single MOSFET version?

One can use a single sense resistor. However one would still need additional individual source resistors. There would be one loop (OP) to control the overall current and a second OP to make sure the current sharing is working. The OP for the current sharing does not needs to be as accurate and fast as the one for the sum. The resistors for current sharing can also be lower grade and lower power.
So a single sense resistor version can make sense if high accuracy is wanted and thus an expensive shunt is used, precision OPs (e.g. OP27) are not that expensive anymore that it really matters.
A downside is that the main current regulator would need to drive 2 gates with quite some capacitance, which can make the whole thing slower. There is also a higher minimum drop, due to the extra source resistors.

The plan as shown has another error: The upper power stage input is connected wrong, it should have a separate resistor similar to R9.

Thanks to everyone, for your continued help.

[Kleinstein]

The comments cites do not apply to the single MOSFET version. The problem was with the first 2 MOSFET version.

For the board shown the fuse is rather small  - I am not a fan of those tiny fused.

[t1d]

The comments cites do not apply to the single MOSFET version. The problem was with the first 2 MOSFET version.

I thought so.

I am really excited, to be moving on to the prototype stage; I like building, the most. I will do some hardware testing and post the results. If it goes well, maybe I will build a two, or three, MOSFET model. I would need your help, to make the design corrections, that you mentioned.

For the board shown the fuse is rather small  - I am not a fan of those tiny fused.

I agree, but this is just a model... I don't intend to even put it in a case. So, I cheaped-out, on a fuse holder...

Kleinstein, thank you, so much, for all your support, throughout development. You have taught me tons and I am grateful.

I will likely have several extra test boards, if anyone would like one. Just let me know and we will work it out.

[t1d]

Just an update, to say that I have ordered the boards... Woot!

[t1d]

The test boards are to arrive Wednesday, afternoon. That's just 12 days, to have it produced, by Seeed, and delivered, by DHL.

I have also been working on a Two-MOSFET design. What are everyone's thoughts on it? Particularly, the board layout...

[t1d]

I already noticed that I had not included Kleinstein's larger fuse... So, here's that correction... I am still fiddling with it...

[t1d]

The panels did come, yesterday. They took just 12 days, to arrive at my door. The panels look fantastic. I cut up several, with my PCB Tile Saw.

Today, I rechecked all the passive components' values, again. Then, I assembled a single-MOSFET, e-load board, completely; SMD baking and Through-Hole hand-soldering. It looks great! Everything fit, perfectly. There were not any challenges, in the assembly process. I'm sorry, but I do not have a camera, with which to make pictures, to share.

I'm too tired to test it, tonight, but I will, soon. Woot!

[t1d]

I have played with the e-load, a bit. The setting on the DUT PSU was 1v/1a. I did not receive instant joy, at power up.

All of the power supplies (+9vdc, -9vdc, 2.5vref) look correct, all the way to the op amps. A sine wave, of 4mV amplitude was found, on the oscilloscope, at x10, 20mV/D, 0.25mS/D. I forgot to determine its duration; doh...

The output/Pin#1 of the driver op amp appears to be operating (correctly?) When the pot is advanced, the output fluctuates in the direction of change and, then, steadies itself and returns to the baseline (without the need of resetting the pot.)

However, the output/Pin#1 of the load op amp appears to be operating incorrectly. On the oscilloscope, the slightest advancement of the pot causes the output to leap off the screen and I can not find it, wherever it goes... My Tek2215/60MHz scope just may not go fast enough to find it.

Absolutely nothing heats up.

I was not trying to make a serious test. I will do more testing, in a more formal manner, when I feel better.

EDIT: I discovered that the pinout on Pot1 is reversed and is operating in a CCW manner. So, where I said I was advancing the pot, I was actually decrementing it.

[t1d]

EDITED: 11/4/2018

"Load Me Up!" E-Load Testing

Settings
DUT PSU 1v/1a
Tektronix 2215/Analog/60MHz
Oscilloscope Probe x10

All of the supply voltages, +9v, -9v and 2.5vref, test as good.

Initial Issue Found – The input pin of the MOSFET did not have connectivity. I don’t know, if I lifted the pad, or if the PCB was defective. I bodged this, with a bit of wire.

Operations improved. Current now sinks over the range of 0 to 0.0112, in volts, on my DMM. This equates to ~0.10 current draw, as confirmed by the PSU current meter.

DMM Readings – The Driver Op Amp output voltage sweeps from 0v to (Neg)-2.47vdc and seems to have no problems. The Load Op Amp output voltage only sweeps from -107.mV to 0.006 volts and then jumps to 8.87vdc. For the Load Op Amp, you only have to move the pot a very small amount, to reach 0.006 volts.


Oscilloscope Readings – Errant wave forms begin to appear, when the Probe Return/GND is attached and before the Probe pin is even applied. After the Probe Pin is applied, the errors become more clearly defined. See Load Op Amp, below. The big cap (C14/2200uF/25v,) for the cooling fan, effects the probe, when it is in close proximity, even though a fan is not connected.

With the Scope Probe Pin applied, the Driver Op Amp output exhibits a clean voltage line, throughout a voltage pot sweep.

The Load Op Amp exhibits various issues:
- After 0.006 volts, the Load Op Amp signal jumps and disappears. The output voltage jumps to 8.87vdc.
- There is a sign wave of 0.2/uS/D x 2.66 divisions = 5.32uS, having an amplitude range of -20mV to +20mV.
- There is a recurring ring of 0.5mS/D x 3 divisions = 1.5mS, having an amplitude range of -20mV t0 +20mV. This ring repeats approximately ever 4mS/pp 4 divisions, peak to peak. Today, only one ring reproduced. It had approximately one-half, of the amplitude, of the first ring.

As my oscilloscope only has a 60MHz bandwidth, I may not be able to see other problems.

Conclusions – The e-load can only sink up to one-tenth amp. The Driver Op Amp appears to be operating properly. The Load Op Amp appears to crash, when an output voltage of 0.006 volts is attained. It is possible that the capacitive field, of the fan cap, could be effecting the Load Op Amp. But, the Driver Op Amp is also in close proximity and it does not seem to be effected. None of the PCB components heat up.

So, I sure could use suggestions for repairs and additional testing. I look forward to hearing your ideas.

[Kleinstein]

Were is the circuit are the driver and load output OPs.  The OP driving the MOSFET should be at some 1-5 V (actual range is smaller and depends on the MOSFET) at the output. The OP before that should be only influences by the setting of the pot and could be best tested without anything at the "output".

When not attached, the scope probe can pick up some capacitive coupled background. If it is a lot, this can indicate either the circuit oscillating or external disturbance, e.g. from a SMPS.

A 60 MHz Scope should be well fast enough. The main frequencies to worry about are 60/120 Hz and maybe some 100kHz-1 MHz.

[t1d]

Hi, Kleinstein, I sure am glad to hear from you!

Were is the circuit are the driver and load output OPs.

I am not sure what you are asking, here. I think you are asking me what were the voltage outputs of the driver and load op amps. If so, I have retested and made some small corrections and additions, to my post, from yesterday. If what you need to know is not there, now, please ask, again.

The OP driving the MOSFET should be at some 1-5 V (actual range is smaller and depends on the MOSFET) at the output. The OP before that should be only influences by the setting of the pot and could be best tested without anything at the "output".

Here are my notes, about that:
DMM Readings – The Driver Op Amp output voltage sweeps from 0v to (Neg)-2.47vdc and seems to have no problems. The Load Op Amp output voltage only sweeps from -107.mV to 0.006 volts and then jumps to 8.87vdc. For the Load Op Amp, you only have to move the pot a very small amount, to reach 0.006 volts. Note that the Driver Op Amp sweeps negative.

When not attached, the scope probe can pick up some capacitive coupled background. If it is a lot, this can indicate either the circuit oscillating or external disturbance, e.g. from a SMPS.

The power source is a heavy, block wall wart. I am rather confident that it is a transformer type. It is mounted at the power strip... meaning that the transformer is not in the proximity of the PBC.

A 60 MHz Scope should be well fast enough. The main frequencies to worry about are 60/120 Hz and maybe some 100kHz-1 MHz.

See the prior post, for the disturbance information.

So, my guess would be either the Driver Op Amp should not output a negative voltage (that does not seem likely, because the Load Op Amp is going positive, as it should,) or the signal disturbances are sufficient to cause problems. What could I try, to eliminate possibilities?

Thank you, so much, for your continued help and support!

[GigaJoe]

I'm wonder,  if opamp that manage mosfer has enough power to discharge irfp cap in dynamic mode ,  I did same thingi + tr. emmiter follower  on opamp output, to unload opamp  and speed up process , when square input, resistor 10ohm instead 100

[t1d]

I'm wonder,  if opamp that manage mosfer has enough power to discharge irfp cap in dynamic mode ,  I did same thingi + tr. emmiter follower  on opamp output, to unload opamp  and speed up process , when square input, resistor 10ohm instead 100

I can understand a little of this, but it is really above my knowledge.

I have not used a dynamic signal for testing. I just used my bench power supply, set at 1v/1a, run through a 10 ohm resistor, to the DUT input.

Which resistor reference number(s) should I try reducing? R6, I think? The single MOSFET schematic is at Post #19.

Do you think this will correct the existing operational problem? Or, is it just an observation.

Thank you, for your help.

[Kleinstein]

With only a 1 V source and a 10 Ohms series resistor, the maximum current is limited to some 100 mA. With a 0.1 Ohms shunt, this means a maximum of 10 mV at the shunt to get to saturation.  So the range is very limited.  Getting the MOSFET to saturation will cause the voltage to shoot up to something like the 8.x V.  This is about normal. Limiting the voltage to only 1 V is a little overly cautious and leave very little room for the circuit to work.


The "driver" OP - this seems to be the one that provides the negative set point is OK to provide a negative voltage, because the output stage is build o work inverting.

The "load" OP seems to be the one that does the actual current regulation. It might be oscillating or pic up some disturbance and this way goes to it's limits (positive or negative) rather fast.

Because of the small voltage levels one might need to keep hum out, e.g. by having a groundes metal case or at least something like metal plate below the circuit.

For a first test one could try to start with a slower version, by adding an additional capacitance (e.g. 10 nF)  in parallel to the 220 pF feedback capacitance. This should make it less sensitive to oscillation, though slower.

[t1d]

With only a 1 V source and a 10 Ohms series resistor, the maximum current is limited to some 100 mA. With a 0.1 Ohms shunt, this means a maximum of 10 mV at the shunt to get to saturation.  So the range is very limited.  Getting the MOSFET to saturation will cause the voltage to shoot up to something like the 8.x V.  This is about normal. Limiting the voltage to only 1 V is a little overly cautious and leave very little room for the circuit to work.

Okay, I will increase the voltage and try again. But, IIRC, I had the exact same performance at 1v/1a, without the resistor.

The "driver" OP - this seems to be the one that provides the negative set point...
The "load" OP seems to be the one that does the actual current regulation.

Yes, this is proper understanding of the names I am using. Are there better terms, for these?
 

Because of the small voltage levels one might need to keep hum out, e.g. by having a groundes metal case or at least something like metal plate below the circuit.

I still have concern that the load op amp may be effected by the big fan cap. I think I will remove it, for testing. What do you think?

I also read about adding inductance, in series with the MOSFET gate. What do you think about that?
“Ferrite beads are very effective at eliminating parasitic oscillation while minimizing switching losses, because they act like a frequency-dependent gate resistor.”  https://www.microsemi.com/document-portal/doc_view/14693-eliminating-parasitic-oscillation-between-parallel-mosfets

For a first test one could try to start with a slower version, by adding an additional capacitance (e.g. 10 nF)  in parallel to the 220 pF feedback capacitance. This should make it less sensitive to oscillation, though slower.

I will add this, to the testing.

Thank you, for your great help.

[t1d]

Success!

Kleinstein pointed out that I was starving the load and that I needed to add more voltage. I did so and the unit began to perform as expected. Woot! I made no other changes.

I only took the load up to 5v/1a (without the 10 Ohm resistor.) The FET warmed, maybe to around 110*F, i.e., hot to the touch. So, higher load testing will have to wait, until I build out the cooling fan assembly.

Conclusions:
There was nothing wrong, with the circuit design, from the start. After the FET gate trace was repaired, the unit operated correctly. All confusion, thereafter, was due to (my) operator error. I just needed to let the big dog eat. ;-) Thanks, Kleinstein, for straightening me out! My guess is that it will handle 30v/2a, but I make no guarantees.

It is clear that a ten-turn pot is a necessity. I will change it out.

This will be an opportunity to swap the wires, so that the pot operates clockwise. I have added instructions, as how to make this correction, in the KiCad schematic, at the previous post containing the files, so that the PCB board will be manufactured correctly.

Okay, I could not be more pleased than if I had made an LED blink, for the first time. Woot! Fun! Exciting!

P.S. This is a test board, for the design. A two-MOSFET model will be going to the board manufacturer, very soon.

If you would like one of these Single-MOSFET Test PCB boards, send me a PM... Actual shipping cost and, maybe, a few bucks, to help with the manufacturing costs? But, I will not charge any profit. Releasing me from all liability is required.

If you need help with the cost, please, just say so, and why. I want to encourage anyone and everyone, as appreciation, for all the support I have received, myself. I would think we can find a way...

Remember, this board uses SMDs, so factor in your skills. Actually, SMDs are really easy to handle, by several means. I would not let that hold you back. I can talk you through it... Hand-soldering, heat gun, clothes iron... There are lots of tricks that work well.

I do not have a camera, but I hope to add pictures, soon.

[t1d]

I forgot to mention that it seems to take a few seconds, for the op amp to rise up to a new current setting. What should I be expecting? What test procedure should I use to test this performance?

I can not find my old web cam. It is very likely that I threw it away. And, the one on my cell phone does not work. So, I may not be able to post pictures. That's a shame, because it looks pretty neat...

Thanks.

[t1d]

A friend was kind enough to make pictures...
Board on test stand... Fan yet to be attached...
82mm x 69mm = 3-1/4" x 2-3/4"





Can you find the two tiny op amps?

[Kleinstein]

The 2 FETs version still has a mistake in the last plan. So I would not rush to ordering a 2 nd board.

If just a little more power is needed, one could still add a second of the 1 FET versions, using only a part of the circuit (e.g. mainly the load section).

The first measurements showed that to low voltage for the source could be a problem. So for the next version it might be a good idea to have at least a warning LED to see if there is a problem with "starvation" / saturation of the FET. One might also want an adjustable limit for the gate voltage, so that in case of saturation the voltage does not go up way to far. This is because it can cause some possible problem. If one first sets the current sink to a given (even low) value and only than connects the source, this current will initially be very high and only after some 10-100 µs (depending on the circuit) will reach the set value.  The same type of trouble could also happen if the source is disconnected for some time (e.g. a poor contact).  This is a relatively difficult problem to solve and even commercial load circuits may not have good fix here, but it still would be a good idea to have at least some counter measures to limit the current peak.

[t1d]

The 2 FETs version still has a mistake in the last plan. So I would not rush to ordering a 2 nd board.

I am rather careful to copy, study and employ your notes. I think I have probably already made the corrections and just did not post the updates, because I was working on the Single-MOSFET model. What is the posting number and I will double-check.

If just a little more power is needed, one could still add a second of the 1 FET versions, using only a part of the circuit (e.g. mainly the load section).

You had suggested this approach, before, and I am planning on using multiple boards... One Single-Mosfet and one Double-Mosfet. This will give many combination options.

The first measurements showed that to low voltage for the source could be a problem. So for the next version it might be a good idea to have at least a warning LED to see if there is a problem with "starvation" / saturation of the FET. One might also want an adjustable limit for the gate voltage, so that in case of saturation the voltage does not go up way to far. This is because it can cause some possible problem. If one first sets the current sink to a given (even low) value and only than connects the source, this current will initially be very high and only after some 10-100 µs (depending on the circuit) will reach the set value.  The same type of trouble could also happen if the source is disconnected for some time (e.g. a poor contact).  This is a relatively difficult problem to solve and even commercial load circuits may not have good fix here, but it still would be a good idea to have at least some counter measures to limit the current peak.

Good ideas!

[t1d]

The 2 FETs version still has a mistake in the last plan. So I would not rush to ordering a 2 nd board.

Ah... Yes, the need for two resistors, on the Driver Op Amp output. That has been corrected, but I had not posted the new schematic.

I don't remember the second item. Was it how to deal with just using one shunt resistor? If so, I just reverted to using Jay's multiple shunt resistors design.

Here's the update. Please give it a look.

[Kleinstein]

The new circuit looks OK, at least the 2 obvious errors are gone.

The heat sink on the 1 FET version is still relatively small. So 30 V and 2 A and thus 60 W would need a good fan.

One should also to a few more tests, to see if the load is also stable with a not so well behaved source. Regulation gets more tricky with some inductance in series.  If you have a suitable generator, one could also check the step response, to see if there is ringing when the source voltage changes fast.

[t1d]

The new circuit looks OK, at least the 2 obvious errors are gone.

Great! Phew... I feel better that I didn't miss any of your wonderful instructions.

The heat sink on the 1 FET version is still relatively small. So 30 V and 2 A and thus 60 W would need a good fan.

Agreed and I do have one that would be perfect, for this test bench arrangement. However, I would still worry that it is too small. So, I think I will put it into my lab-type case. Actually, doing this should be easier than adding the fan to the test block.

This is the case that I built, for an earlier design, that I did not end up using. (I think you helped me, on that thread, too.) It is a repurposed rack-mount, 100 watt stereo amplifier case. I gutted it and only kept the huge heat sinks. One HS is still in the box. I attached a 120v computer case fan. I think the case HS and fan will handle one Single-MOSFET and one Double-MOSFET board and give me a lot of combination options.

One should also to a few more tests, to see if the load is also stable with a not so well behaved source. Regulation gets more tricky with some inductance in series.  If you have a suitable generator, one could also check the step response, to see if there is ringing when the source voltage changes fast.

Good advice and I wholly agree. I plan to test the auxiliary Function Generator voltage reference input. I will also test the DUT Input, with a frequency. But, I may need to figure out how to amplify the signal, beyond what the FG can provide. I do not have an amplifier, of any sort, presently.

I just want to say "thank you," once again. Without you, this project would have never moved forward. By sharing your knowledge, time and effort, you have enriched my life. I am truly grateful.

[t1d]

I am holding off, on further testing of the Single-MOSFET test design, because of a lack of sleep caused by health issues. In the meantime, and just for fun, here is the current proposed layout, for the Double-MOSFET version. It is greatly improved, over the Single-MOSFET test design, thanks to suggestions made by JS. It is only very slightly larger than the Single-MOSFET test design board.

The blue ground plane indicates that the ground plane has been moved to the bottom.

As is, the 12vdc supply, for the fan, is actually a fully rectified 12vac, which is approximately 12v x 1.4 = 16.8vdc. This voltage will have to be regulated down to 12vdc. What options are there to making the board bigger and adding a 7812 regulator circuit? A zener clamp won't provide enough current, I don't think...

And, I am thinking on using a single power supply circuit, to supply multiple e-load boards. Does anybody know of 9vdc and -9vdc regulators that will provide a minimum of 2 amps? 3 or 4 amps would be better..

I still need to confirm that the locations of the current sense and shunt resistors are adequate. Any comments, in that regard, or other matters, would be greatly appreciated.

[Kleinstein]

The supply for the circuit does not need much current. So I don't see a real need for a high current regulator.

The 2 MOSFET version uses relative low power Shunts, so this would mean a rather low drop at the shunt and thus not very precise regulation.
The Shunts are also rather close to the MOSFETs, so there would be extra heat in this area. Those SMD resistors only get there nominal heat resistance with a relatively large copper area - so 2 SMD resistors close together only provide a slightly higher power rating, not twice the value.  So the size for the SMD shunts is misleading - it's not just the small chip, but should include 1-2 cm² or copper on the board.
We had that discussion before and there is a reason the commercial electronic loads usually use quite large shuns, like quite a large (e.g. maybe bare wire shunt extending well above the board. So the resistor size for the 1 FET version is not that bad.

The position of the shunt's, shape of the ground plane is also not really good, especially for the left channel there is no clear, direct ground connection from the shunt to the OP. For a precision circuit a ground plane can be tricky, as it gets difficult to see where the current actually flowing. So a ground pour is a poor ground if there are cuts from other traces.

I don't understand the desire to make an electronic load so small - with power electronics is helps to have the heat sources a little apart. For a prototype is also helps if there is at least space for the probes and space for possibly needed bodges.  A 7812 for the voltage regulation is large enough. If really on the squeeze one could add some  resistance between the rectifier and cap to improve on the power factor and this way reduce the raw voltage and get away with less heat from an LDO.

[t1d]

I just love your insights, Kleinstein. Excellent, always excellent. I wish you were my next door neighbor... LOL.

I have changed the v ref component, on the schematic. The new one is better, for this application, IMHO. Cheaper, I think, and less complicated. This changed the component reference numbers.

The supply for the circuit does not need much current. So I don't see a real need for a high current regulator.

I was thinking to try to use the 12v positive regulator, for the fan, too. But, this would put quiet different loads on the positive and negative regulators and that might not be a good thing?

The 2 MOSFET version uses relative low power Shunts, so this would mean a rather low drop at the shunt and thus not very precise regulation.

Well, I had wanted to use a higher wattage, single resistor, just like the single-MOSFET version, only slightly larger. From your earlier reply, about that, I thought you said that this wasn’t a great idea. Did I misunderstand? If so, what would needs to be done?

If a single shunt is difficult, or costly, I think, IIRC, that the cost of the first single shunt was not too bad. So, I would use two of those, instead of the SMDs.

The Shunts are also rather close to the MOSFETs, so there would be extra heat in this area. Those SMD resistors only get there nominal heat resistance with a relatively large copper area - so 2 SMD resistors close together only provide a slightly higher power rating, not twice the value.  So the size for the SMD shunts is misleading - it's not just the small chip, but should include 1-2 cm² or copper on the board.

We had that discussion before and there is a reason the commercial electronic loads usually use quite large shuns, like quite a large (e.g. maybe bare wire shunt extending well above the board. So the resistor size for the 1 FET version is not that bad.

Designing to have a tight board stemmed from the op amps requiring the shortest trace runs possible, the habit to limit board cost and the dimensions of the (cheap) flat-rate 100mm x 100mm boards. But, you are exactly correct. I will spread things out, a bit.

The shunts were moved to the FETs, because I thought it would improve accuracy. Does their location matter, other than providing them with enough copper and keeping them away from other heat sources? These two concerns are why the one-FET version had the shunt placed away from the FET. What about the long traces, for them?

The position of the shunt's, shape of the ground plane is also not really good, especially for the left channel there is no clear, direct ground connection from the shunt to the OP. For a precision circuit a ground plane can be tricky, as it gets difficult to see where the current actually flowing. So a ground pour is a poor ground if there are cuts from other traces.

Agreed. I moved the ground plane to the bottom, to try to improve directional access, but it did not help. I really don’t know what else to do. A multi-layered board is just too expensive, for me, for a hobby project.

I don't understand the desire to make an electronic load so small - with power electronics is helps to have the heat sources a little apart. For a prototype is also helps if there is at least space for the probes and space for possibly needed bodges.

Agreed, per above.

A 7812 for the voltage regulation is large enough. If really on the squeeze one could add some  resistance between the rectifier and cap to improve on the power factor and this way reduce the raw voltage and get away with less heat from an LDO.

I do not know this trick. Is there a name, for the technique, so that I could look it up, to study it?

Thinking on cost... As usual, DIY (especially DIY development) is not necessarily cheaper than a manufactured unit. But, I do it, for fun and education. From that perspective, it is a good value...

As always, I am s-o-o grateful. Thank you.

[t1d]

Just sharing, here..

I took a current reading, of the circuit's draw at 5v/1a = 0.0199a. This was an ac reading and my first (ac reading.) I have a Brymen 869s DMM and it does all the ac computations (very accurately.)

I still want to put the PCB in the case, for the advanage of the powerful, 120v fan, and run the wattage up. I will check the draw, at the upper limit, too.

[Kleinstein]

There usually is no need for a high power fan. The worst case power per MOSFET is around 60-100W - so a usual computer fan (e.g. 120x120 mm² and usually around 1-5 W) should be large enough.

The Electronic load circuit is usually a rather simple circuit, so that for a small version with 1 or 2 MOSFETs a prototype board can be sufficient. It is not that fast that short distances are really important. The OPA172 is relatively fast, but only chosen because of relatively low noise (and single supply), not for speed. The other end would be the classic OP 07 here the speed may be at the low end, but it can still work well.

For the shunts some extra distance to the MOSFETs can help to keep the temperature low.  If done right, the extra trace resistance kind of adds to the R_On of the MOSFET, but should not directly cause an error. The point is to keep the trace from the shunt to ground short and low resistance - here some errors might come in, though there are ways too to reduce this error.

The shunt can be a costly part. This is the reason why one might consider a version with only 1 good shunt for the main control loop and 2 auxiliary resistors responsible for current sharing only.  However with just 2 MOSFETs I tend stick to the simple case with 2 shunts.
The shunt used in the first version is reasonable choice for a low cost version - not really instrument grade, but definitely OK for a DIY version with limited accuracy (the OPA172 is also not very precise). The higher power rating can compensate the not so great TC to some extend.

[t1d]

Thanks, Kleinstein. I will spread out the components and run the new layout by you.

[t1d]

I have made some good progress, on both sides of the project... Single-Fet testing and Double-Fet layout development.

I decided to not install the test board, in the permanent case. I took Kleinstein's advice and just attached a 12v, 80mm x 80mm fan, to the test jig.

The board rectifies the fan supply, to dc. But, it does not regulate it. So, I needed to add the regulator. I bodged one up, out of used parts. The total draw, of the fan circuit that I added, after the rectifier and before the regulator, at a 5v/1a load, is 0.1105a. When added to the prior complete circuit test, at the 5v/1a load, the total draw should be 0.1304a.

I am considering adding space, for a fan regulator, on the board. Now that I have increased the size of the Double-FET board, I should be able to work it in.

According, again, to Kleinstein's suggestion (This guy knows so much!) I spread out the Double-FET board, to the full size, of a 100mm x 100mm, flat-rate board. I also changed the shunt resistors to the single-per-MOSFET HSA10R10J-0.1R-10w, as used on the Single-FET test board.

I am pleased with the layout. If Kleinstein gives the thumbs-up, the board will nearly be ready to order, after fulling testing the test rig.

[t1d]

I am about to push the load, to find the test rigs upper capacity. I propose to find that limit, by watching the heat level, of the MOSFET. IIRC, it is good, to 125*C. So, maybe 100*C would be an appropriate safety margin.

Is using the MOSFET heat level a reasonable means to finding the rigs abilities? Of course, looking at the signal, at that level, too. I would think that observing how that much heat effects the rest of the board would be important, also.

[t1d]

I arranged a nice setup, to do the load/temperature testing. However, getting the thermocoupler wire to keep contact with the face of the MOSFET was a bit fiddly...

My top sunken wattage was just 5v x 2.0a = 10 watts @ 34.7*C/94.46*F. The fan cooled very well.

I was not able to go further, because my PSU started to go into constant current mode, at 2.14a. I am sure that I can put my two power supplies in series, to come up with more wattage. But, I doubt, even with the two of them, that I will be able to get up to the top limit the e-load can handle. I would think that the second unit could only provide 10 watts, similarly to the first... That would only make 20 watts. Any suggestions on how to safely get more wattage would be appreciated.

[Kleinstein]

Testing the limits is rather difficult, as this test tends to be destructive. At least it gets rather difficult to find the edge of the SOA curve. In addition there is quite some scattering between the parts. So some may be good for 150 W and other may fail at 80 W.

The temperature measurement is more like a test for the fan and heat sink. So it still makes sense, but this would be more for the safe  design limit. Here I would consider something like 70-80 C the upper limit for the MOSFETs.

With forces air cooling, the temperature rise is about proportional to power. So one can do the test with less power. The upper limit is not such a well defined limit anyway, as there is quite some safety margin included. It is only the check of the SOA at higher voltage that should be done with the full power - as this is for checking for a possible faulty, weak MOSFET.

[spec]

+ t1d

Just been reading this thread with interest.

Maybe I missed it, but can I ask what your design objectives are for the load.
What is the maximum load voltage?
What is the maximum drain current through each IRFP250N?
What is the maximum power dissipation of each IRFP250N?
When the IRFP250N is dissipating maximum power what is the maximum VCE of the IRFP250N? 













;

[t1d]

Welcome, Spec! I am glad you have joined in; I can use all the help I can get. lol.

I am hopeful that
- the Single-MOSFET test board will handle 30v/2a = 60w and
- the Two-MOSFET final model 30v/4a = 120w.

The original circuit was developed by Jay-Diddy-B. His thread link is in a prior post. It is easily adaptable to your choice of Op Amps and MOSFETs. It is also easily scaled up, to whatever capacity you desire.

As for your other questions, here are the Data sheets, in two posts, due to the file sizes. I am using the International Rectifier brand MOSFETs. But, the Vishay DS has additional information.

The MOSFET maximum voltage and amperage will be in AC. Those numbers must be significantly derated, for DC operations. IIRC, the rule of thumb is 1/3 of the AC specifications. I am in the process of doing power-on testing, to find the SOA that I am comfortable stating as a specification.

If you would like a test board, to build one out, just send me a pm.

Thanks, for your interest.

[t1d]

Vishay Data Sheet... Even zipped, it is too big to post. So, you can find it, at Mouser.com. Sorry...

[spec]

That's very kind of you t1d 

Thanks for the information and the offer of a board.

I would love to take up your offer, but I do not have a lab at the moment: temporary house while refurbishing target house.

[t1d]

Oooo... No lab... That's gotta hurt... Maybe look for a local club, like MakerSpace...

Just let me know, when you are ready for a board...

[spec]

  That's an idea, but I need all my gear: scope, solder station, microscope etc to be permanently set up on a bench.

Also, as I am doing the work on the target house, don't have much time, or energy for other activities- yaking on EEV doesn't take much physical effort and keeps the brain ticking over.

You asked for comments about the design. Does that include areas that may be a problem?

Have you got a part number for the heatsinks?

[t1d]

That's an idea, but I need all my gear: scope, solder station, microscope etc to be permanently set up on a bench.

Well, that was sort my point... They have, often, lots of great equipment. The groups are formed to get good equipment and share it. So, maybe all your goodies can stay packed.

You asked for comments about the design. Does that include areas that may be a problem?

Absolutely. That's why I posted the project... More heads are better than one. But, at this point, hopefully, I have weeded through the majority of the design problems and any remaining are due to required compromises. And, the test rig board is not laid out as well as the final Two-MOSFET board. So, layout comments might best be aimed at that board.

Have you got a part number for the heatsinks?

No, because my final heat sink is from a donor big, old school, rack-mounted amplifier. And, I have a 120v fan, mounted on the case. So, for me, I think I am covered. Other users can determine what they need.

The test rig heat sink is just from a scavenged TV. I added a donor 12v fan, to it. I did not use any particular specifications, because the rig was really just to determine if the circuit would be operational, that is, mostly, that it would not oscillate.

The test rig is working so well that I decided to push it, to see what it might do. So far, I am pleased.

I needed more wattage, to run the tests up, farther. So, I just did some research on paralleling PSUs. Here's the thread link, for that.
https://www.eevblog.com/forum/beginners/how-to-connect-two-psus-to-get-more-current/

Thanks!

[Kleinstein]

The simple electronic load circuit has a few problems. Some of these points also applies to some of the commercial versions:

One it that it is very difficult to protect from too high a voltage applied. So overload is a possible problem. Turning down the current, once the voltage is too high is a partial solution. Turning down the current fast on an inductive source could cause even higher voltage.

When de voltage gets too low, the regulator can go into saturation. If than the external voltage rises, it takes some time to limit the current.
Under certain conditions the saturation might also lead to a kind of oscillation, when just at the boundary to saturation, especially with 2 MOSFETs.

[t1d]

The simple electronic load circuit has a few problems. Some of these points also applies to some of the commercial versions:

One it that it is very difficult to protect from too high a voltage applied. So overload is a possible problem. Turning down the current, once the voltage is too high is a partial solution. Turning down the current fast on an inductive source could cause even higher voltage.

When de voltage gets too low, the regulator can go into saturation. If than the external voltage rises, it takes some time to limit the current.
Under certain conditions the saturation might also lead to a kind of oscillation, when just at the boundary to saturation, especially with 2 MOSFETs.

Good stuff, good sir.

You will recall that I made a noob mistake, when first testing the unit, by starving it. This caused the MOSFET to go into saturation and sent me on a goose chase, to find a problem that didn't exist...

[spec]

+ t1d

You asked for comments about the design. Does that include areas that may be a problem?

Absolutely. That's why I posted the project... More heads are better than one.

That is a good positive view and the way I see constructive and valid comments about my designs too. But I always feel a tad guilty about finding problems with other people's work, especially when they have put a lot of effort into them, as you obviously have.

Thanks for defining your target output voltage, current, and power specification. That has been a big help, especially as I thought you were aiming at much higher figures. Just to reiterate:

I am hopeful that
- the Single-MOSFET test board will handle 30v/2a = 60w and
- the Two-MOSFET final model 30v/4a = 120w.

As everyone, no doubt, knows, the trouble with active loads, just like lab power supplies, is that you never know what is going to be connected to them. It's also well known that, ultimately there are two limiting areas, output power transistor maximum junction temperature (TJmax) and safe operating area (SOA).
So out of interest, I had a look at these two areas on your active load.

IRFP250M NMOSFET RELEVANT CHARACTERISTICS
The IRFP250M is a beefy NMOSFET: Case type= TO247, VDSmax= 200V,   IDmax=30A, ThR J/C= 0.7DegC/W, Tjmax= 175DegC. 

TEMPERATURE BUDGET
The total thermal resistance junction to ambient (TTRJA) = TRJC(0.7degC/W) + TRCH(1DegC/W)(mica washer) + TRHSA (3DegC/W) (assumed) =  4.7DdegC/W

The required dissipation = 60W, so the temperature difference, J/ambient = 60 * 4.7 = 282degC

Assuming that the ambient temperature inside the equipment case is 70 degC, the junction temperature would be, 282+70 = 352degC, and there, afraid to say, is the problem!

The actual allowable IRFP250M dissipation with your heat sinking arrangement is, (TJmax- Tamb)/TRtot = 105/4.7= 22W, which agrees with the general rule of thumb that you can't safely dissipate more than around 20W in a TO247 (or TO3) case.

In the above, I have assumed that your heatsinks have a thermal resistance of 3 degC/W but, going by their size, their thermal resistance may be higher. Aggressive fan cooling will bring the thermal resistance down, but not much lower than 2 degC/W, I would guess.

SAFE OPERATING AREA (SOA)

As there are no SOA lines for 100ms or DC, it would seem that the IRFP250M is intended mainly for pulse amplification, whereas for an active load the signal will include DC: battery load testing being an example. So, by extrapolation, I have added orange lines for 100ms and DC, as shown on the attached image. But these lines are not necessarily accurate: they are just a guide.

The nice thing about the SOA graph is that it applies at the maximum junction temperature of 175 degC, which is excellent.
The good news is that the SOA for the IRFP250M looks OK for your application- but you already knew that

Apologies for being the bringer of bad news about the junction temperature: I will get my coat.

[t1d]

It's also well known that, ultimately there are two limiting areas, output power transistor maximum junction temperature (TJmax) and safe operating area (SOA).

Good information.

So out of interest, I had a look at these two areas on your active load.
 
TEMPERATURE BUDGET
The total thermal resistance junction to ambient (TTRJA) = TRJC(0.7degC/W) + TRCH(1DegC/W)(mica washer) + TRHSA (3DegC/W) (assumed) =  4.7DdegC/W

Well, you have to remember that I am still significantly not knowledgeable. So, here, I don't know if this is summing different devices, or summing the characteristics, of just the MOSFET.

If the latter, I searched the data sheet for the proper mounting procedures. I did not find any instructions, other than, on Page 2, in the thermal resistance ratings, it reads "Case-to-Sink, Flat, Greased Surface." And, that is how I mounted the MOSFET, that is, in grease, without an isolator. Have I done something wrong?

The required dissipation = 60W, so the temperature difference, J/ambient = 60 * 4.7 = 282degC

Assuming that the ambient temperature inside the equipment case is 70 degC, the junction temperature would be, 282+70 = 352degC, and there, afraid to say, is the problem!

The actual allowable IRFP250M dissipation with your heat sinking arrangement is, (TJmax- Tamb)/TRtot = 105/4.7= 22W, which agrees with the general rule of thumb that you can't safely dissipate more than around 20W in a TO247 (or TO3) case.

In the above, I have assumed that your heatsinks have a thermal resistance of 3 degC/W but, going by their size, their thermal resistance may be higher. Aggressive fan cooling will bring the thermal resistance down, but not much lower than 2 degC/W, I would guess.

I have done some thermal testing. Here is the log.
Soak time, at each wattage, was at least 10 minutes.
The test was not precise. Particularly, keeping the thermocouple positioned on the face of the MOSFET was fiddly.
The temperature gain does not evidence an exponential nature, but I can’t believe that it will be linear, in fact.
I expect the case heat sink and fan to be more efficient, even with both the single and double MOSFET models installed. The heat sink is just plain huge and the fan is 120v.

SAFE OPERATING AREA (SOA)
The good news is that the SOA for the IRFP250M looks OK for your application- but you already knew that

Apologies for being the bringer of bad news about the junction temperature: I will get my coat.

Leave your coat, on the rack. I am off to clarify the definition of “junction temperature” and “Safe Operating Area.”

[t1d]

I am off to clarify the definition of “junction temperature” and “Safe Operating Area.”

Okay, I had those, in mind, mostly correctly.:-)

[spec]

You say that the heatsink is huge and has a powerful fan- that is very good news

The junction temperature rise with power dissipation is linear not exponential. So, for a given total thermal resistance from the junction to ambient, if you double the power dissipation you double the junction temperature.

Working out junction temperature is dead easy.

(don't let the term 'junction' cloud the issue. MOSFETS do not have a junction like BJTs. The term is just historical)

[t1d]

The junction temperature rise with power dissipation is linear not exponential. So, for a given total thermal resistance from the junction to ambient, if you double the power dissipation you double the junction temperature.

Well then, maybe it is okay to put our hope in the actual power-on test sample data; 74.7*C. (See prior post temperature spreadsheet.) I hope so. However, this is at the face of the MOSFET, not its internal temp)...

[t1d]

I fooled around with attaching my two PSUs in parallel, to get more current, to push the e-load. I did not have the exact/proper parts and the load only partially balanced, between the two PSUs. Even in such a state, it appeared to me that the test rig can handle more current. So, woot, for that encouragement...

[Kleinstein]

The TO247 case is not that bad for thermal dissipation. For heat dissipation it is similar well suited as TO3. So something like 60 W would be a reasonable conservative limit.  20 W is more like the practical limit for the smaller TO220.

The SOA curve is a little tricky, as many DS don't show the DC curve.  An old Fairchild DS does show an DC curve. However there are IRFP250 and IRFP250N and the N Version is the newer one with a likely smaller chip and lower SOA. The IRFP250 is also rather similar (better selection and thus higher specified voltage) to the IRFP150 that is used in some older HP linear power supplies.
Still it is a MOSFET that is usually known to work reasonably well in linear mode, but for most manufacturers there is no DC SOA spec. So it's in a area that will likely work, but not tested / specified unless one gets some old non N version from Fairchild.

With not individually tested MOSFETs one would ideally do a possibly destructive SOA check anyway. So make sure the fuse is good (ideally the power source has a reliable limit) and than apply some worst case (depending on how brave you are) relatively high voltage (e.g. 40 V), a little higher than the later limit and do the test at the limiting current. If is does not blow, chances are good it can withstand a somewhat lower voltage / power in the future.

[t1d]

With not individually tested MOSFETs one would ideally do a possibly destructive SOA check anyway. So make sure the fuse is good (ideally the power source has a reliable limit) and than apply some worst case (depending on how brave you are) relatively high voltage (e.g. 40 V), a little higher than the later limit and do the test at the limiting current. If is does not blow, chances are good it can withstand a somewhat lower voltage / power in the future.

Yes, a practical, power-on test is what I was working toward. Thank you, for the confirmation; I feel more confident, now.

I purchased extra parts, for the possibility of failures. I have lots of PCB boards, too, so there are no worries... I hope...

You have not made any comments, in regard to the new Two-MOSFET Board layout. May I assume that you would have spoken up, if you had seen a problem? Post #53

What about adding an isolated copper pour/heat plane, on the top layer, just under the shunt resistors. I wonder if it might absorb as much, or more, heat, from the main heat sink, as it would dissipate? I guess it would not add capacitance, because it is not in the power loop?

Isn't the shunts' aluminum housing adequate. Ahh, the answer is in the Data Sheet, of course, so I will look, there.

[spec]

The TO247 case is not that bad for thermal dissipation. For heat dissipation it is similar well suited as TO3. So something like 60 W would be a reasonable conservative limit.  20 W is more like the practical limit for the smaller TO220.

Please show your thermal budget getting 60W with an IRFP250M in a TO247 case. Did you miss reply #66 which shows scientifically that 60W is impossible.

[Kleinstein]

The IRFP250M is specified with about 0.7 K/W for "junction" to case  and a suggested 0.3 K/W for case to heat sink. With a reasonable size heat sink with 1K/W  the total thermal resistance is 2 K/W. So at 60 W the temperature rise for the chip inside would be at some 120 K and thus maybe 150 C chip temperature.  If one wants more margin it is possible to use a better heat sink (e.g. 0.5 k7W) with a fan.

I know the 214 W maximum power rating is not realistic, but usually something like 1/3 or even 1/2 of the P_tot rating can be realistic.

[spec]

The IRFP250M is specified with about 0.7 K/W for "junction" to case  and a suggested 0.3 K/W for case to heat sink. With a reasonable size heat sink with 1K/W  the total thermal resistance is 2 K/W. So at 60 W the temperature rise for the chip inside would be at some 120 K and thus maybe 150 C chip temperature.  If one wants more margin it is possible to use a better heat sink (e.g. 0.5 k7W) with a fan.

I know the 214 W maximum power rating is not realistic, but usually something like 1/3 or even 1/2 of the P_tot rating can be realistic.

Thanks for the reply- much appreciated.

While I agree with the figure of 0.7 K/W for J/C, you have neglected the thermal resistance of the insulating washer, which is typically 1 K/W overall. 1K/W would be a very good heatsink indeed: large and expensive and nothing like what is being used as far as I can tell.

But even with your figures the IRFP530 junction temperature of 175 C would be exceeded.  Taking into account equipment case air temperature of 70 degC, you get 120 +70= 190 degC. And you would not normally run a transistor at its maximum junction temperature- you would leave a margin for safety and shoot for around 158 deg C.

Yeah, Ptot figures on spec sheets are for the sales people and, to a great extent, so are maximum current figures.

 

[t1d]

The TO247 case is not that bad for thermal dissipation. For heat dissipation it is similar well suited as TO3. So something like 60 W would be a reasonable conservative limit.  20 W is more like the practical limit for the smaller TO220.

Please show your thermal budget getting 60W with an IRFP250M in a TO247 case. Did you miss reply #66 which shows scientifically that 60W is impossible.

EDIT: Oops, I see that this was discussed, in two posts, after this one... So, the below may not have been necessary...

There is a lot of thinking outloud, here, so please bear with me... Remember, I am noobish...

No, I just took this to mean that the FET would burn up, from heat:
Assuming that the ambient temperature inside the equipment case is 70 degC, the junction temperature would be, 282+70 = 352degC, and there, afraid to say, is the problem!

My reply to that was that I thought that the present heat sink/fan combination was cooling well enough to handle what is going on. That came from the thermal tests and your comment that the temperature increases linearly, with wattage, and my resulting math calculation (Case temp ending around 75*C.)

Maybe it is that the temp on the inside of the case is the junction temp and that temp is what can not be violated? It has nothing to do with the efficiency of the cooling system? No, I had thought not... Because, later, you said...In the above, I have assumed that your heatsinks have a thermal resistance of 3 degC/W but, going by their size, their thermal resistance may be higher. Aggressive fan cooling will bring the thermal resistance down, but not much lower than 2 degC/W, I would guess.

I will keep thinking on where I am missing it. If you see my folly, please set me straight.

What do you think the limit might be? If this number was in your prior post, I apologize.

Thanks for your continued help.

[spec]

The TO247 case is not that bad for thermal dissipation. For heat dissipation it is similar well suited as TO3. So something like 60 W would be a reasonable conservative limit.  20 W is more like the practical limit for the smaller TO220.

Please show your thermal budget getting 60W with an IRFP250M in a TO247 case. Did you miss reply #66 which shows scientifically that 60W is impossible.

EDIT: Oops, I see that this was discussed, in two posts, after this one... So, the below may not have been necessary...

There is a lot of thinking out loud, here, so please bear with me... Remember, I am noobish...

No, I just took this to mean that the FET would burn up, from heat:
Assuming that the ambient temperature inside the equipment case is 70 degC, the junction temperature would be, 282+70 = 352degC, and there, afraid to say, is the problem!

My reply to that was that I thought that the present heat sink/fan combination was cooling well enough to handle what is going on. That came from the thermal tests and your comment that the temperature increases linearly, with wattage, and my resulting math calculation (Case temp ending around 75*C.)

Maybe it is that the temp on the inside of the case is the junction temp and that temp is what can not be violated? It has nothing to do with the efficiency of the cooling system? No, I had thought not... Because, later, you said...In the above, I have assumed that your heatsinks have a thermal resistance of 3 degC/W but, going by their size, their thermal resistance may be higher. Aggressive fan cooling will bring the thermal resistance down, but not much lower than 2 degC/W, I would guess.

I will keep thinking on where I am missing it. If you see my folly, please set me straight.

What do you think the limit might be? If this number was in your prior post, I apologize.

Thanks for your continued help.

No problems. 

Yes you are right, what counts after all is said and done, is the maximum temperature of the silicon inside the NMOSFET and that is 175 deg C. If you exceed that temperature the NMOSFET may fail immediately, normally going short circuit drain/source, or its parameters may rapidly or gradually  deteriorate, so its gate threshold voltage might go up, as could its internal resistance. Sooner or later though it would probably fail completely.

Also, it is not wise to run a transistor at its maximum temperature- it would be better to have a margin, and I would say that running at 90% would be the maximum temperature giving a margin for safety of 10%. So that gives a maximum temperature of 157.5 deg C.

As to the maximum amount of power, I think you can safely dissipate 20W.

Two big factors that control the amount of power that can be dissipated are obviously the thermal resistance of the heatsink, but the thermal resistance of the insulating washer is the other and it has a surprisingly large impact.

What insulating washer are you using?

[spec]

I made this a separate post to get away from all the theoretical stuff and focus on some practical measurements.

There is one simple test you can make, the acid test, to establish what power can be safely dissipated.

ACID TEST

[1] Set the voltage across the actual drain and source to a particular voltage.
[2] Adjust the DC current flowing from the drain to the source to a particular current.
[3] Multiply the voltage by the current to get the power being dissipated by the NMOSFET.
[4] Measure the air temperature in the room, assuming that the MOSFET and heatsink are in the open and not in a case.
[5] Measure the case temperature of the NMOSFET after 15 minutes or more.

10W dissipation would be a good choice, say 10V at 1A.

The big problem though, is measuring the temperature of the TO247 case, the part that counts that is, as most of the case is plastic which is a heat insulator. The part of the case that needs to be measured is the metal part underneath which mates with the thermal washer. It is a shame that the NMOSFET was not in a TO3 case, because they are all metal (see reply #80).

Anyway, putting the problem of measuring the TO247 mating surface temperature aside for the moment, once you get, power dissipation, ambient temperature, and the TO247 mating surface temperature, it is a simple matter to work out the the thermal performance of your set up. If you post the figures I will do the calculation for you if you want.

[spec]

Yet another separate post , this time to describe how to measure the temperature of a TO247 mating surface.

One approach you can use is to make a washer of copper sheet, say 3mm thick, to fit between the TO247 case and the insulating washer.

If you make the copper washer slightly larger than the TO247 case, you can then measure the temperature of the copper washer to get a temperature figure to use in the acid test.

[spec]

Yet another post 

As the insulating washer has such a large negative impact, you could consider eliminating it and mounting the NMOSFET directly to the heatsink. This would mean that the heatsink would be at the NMOSFET drain potential though, so the heatsink would need to be electrically insulated from the equipment case.

The other problem is that the heatsink would then act as a capacitor and possibly inductor in the NMOSFET drain circuit and could cause parasitic frequency instability, but in the case of your application this should not be too much of a problem.

[spec]

Guess what!

The single hole fixing of a TO247 case is generally unsatisfactory, and gets worse with time.

In a demanding application like this, a clamp is often placed on the top of the TO247 case to generate a more even pressure between the TO247 mating surface and the insulating washer and the insulating washer and the heatsink.

It would be a good idea to consider a clamp for your application.

[t1d]

What insulating washer are you using?

DS = The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole.

No insulation pad either. Seats in grease.

For the test rig, I am not using a mounting bolt. The heat sink came with a mounting clip that clamps the FET, to the heat sink.

[t1d]

Anyway, putting the problem of measuring the TO247 mating surface temperature aside for the moment, once you get, power dissipation, ambient temperature, and the TO247 mating surface temperature, it is a simple matter to work out the the thermal performance of your set up. If you post the figures I will do the calculation for you if you want.

Ambient was 26.7*C
At 10 watts, the face temperature was 34.7*C.
My guess is that the ending temp, at 60 watts, will be around 75*C. Please check my math, on the spreadsheet.

Thanks, for your help, with the technical stuff.

[t1d]

Yet another separate post , this time to describe how to measure the temperature of a TO247 mating surface.

One approach you can use is to make a washer of copper sheet, say 3mm thick, to fit between the TO247 case and the insulating washer.

If you make the copper washer slightly larger than the TO247 case, you can then measure the temperature of the copper washer to get a temperature figure to use in the acid test.

Neat trick!

[t1d]

Yet another post 

As the insulating washer has such a large negative impact, you could consider eliminating it and mounting the NMOSFET directly to the heatsink. This would mean that the heatsink would be at the NMOSFET drain potential though, so the heatsink would need to be electrically insulated from the equipment case.

The other problem is that the heatsink would then act as a capacitor and possibly inductor in the NMOSFET drain circuit and could cause parasitic frequency instability, but in the case of your application this should not be too much of a problem.

The FET is mounted directly to the HS, in grease, per the DS. The DS does not make any mention of needing to isolate the HS, but, presently, the HS is isolated. I will check, with my DMM, between the HS and ground, to see if there is anything there.

EDIT: Hmm... Maybe, it would be better to check between the HS and the Shunt Resistor. Seems safer...

[t1d]

Guess what!

The single hole fixing of a TO247 case is generally unsatisfactory, and gets worse with time.

In a demanding application like this, a clamp is often placed on the top of the TO247 case to generate a more even pressure between the TO247 mating surface and the insulating washer and the insulating washer and the heatsink.

It would be a good idea to consider a clamp for your application.

The test rig uses a clamp and so does/will the HS, in the permanent case.

[spec]

What insulating washer are you using?

DS = The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole.

No insulation pad either. Seats in grease.

For the test rig, I am not using a mounting bolt. The heat sink came with a mounting clip that clamps the FET, to the heat sink.

Ahh, I now see why my thermal calculations were so different from yours and Kleinsteins.

The TO247 case does have an insulated mounting hole, which means only that you do not need a small insulating washer for the mounting bolt. But the IRFP250M drain is still connected to the metal plate that interfaces with the heatsink. This means that unless you go for a live heatsink, you need a large electrically insulating washer between the TO247 case and heat sink (see attached image)

[t1d]

Ahh, I now see why my thermal calculations were so different from yours and Kleinsteins.

The TO247 case does have an insulated mounting hole, which means only that you do not need a small insulating washer for the mounting bolt. But the IRFP250M drain is still connected to the metal plate that interfaces with the heatsink. This means that unless you go for a live heatsink, you need a large electrically insulating washer between the TO247 case and heat sink (see attached image)

Good catch!

It is not noob-friendly (me) to have done their specifications, based on a live heat sink, and to have made no other comment, other than the drawing notes.

I can add a plastic insulator shim, to the test rig, to make it more realistic, when I begin testing, again. I am, presently, waiting on Schottky diodes to arrive.

I think we have a small communication gap, due to terminologies. What do you mean by "a large electrically insulating washer?" I am only familiar with plastic-type insulators and mica (if I have remembered the correct mineral.) I thought an insulating washer was the device to keep the mounting bolt from grounding out. Our FET has an integrated bolt isolator.

Thanks, so much...

[spec]

Ahh, I now see why my thermal calculations were so different from yours and Kleinsteins.

The TO247 case does have an insulated mounting hole, which means only that you do not need a small insulating washer for the mounting bolt. But the IRFP250M drain is still connected to the metal plate that interfaces with the heatsink. This means that unless you go for a live heatsink, you need a large electrically insulating washer between the TO247 case and heat sink (see attached image)

Good catch!

It is not noob-friendly (me) to have done their specifications, based on a live heat sink, and to have made no other comment, other than the drawing notes.

I can add a plastic insulator shim, to the test rig, to make it more realistic, when I begin testing, again. I am, presently, waiting on Schottky diodes to arrive.

I think we have a small communication gap, due to terminologies. What do you mean by "a large electrically insulating washer?" I am only familiar with plastic-type insulators and mica (if I have remembered the correct mineral.) I thought an insulating washer was the device to keep the mounting bolt from grounding out. Our FET has an integrated bolt isolator.

Thanks, so much...

No probs.

Yes, it's my terminology that hasn't been too clear.

I hate to keep on, but can I advise to avoid plastic or foam insulators- they look pretty and are simple to use but they have a high thermal resistance and, long-term, are not that good.

Instead, go for as lower thermal resistance as you can. Aluminum oxide have a very low thermal resistance, but are expensive and easily damaged, ceramic are good but brittle, and thin mica are perhaps the best choice, all things considered.

It is a great shame that the heat conducting area of the TO247 case in not insulated, because that would have made one hell of a good NMOSFET   

[t1d]

Health challenges have prevented the motivation to test the Single-MOSFET board, with a 12v car battery. But, I am hopeful, to soon do so. I didn't want folks to think the thread is dead.

It would be great, if someone wanted a board, on which to do their own testing. The design really needs a more professional approach, than I am able to do, in discovering/defining its capabilities and limits. I would even build one out for you, if that would make it easier for you to participate and you are in the 48. You might help with my parts costs and shipping?

[t1d]

I remembered that I have an IOTA DLS-55 Battery Charger/PSU, for 12v systems. This is a serious battery charger/PSU; 55 amps @ 12vdc. This will be perfect, for testing the e-load. No need to be outside in the cold, no chance of a battery gas explosion, no dirty battery cables to disconnect from the car and I won't have to reset the car's clock. Woot. I think that was just the inspiration I needed!

[t1d]

I did additional testing, with the Single-MOSFET Test Rig. Here are the results:

Beginning Ambient Temperature = 24*C
Highest Volts/Amps = 13.82V @ 2A
Soak Time = 10 Minutes, Temp was settled in only two minutes.
Final MOSFET face temperature = 52.3*C

Heat Sink Considerations
The MOSFET was mounted in grease directly to an Aluminum Plate, being 125mm x 50mm. No insulator was used. This is in keeping with the OEM test method. Direct aeration was provided by a 60mm x 60mm, 12vdc fan. (I originally reported thatIthe fan is an 80mm unit; I was wrong.)

Mathematical Extrapolations
Voltage Extrapolation Factor (The Design Goal is 30V/2A)
30.0V/13.82V = 2.17

MOSFET Rise In Temperature
52.3*C – 24.0*C = 28.3*C Rise

Estimated MOSFET Rise at 30V Design Goal
28.3*C x 2.17VEF = 61.4*C

Estimated MOSFET Temperature at 30V/2A Design Goal
61.4*C + 24.0*C = 85.4*C

Conclusion
I estimate the Single-MOSFET is capable, thermally, of the design goal, and possibly more, with a proper heat sink and cooling. It would be good to do operational testing, at full power, but I will have to think on how to configure that much wattage.

[t1d]

I did additional testing, with the Single-MOSFET Test Rig. Here are the results:

Beginning Ambient Temperature = 24*C
Highest Volts/Amps = 13.82V @ 2A
Soak Time = 10 Minutes, Temp was settled in only two minutes.
Final MOSFET face temperature = 52.3*C

Heat Sink Considerations
The MOSFET was mounted in grease directly to an Aluminum Plate, being 125mm x 50mm. No insulator was used. This is in keeping with the OEM test method. Direct aeration was provided by a 60mm x 60mm, 12vdc fan. (I originally reported thatIthe fan is an 80mm unit; I was wrong.)

Mathematical Extrapolations
Voltage Extrapolation Factor (The Design Goal is 30V/2A)
30.0V/13.82V = 2.17

MOSFET Rise In Temperature
52.3*C – 24.0*C = 28.3*C Rise

Estimated MOSFET Rise at 30V Design Goal
28.3*C x 2.17VEF = 61.4*C

Estimated MOSFET Temperature at 30V/2A Design Goal
61.4*C + 24.0*C = 85.4*C

Conclusion
I estimate the Single-MOSFET is capable, thermally, of the design goal, and possibly more, with a proper heat sink and cooling. It would be good to do operational testing, at full power, but I will have to think on how to configure that much wattage.

Merry Christmas!

I wanted to push the test rig to the MOSFET heat limit, to see what the wattage might be. That is to say that the design goal (30v @ 2a,) expressed as wattage is 60w. But, I only have a ~14vdc/55a DUT supply. So, I could load the test rig at 14v @ 4a.

I upgraded the on-board fuse to 4a and ran the test. The rig performed as before, to the 14v @ 2a point, with some variations... Mainly, that for this similar supplied wattage (~14v @ 2a,) the temperature reading rose to 62.0*C. I attribute this to several things:
- Much larger DUT supply cables were used, which significantly reduced the resistance/heat loss in the cables.
- The heat sink had to be re-seated, in order to change the fuse.
- The thermocoupler contacted the MOSFET's face in a different location.

The most curious result followed, when I attempted to advance the test above the prior range. There was only a small amount of throw left in the pot turn... maybe 1/8-1/4 turn... This put the amperage just over 2a. The temperature only rose to 67.1*C.

I am at a bit of a loss. The DUT supply can supply 55a. So, shouldn't the throw of the pot span this whole amount? I will put the MOSFET onto the oscilloscope, to see what is happening, but, presently, I do not understand. Your thoughts?

[t1d]

Additional 4 amp testing…
I put the scope on the MOSFET input pin.

DC Coupled - x10 - 5V/D - 5uS/D
The first-on pin voltage is small and does vary. But, it jumps to 3.5v, while still sinking 0.00a. Then, the amperage varies readily. The pin voltage was 5.0v @ >2+a (232.7mV [uncalibrated.])

AC Coupled - x10 - 0.2V/D - 5uS/D
At 1/3a, a very pronounced asymmetrical sigh wave, having at least one reflection, develops. Its duration/repetition is 20uS. The wave is erratic, in its form, below 1/3a. It sifts upward, as the pot is advanced.

An explanation of what might be happening would be great. Other thoughts and suggestions are welcome.

[mk_]

show pictures...

[t1d]

show pictures...

Sorry, not available, as explained in the thread... I rather imagine the AC wave is normal mains hum... Your thoughts?

[mk_]

show pictures...

Sorry, not available, as explained in the thread... I rather imagine the AC wave is normal mains hum... Your thoughts?

Sorry, I didn`t read the whole thread to look why there are no pictures.

My thoughts? I`m bad in imagination of "writen" pictures - specialy when it comes to debug a circuit were the last schematic is 3 months old (date-field)  and shown 2 months ago... .

Mains hum can`t be seen on a 5us/D so something is oscillating.

[t1d]

Mk, I forgot to welcome you and thank you for joining in. I can use all of the help I can get!

I`m bad in imagination of "writen" pictures -

I will be joking here... I do not have a wife... But, I do have a budget... So, just for you, I will (really) be buying (today, r-e-a-l-l-y) that new oscilloscope that I have been wanting - I mean needing - And, blaming - I mean justifying - it on you. Actually, I was given some Christmas love/$ for just such a purpose.

specialy when it comes to debug a circuit were the last schematic is 3 months old (date-field)  and shown 2 months ago... .

The greater a person's age, the longer it will take to complete

Mains hum can`t be seen on a 5us/D so something is oscillating.

Ahh, this is a great clue. Can you give me some ideas of what to look for and how? Given that I find what you suspect, what cure do you want me to try? Please and thank you. I suspect that the (poor) test board layout hasn't helped. The Two-MOSFET board layout should be better...

I have offered to share the PCB board. As far as getting true test results, someone with real technological knowledge needs to document the circuit's performance. If you would like a board, please send me a pm.

[Kleinstein]

It is possible the capacitor for compensation at the OPs are a little too small. temporarily adding an extra capacitor (even if rather large, like 10 nF) would be a first try.  Just in case one should check of the set signal send to the last OP is stable. This is the usually the simpler part of the circuit, but it is also easy to check.

[t1d]

Hi, Kleinstein!
Thanks! I will give your bodge a try and check it with my new scope, a Siglent SDS1104X-E, which is on its way... Woot!

[t1d]

It is possible the capacitor for compensation at the OPs are a little too small. temporarily adding an extra capacitor (even if rather large, like 10 nF) would be a first try.  Just in case one should check of the set signal send to the last OP is stable. This is the usually the simpler part of the circuit, but it is also easy to check.

I thought about this too hard and confused my noob self... lol... Are we talking about the op amp decoupling caps on the power rails?

[Kleinstein]

The decoupling caps are already large enough, it is about C2 that might need to be a little larger.

[t1d]

The decoupling caps are already large enough, it is about C2 that might need to be a little larger.

Thanks. Glad I asked. I will give it a try.

[t1d]

I changed C2 to 10nF, as Kleinstein suggested, and re-tested the board, under duplicate conditions. All results remained the same, with the exception that the amplitude of the asymmetrical wave form was reduced by half = 0.15V. The maximum the rig is sinking continues to be around 2.32A/Uncalibrated. What to do next?

Thank you, to everyone, for your continued help and support.

[Kleinstein]

If the frequency of the oscillation does not change much with a changes compensation, this would indicate a source outside the loop. So is the supply and the set voltage (e.g. at the pot) clean ?

With some sources there is also the possibility that the voltage source is the culprit:
Some voltage regulators do not like a load that looks like a low ESR capacitor in combination with a current sink.
The simple current sink circuit has an impedance that is a little like a capacitor, possibly low loss, though usually too small to cause trouble.
Normally the RC element at the output already takes care of the problem by adding loss in the critical frequency range.

For a test one would try with an additional (e.g. external) RC parallel to the load. Something like 2-5 Ohms and 100 µF.

[mk_]

What to do next?

Remove D2 too, there is no reason for this diode in testing-mode.

Waiting for your oscilloscop which allows screenshot and then teaching how to use it...
Waiting for a schematic and(!) picture of your setup...

IIRC you use an active charger as powersource. I assume that this source isn`t used to handle a dynamic load - and therefore the whole system can oscillate. So I would use a normal powersupply for first impressions.


 

[t1d]

Thanks, Kleinstein and mk, for your posts. Today is not a great health day; I will reply to your suggestions asap.

It came to me in my sleep that the DUT/Load battery charger is switch mode. Maybe that explains the ac elements. I will have to think on its effects and put the scope on it... (I would want the circuit to be able to handle such a DUT/Load type.) Do I need to lift the DUT/charger's earth ground, for safety?

[Kleinstein]

The ground (PE) connection is there for safety reasons. If the scope and part of the DUT (e.g. the supply) is grounded there is a chance so get some extra signal pickup between the ground points. One also needs to be careful where to put the scopes ground. The connection should be only where there is ground already, other wise there can be ground current flowing, with a powerful supply possible even damaging.

With 2 grounded parts (e.g. scope and supply) both should be powered from the same outlet. It can also help a little to have a ferrite (e.g. clip on) around the power cables.

Lifting a ground connection can be dangerous. Depending one the circuit one might need to use a isolation transformer for the DUT instead. Even with the transformer there are residual dangers from high voltage. The Transformer helps against some dangers, but also adds new, as it can reduce the protection by an GFI.

Unless one really knows what one is doing and with a special isolated scope (and probes) one should never use the isolation transformer for the scope.

The test-point at the MOSFETs gate can show some effect of Ripple of the source, even if perfectly working. So it is not a very good test point. The voltage at the shunt would be a better test point - this should be constant. One should also check the source voltage.  An switched mode charger can have pretty high ripple - so some AC can be normal.

[t1d]

The new scope arrived. I used it to clarify the recurring wave form that I had noted earlier.
- Probe @ x10
- Pot set to 0 (zero)
- DUT is still SMPS Battery Charger
- Measured at MOSFET Input Pin... I will look at other locations later. This test was to replicate the earlier test settings.

The readings are posted within the screenshot.

Looks like 60Hz Mains hum, to me. I guess the questions is "Is it acceptable and, if not, what to do to correct it?" We already increased the cap to 10nF.

I thought the group might find this (a little) interesting.

[mk_]

The new scope arrived. I used it to clarify the recurring wave form that I had noted earlier.
- Probe @ x10

Well, I don`t know Siglents, but if I read the screenshot correct it assumes that you have a 1:1 probe connected, which is somehow different to your 1:10 saying. You also should set the coursors in the averaged Signal as I assume that the hf-noise is not a real signal at the Gate. dY ist therefore 4mV, which is - with a 1:10 probe 40mV...

Anyway, I don`t see any problem as long as the current is stable. So - please show also voltage over the shunt. Take care with GND for the probes. Best will be you use the Source as GND for the FET _and_ the shunt, so you have to invert the shunt-signal on the oscilloscope.

good luck

[Kleinstein]

The Signal may just reflect the output of the charger. So this should be tested first.

Near zero current setting the load circuit is kind of in saturation and might get out due to hum from time to time. This causes a large signal at the gate, but with not much consequence to the load.

The cheap scopes usually have no automatic probe detection. So one would normally enter if a x 1 or x 10 probe is used. The scope will than include the factor in the scaling.

[t1d]

I finally found the x10 probe setting. I will probe the suggested additional points, as soon as I feel better. Thanks for your continued help and your patience.

[mk_]

I finally found the x10 probe setting.

I knew that we have to teach you using it. 

Anyway - most important is measuring the voltage "over" R9 so that you can see if the current is stable or hums also.
And it would be also nice to show the voltage J2 so that you can see how the inputvoltage looks like.

good luck

[t1d]

x10 @ MOSFET Input Pin

[t1d]

x10 @/across Wall Wart Input Plug

[t1d]

x10 @ DUT Input @ 0.5A

[t1d]

x10 @ Current Shunt Resistor to GND @ 0.0A

[t1d]

x10 @ Current Shunt Resistor to GND @ 0.5A

[t1d]

x10 @ Current Shunt Resistor to GND @ 2.325A

[t1d]

x10 Across Current Shunt Resistor @ 0.5A.
This one looked like Post #117. I shifted it left, to justify it.
Lots of random flashing spikes with greater than, or equal to, amplitude to the maximum ring amplitude. Not shown.

[t1d]

Notice the 50KHz spikes, on the shunt. Those don't look good. Shouldn't I look upstream to find the original source? Op amp outputs and inputs?

Of course, being new to the scope, I am not very confident of these readings. Some look so similar that I may have duplicated them, by mistake. And, I may have shifted some of the readings, to make the X/Y Calculation Box legible. Whatever looks worthy of further investigation, I will simply retest.

Thanks, guys.

[mk_]

Notice the 50KHz spikes, on the shunt. Those don't look good. Shouldn't I look upstream to find the original source? Op amp outputs and inputs?

Of course, being new to the scope, I am not very confident of these readings. Some look so similar that I may have duplicated them, by mistake. And, I may have shifted some of the readings, to make the X/Y Calculation Box legible. Whatever looks worthy of further investigation, I will simply retest.

Thanks, guys.

SDS00008.png shows a periodic signal based on a PWM nearby - maybe a switching powersupply nearby which let me assume that this is not a real signal.

Maybe you could send pictures how you measured. I assume that you didn`t measure with the spring at the probe. Instead you measured with the long GND-Clip, which resumes in a lot of hf-pickup, specialy at low voltages. Search net for "how to probe low voltage signals".

btw: would be nice if you could switch off the unused channels.

And please set the active channel to one of the horizontal gridlines so that it is easier to calculate the DC-part of the signal. Best would be that you don`t move vertikal if possible, just change Volts/div or time/div so that it is easier to compare different screenshots.

[Kleinstein]

One should definitely look at the voltage from the source, e.g. with some load (e.g. resistor with some power).

The signal from the shunt looks like there is some periodic signal at about 50 kHz (e.g. from the source) and some ringing following that. With just one signal it is very hard to tell where the source of that frequency is. Likely it's the voltage source as an oscillating load circuit would be high amplitude and normally not with dampened ringing in between.

[t1d]

SDS00008.png shows a periodic signal based on a PWM nearby - maybe a switching powersupply nearby which let me assume that this is not a real signal.

Maybe you could send pictures how you measured. I assume that you didn`t measure with the spring at the probe. Instead you measured with the long GND-Clip, which resumes in a lot of hf-pickup, specialy at low voltages. Search net for "how to probe low voltage signals".

btw: would be nice if you could switch off the unused channels.

And please set the active channel to one of the horizontal gridlines so that it is easier to calculate the DC-part of the signal. Best would be that you don`t move vertikal if possible, just change Volts/div or time/div so that it is easier to compare different screenshots.

Mk, yes, I had used the probe ground wire. The probe pin was on the input of R9 and the ground was made to the Meter Input "GND"/0 (which is common to the "GND"/0 plane.
- I still do not have a camera.
- Unused channels are turned off.
- Active channel moved to grid line.

All of the three following screenshots (9, 12 &13) were taken with the x10 probe ground spring on the GND of C1 and the probe pin spanned to the input of R9 with a modified header pin. The header pin was secured to the probe pin with it socket head clip and a bit of Blue Tack. Contact was maintained with hand pressure, only. This arrangement was fiddley, to say the least, and had me in a sweat…

The Stop Function was utilized. The Run Function shows much more noise, of course.

I have learned that the cursor information block, for my make/model scope cannot be moved. I darkened its background, to help legibility.

I will retest the wall wart, under a load, as Kleinstein suggests. Hopefully, tonight, if I can catch my breath. To do so, I need suggestions for a proper breadboard arrangement, please. The wall wart is 12vac/2a. I have a 10 Ohm – 5 Watt – 5% power resistor… And lots of common resistor and pot values. Bridge rectification, too...

Thanks, again.

[t1d]

x10 probe at 0.0a

[t1d]

x10 probe @ 0.5a

[t1d]

x10 probe @ 2.325a

[Kleinstein]

For testing the 12 V source, the 10 Ohms resistor would get some 15 W. So this could only work for short time load. It could still be used for a short time (several seconds) and this enough to get a reading from the scope.

Alternative some 100 Ohms cold also be used for loading.

[t1d]

More Testing, per Kleinstein's request.
x10/Spring
Wall Wart. Off test rig. On breadboard. 20 Ohms of resistance (2 x 10 Ohm), in series. Measured from input of Resistor #1 across to output of Resistor #2.

Note the large PP voltage swing of 34v. (60Hz mains hum?) I checked my probe and it is still on x10. Is this amplitude even possible, with a 12vac Wall Wart? If I tested it correctly, that must be an issue; correct? I am tired, now, but I will put a multimeter on it, asap.

[t1d]

More Testing.
x10/Spring
DUT/SMPS = Professional 12vdc/55a Battery Charger. Off test rig. On breadboard. 20 Ohms of resistance (2 x 10 Ohm), in series. Measured from input of Resistor #1 across to output of Resistor #2.
Note: The charger has extremely long supply lines... 16 feet, is my guess. Coiled.

3.1MHz. 2.04v PP amplitude.

[t1d]

I have a Brymen BM869s DMM. I used it to check the Wall Wart supply, regarding the 34.6vac PP voltage swing. I used the Max/Min feature. The max only read 11.75vac. It also has a "Crest" feature, but that only works with dc. So, what do you think is going on, with the 34.6vac PP swing, and what do you suggest for the next step?

[mk_]

More Testing.
x10/Spring
DUT/SMPS = Professional 12vdc/55a Battery Charger. Off test rig. On breadboard. 20 Ohms of resistance (2 x 10 Ohm), in series. Measured from input of Resistor #1 across to output of Resistor #2.
Note: The charger has extremely long supply lines... 16 feet, is my guess. Coiled.

3.1MHz. 2.04v PP amplitude.

Your focus sits onto an irrelevant signal. Thats noise frome somewere else, not from your pcb.

 Set the timebase to 5ms/div, aactivate the 20MHz filter in channel 1 and show some more pictures with 0, 0,5, 1, 2A loadcurrent.

[Kleinstein]

The supplies both look high ripple. So one has to expect some of the ripple to be visible. So much of the visible signal is just from the supplies.

For the wall wart, there might be a contact problem with the ground wire - the AC voltage does not make that much sense. So it could be common mode background with the scope ground not having contact With just a rectifier the ripple should be 120 Hz.

What type of wall wart is this:  heavy with classical transformer or SMPS type.

[t1d]

Set the timebase to 5ms/div, aactivate the 20MHz filter in channel 1 and show some more pictures with 0, 0,5, 1, 2A loadcurrent.

Thank you; I will do as you instruct.

[t1d]

What type of wall wart is this:  heavy with classical transformer or SMPS type.

It is the heavy type classical transformer. It does not have an Earth GND connection; it is floating, with respect to Earth. The oscilloscope has a proper ground to Earth.

For the wall wart, there might be a contact problem with the ground wire - the AC voltage does not make that much sense. So it could be common mode background with the scope ground not having contact With just a rectifier the ripple should be 120 Hz.

- The E-Load circuit supply is branched off of only one leg of the AC supply; AC1.
- The supply is (only) half rectified.
- What is referred to as GND, on the schematic, is actually 0/Virtual GND.
- This virtual ground is tied/returns to AC2.
There was much discussion in developing the supply in this manner. Just as a reminder, here is the drawing, of that portion of the circuit.

[t1d]

As requested by mk, tests were performed at 0.00a, 0.50a, 1.00a, 1.50a, 2.00a and 2.32a loads with the 20Mhz filter.

X10/Spring/20MHz filter applied

All of the following screenshots were taken with the x10 probe ground spring connected to GND of C1 and the probe pin spanned to the input of R9. A header pin was soldered to GND of C1, for convenience of connecting the probe spring.

Contact was maintained with hand pressure, only. The hand pressure could/was manipulated to obtain two types of results.
A) While the scope was in the Run Mode, hand pressure was manipulated, until the wave naturally settled into a recognizable form. It was then captured with the Stop Function. This connection resulted in a greater amplitude of the wave form than B, following. See TL and TS pngs.
B) The pin was connected without manipulation (just naturally placing the probe pin on the input of R9). The wave form was not recognizable, until captured with the Stop Function. This resulted in a lower amplitude of the wave form. See NTL and NTS pngs.
(Which is the proper means of testing?)

File Coding
x_xx = Amperage being sunk
TL = Hand manipulation A, above. Zoomed in.
TS = Hand manipulation A, above. Zoomed out.
NTL = No hand manipulation B, above. Zoomed in.
NTS = No hand manipulation B, above. Zoomed out.
SDS00021-24 = 2.00a and 2.32a loads, but they got out of order; order unknown.

The Stop Function was utilized. The Run Function shows much more noise, of course.

Conclusion: A 50KHz recurring ring/oscillation, of varying amplitude, is evident across all load values. What should I try, as a cure?


0.00a Load
No Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

0.00a Load
Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

0.50a Load
No Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

0.50a Load
Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

1.00a Load
No Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

1.00a Load
Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

1.50a Load
No Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

1.50a Load
Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

2.00a Load
Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

2.32a Load
Hand Manipulation
Zoomed in.
Zoomed out.

[t1d]

2.00a and 2.32a Loads
No Hand Manipulation
Zoomed in.
Zoomed out.
Order unknown.

Thank you for your continued patience and help!

[Kleinstein]

The signals all look like ringing as a consequence of the voltage source with a lot of ripple / spikes. So the first point would be to get a reasonable clean voltage source to test the circuit.  With a high ripple voltage source there will be some response to it, especially if still to a low speed.

It would also help to use more than just 1 channel, e.g. having one for the signal of interest (e.g. voltage across R9) and the other to something like the voltage of the source.
For the beginning just 1 or 2 pictures at a time should be enough - otherwise the thread only gets hard to read.

[t1d]

Firstly, Kleinstein, thank you for all you do to help me. You are most patient and dependable...

The signals all look like ringing as a consequence of the voltage source with a lot of ripple / spikes. So the first point would be to get a reasonable clean voltage source to test the circuit.  With a high ripple voltage source there will be some response to it, especially if still to a low speed.

I think I need clarification, here... When you say "voltage source," do you mean the SMPS Battery charger (the Device Under Test,) or do you mean the Wall Wart (Circuit) Power Supply?

- If the DUT Battery Charger, I could swap it out for a transformer having a full bridge rectifier and voltage regulator... That's about as clean as it is going to get...
- If the Wall Wart, I can try a different transformer...
Instructions?

It would also help to use more than just 1 channel, e.g. having one for the signal of interest (e.g. voltage across R9) and the other to something like the voltage of the source.

I think I can manage that, on the next test...

For the beginning just 1 or 2 pictures at a time should be enough - otherwise the thread only gets hard to read.

Well, I was trying to supply exactly what mk had asked for... Yes, it does get to be a bit much...

Which was the proper waveform type to capture, the hand-manipulated, settled waveform, or the just-touch-the-resistor-pin waveform?

[Kleinstein]

For the first tests the DUT should be a reasonable clean voltage source. The SMPS type charger is not suitable. Its more like transformer + rectifier and filter cap. The relatively slow 120 Hz ripple would not be so bad. So a voltage regulator is not absolutely needed, but makes it easier.

The waveform of interest should be the stationary signal, at least at first. Ideally this should be rather close to background noise.
A next step than would be the signal when connecting the DUT  (use single capture mode on the scope).

For connecting the probe it should be good enough to use the ground clip, no need to use the spring contact that is need for high frequency.

[not1xor1]

For the first tests the DUT should be a reasonable clean voltage source. The SMPS type charger is not suitable. Its more like transformer + rectifier and filter cap. The relatively slow 120 Hz ripple would not be so bad. So a voltage regulator is not absolutely needed, but makes it easier.

The waveform of interest should be the stationary signal, at least at first. Ideally this should be rather close to background noise.
A next step than would be the signal when connecting the DUT  (use single capture mode on the scope).

For connecting the probe it should be good enough to use the ground clip, no need to use the spring contact that is need for high frequency.

I suggest to do it Jim William's way (page 4) 

[t1d]

I played with the scope, a bit more, to try to learn it. I forgot to print each and every screen; a rookie mistake. But, I did write down the info, for some that I forgot to print.

Setup:
x10/GND Wire made to Meter Output GND/20MHz BW Limiter
@ 1A Load
Still using the original Wall Wart.

Positive V Reg
#33 Input pin – Stop print = 59.52Hz Sawtooth/432.0mV
#35 Output pin - Stop print = 50KHz Ring/76.00mV

Negative V Reg
#37 Input pin – Stop print = 60Hz Sawtooth/276.0mV
#38 Output pin - Run print   Missing Info = 49.75KHz Ring/72.00mV

Anyway, even just playing around, I thought the data might be interesting and tell us more about the original Wall Wart.

Is the amplitude of the mains 60Hz hum acceptable? 432.0/276.0mV? The 50KHz ring is evident on both the positive and negative rail...

Thanks.

[Kleinstein]

The 60 Hz hum level is acceptable for an unregulated source. However it is really odd to see 60 Hz and not 120 Hz.

For the curves, it's not clear what is actually measured. The supply should normally be cleaner than shown, especially with no load.

[t1d]

The 60 Hz hum level is acceptable for an unregulated source. However it is really odd to see 60 Hz and not 120 Hz.

For the curves, it's not clear what is actually measured. The supply should normally be cleaner than shown, especially with no load.

Well, as I said, I was just fooling around. I did mention the load; it was "@ 1Amp."

I'm not sure what you meant by "the  curves." What I was measuring was the input and output of the circuit's positive and negative rail voltage regulators.

Anyway, I am making up a new circuit voltage supply and a new transformer based DC PSU, with rectification and regulation, to use as the Device Under Test. Health issues have me slowed down, but I will get it done.

[t1d]

I am just bumping this thread, until I feel better and can get back to it. If someone wants to do the troubleshooting, and you're in the USA/48, I will send you a free test unit. Just send me a private message...
t1d

[t1d]

I have not worked on this project in a long while. Hopefully, this will be a re-start.

Where I think that we left off…
We were testing the single MOSFET test board. It has a few limitations; 1) the test rig heat sink and fan are not adequate for real burn-in testing, 2) the power supply needs to be improved and 3) the Test PCB layout is not optimal.

Additionally, we were looking at various waves forms…
The wave form on the power supply had a questionable 60Hz frequency. This made it impossible to look at the wave forms on the MFET input pin and across the sink resistor.

And, I did not have a power supply that would push the circuit to its design limit of 60 watts per MFET.

The two MFET board has been completely designed, with a better layout, and is ready to be produced, when testing is completed.

I think that is the essence of things. If I missed anything, please let me know.

Playing, today...
I have two new pieces of test equipment; A Siglent SMD3065X DMM and a SPD3303X-E PSU. Having these new toys inspired me to do some casual testing with the test rig.

I used a transformer-type AC wall wart, to power the DUT. (I think it may be suspect as well, but it would do for playing around.) I set the PSU (DUT) to 30v/2.1a. I was able to run the load up to a full 30v/2a without the DUT PSU going into constant current mode and the MFET did not go into saturation. I did this quickly, for fear of thermal damage to the MFET, due to the heat sink/fan limitations. The case temperature was 90*C and climbing, when I stopped the test. These results are promising, indeed.

I am not sure of how to relate the Operating Junction Temperature (175*C max) to the case reading. The Junction to Case perimeter is 0.7 max. An education, please?

A small scare…
I did have two oscilloscope probes in place; one on the MFET input pin and one one the Sink Resistor input pin. While adjusting the probe placement of the Sink Resistor probe, I encountered a spark. I do not know how it occurred.

I did check both probes and both oscilloscope inputs with the scope’s calibration output. Everything looks as it should be. I also cycled the scope’s power and it came back up just fine. It did not burn the probe point at all. So, I am hoping that I did not do any damage.

Speaking of probes, I have ordered all the parts necessary to make up some high-quality Kelvin probes. So, if they would be helpful for taking any particular readings, please let me know.

Where to go from here...
Build the transformer based power supply and fully test it. Once completed, place it in the project case. Also bodge the test rig into the project case to attach the MFET to the large heat sink. Do some static load testing of the MFET. Do some variable/wave form load testing of the MFET by inputting waveforms through the AUX input.

As I have offered previously, I will provide a complete test unit to anyone in the USA/48 that can do serious/professional testing. I am not trying to make a commercial unit and, as I have done, I will release all of the project information.

So, your thoughts and suggestions as how to proceed would be much appreciated.

[Kleinstein]

The junction temperature is determined by he case temperature plus the temperature difference inside the case. So the temperature should be power divided by junction to case thermal resistance plus the case temperature. However the case temperature should be measured at the metal towards the heat sink, not the plastic body. The plastic surface can be closer to the junction temperature.

Testing to maximum power is usually on of the less critical points. Testing is more about checking that there is no oscillation, even with a slightly difficult power source (with some inductance - like a slightly longer cable to the supply or an added ferrite ring (to one cable).

With a new meter one could also check if the set current is constant. E.g. set the supply to some 5 V (to avoid excessive heat at the load) and check it a 1 A current is really constant over a time of a few minutes. A possible problem here is the shunt getting worm over time and thus changes its value.

[t1d]

Thank you so much, Kleinstein, for your continued support.

I will be sure to do your tests, after I get the power supply straightened out. I am working on that, now.

I have a transformer with appropriate voltage and I am doing some testing to look at its output.

[t1d]

Setups
Oscilloscope: x10—20MHz Filter=On – 5mV/Div – 20mS/Div (60Hz = 16.7mS)
DUT: Simulated by DC PSU = set to switch 0vdc/0a and 30vdc/2a, in and out.
DMM = Set to monitor the E-Load’s current load, but the loads were not recorded. Formal E-Load load regulation studies to are to follow.
New E-Load Power Supply Transformer – A used donor from stock on-hand = 120VAC/14.5VAC @ No Load – Single secondary.

General Arrangement
A fly-wire was soldered to the Positive Rail at the input of C4. Another fly-wire was soldered to the Negative Rail at the input of C1. Circuit neutral/ground was accessed through a previously added fly-wire on the output of C1. The readings were taken from these points.

General Procedure
The E-Load was allowed to run continuously. The load was switched from out to in. Readings were taken in both power states and from both rails. The observations were from the rails to circuit neutral/ground.

AC fluctuations were of the primary interest, but DC fluctuations were checked by simply toggling the coupling switch. No DC readings were observed, at all, for the given scope settings.

Conclusions
Positive Rail – AC No Load – Observed fluctuations were <9mVpp.


Positive Rail – AC Full Load – Observed fluctuations were <15mVpp.


Negative Rail – AC No Load – Observed fluctuations were <9mVpp.


Negative Rail – AC Full Load – Observed fluctuations were <15mVpp.


For both rails, maximum fluctuation occurred in instantaneous spikes and were encountered under full load.  Adding the extremes would indicate that the power supply circuit has a maximum fluctuation across the two rails of =<30mVpp. Given the un-optomized nature of the PCB layout, I would think these results to be good. Additional improvements might be had through PCB layout improvements and additional capacitor considerations.

Note: These results only consider a non-oscillating load. An oscillating load might cause quite different performance.

New Test Equipment
It is wonderfully huge fun to set up all the parts and pieces... proper test equipment, proper connector wires... to just press a button to take professional readings from your own design... to press a button to record the results...  Woot!

Did we achieve proper testing technique? What other tests need to be done?
If we wanted to curb the hair-spikes, how might we tweak the capacitance?
Other thoughts/suggestions?

Thanks, to all, for your help.

[Kleinstein]

The supply for the electronic load looks reasonable clean - a big step forward.
Now comes the really interesting part, is the current also not oscillating and constant.  Possible test points would be across the shunt and at the regulating OPs output.
To test a difficult DUT, one could add some inductance in series (e.g. some chokes or just a ling wire).

[t1d]

The supply for the electronic load looks reasonable clean - a big step forward.

Yes, I was well pleased, myself.

Now comes the really interesting part, is the current also not oscillating and constant.  Possible test points would be across the shunt and at the regulating OPs output.
To test a difficult DUT, one could add some inductance in series (e.g. some chokes or just a ling wire).

I think using an inductor would make for a better test procedure and I do have a supply. What value do you suggest?

I want to make sure that I understand how to set up the test... I am to use my PSU in the same manor as the prior testing, but I am to add an inductor in series with the PSU, between the PSU and the E-Load, on the positive lead... Correct?

Then, I am to take readings with the oscilloscope across the shunt resistor and at the regulating OPs output (which would be the MOSFET's input pin, correct?)

I think I have a better understanding of testing, now... This should not be too difficult to accomplish.

I appreciate your very kind help. I look forward to hearing your reply and continuing the tests.

[Kleinstein]

I would do the test first without an extra inductor. That is the simpler test and more normal use. For this test the DUT supply can be set to lower voltage (e.g. 5 or 10 V) to limit the heat at the MOSFET. Besides with the scope it may be worth checking the shunt voltage with a DMM over some time (warming of the circuit).

For the test with the inductor, it would be in series with the supply, probably slightly better in the positive lead  (the common mode capacitance to ground can make a small difference). Something like 10-100 µH should be OK if it can stand the current. There is slight chance the current sink can start oscillation, though it is designed not too. The case with series inductance is about the worst case, the current sink needs to be stable with.

[t1d]

Thank you, Kleinstein...
I will follow your directions and post my results, soon. But, I have not slept, so I will not attempt it, presently. No sleep and electricity do not mix well.<g> Maybe later in the night... I hope so; I'm excited!

[t1d]

Something like 10-100 µH should be OK if it can stand the current.

I did set up the E-Load test rig... But, I stopped, because your warning about the current has great wisdom and it kept speaking to me... sternly. I do think the current is a significant issue.

The small inductors that I have are the type that look similar to 1/2 watt resistors. Surely, a single one of them will not handle the current, even for the moment needed to take a reading. So, I will have to either combine a great many of them, or wrap my own inductor with large gauge wire.

Making one with large gauge wire would be safest. It appears that 55 turns of solid .8mm wire in 12 inches on a 4" air coil will make 100uH. I have a 4" cardboard tube and stranded lamp-cord wire. I will have to learn how strands will effect the calculations. I don't know anything about using inductors, so there is another learning curve. Building it is a delay for the E-Load project, but it should be a fun exercise.

Any suggestions would be very much appreciated, at this point.

[t1d]

I'm just keeping the thread current... I have built the DIY high-amp inductor. To prove it, I found a small circuit for testing inductors and I breadboarded it. It gave every odd results.

So, I checked with my brother and he gave me instructions for testing inductors with a frequency generator and oscilloscope. Everything is set up on the bench, but I hit a bump when setting the frequency to tune the voltage amplitude of the two test points.

I need to change the resistor to a different value. However, I ran out of steam. I will get back to it, asap... maybe even tonight...

[t1d]

I am fighting a respiratory bug, so all progress has been delayed.

@ Mr. Kleinstein
It occurred to me that I need to order the second set of boards that have the improved layout, at some point. But, the question is when/where to do that in the testing process.

It would be a waste to chase problems on the first board, if they were already corrected by the improved layout of the second board. So, when, in the testing process, should I order the second boards?

I would think that maybe that time is now. The constant current circuit is successfully regulating throughout the designed voltage and current limits. Aren't we just tweaking performance issues?

As a reminder, the second board is a dual-MOSFET board, having two mirror regulating circuits. I think it was last posted on page 2, at post #44. To be sure that the current project is posted, I will make an upload in a separate post. But, not tonight, as I have run out of steam.

I would also like to consider adding a feature that would turn off the circuit, once the voltage of the DUT has dropped to a certain voltage. This would be highly useful for testing battery performance, without discharging the battery beyond its low voltage limit. It occurred to me, because I need to cycle some unused batteries, to freshen them.

I think this will only require adding a few components... Is this as simple as adding a pot? I do not know, as this is beyond my knowledge. But, if it is a simple matter, I would appreciate your instruction of how to do it. Here is where I got the idea:
https://www.hackster.io/gleisonstorto/constant-current-load-with-cut-off-voltage-afe3e9

However, if this is a large endeavor that will significantly delay completion of the present design, I would not want to do it.

Thanks to everyone, for your continued help and support.

[Kleinstein]

If there are real errors, these should be fixed with the 1st board. So the 2 nd version could be ordered with a known working circuit. 

Adding a turn off when the voltage drops to far for a battery or similar could be a nice idea. It would need a little more than a pot to set the limit, but not that much. I would consider a OP as a comparator and NE555 as a kind of latching circuit.
Possibly one could add a counter to measure the time it took. A simple version could be just a binary counter with LEDs.

There are a few features one could add with a 2 nd board:

+ turn down the current when the current sink runs out of regulation. If the voltage drops to far the MOSFET would turn on all the way and could cause a spike if the voltage suddenly goes up again. This could happen with a bad contact to the DUT, or just turning on the DUT later.
 A logical solution would be a cross over to constant resistance mode, with a lower limit so that the regulator does not go out of regulation.

+ possibly an amplifier to read the voltage at the shunt(s) with good precision. This may help especially if one does not have a sensitive  meter that can resolve some 10 µV or 1 µV.

[t1d]

Thanks, Kleinstein. I have been playing with a Low Voltage Cutoff Circuit, this morning. The first attempt failed, but I see my error and it should be easily corrected. Maybe I will post my results on another thread, once completed.

However, I did realize that it would add a good amount to the project, so, I will just finish the original design. Simple enough, but more project creep.

The inductor is finished, but I still have not been able to test it and document its characteristics. I will, as soon as I feel better.

Merry Christmas to everyone.

[t1d]

I would do the test first without an extra inductor. That is the simpler test and more normal use. For this test the DUT supply can be set to lower voltage (e.g. 5 or 10 V) to limit the heat at the MOSFET. Besides with the scope it may be worth checking the shunt voltage with a DMM over some time (warming of the circuit).

@Kleinstein - You will recall that, while testing the the new power supply for the circuit, I was able to momentarily subject the circuit to its designs limits of 30v at 2a and it worked without issues. See Post #159. So, I am ready to do this test.

Please give me an overview of what we want to accomplish and the specifics of what needs to be done... Volts, amps, soak time, test points, etc. Are we just looking at the circuits performance over time and warming?

For the test with the inductor, it would be in series with the supply, probably slightly better in the positive lead  (the common mode capacitance to ground can make a small difference). Something like 10-100 µH should be OK if it can stand the current. There is slight chance the current sink can start oscillation, though it is designed not too. The case with series inductance is about the worst case, the current sink needs to be stable with.

I have finished building the DIY High-Amp Inductor. It should handle the full wattage of the design limits without problem... even for the dual MOSFET version, when it is completed.

The inductor has two coils. The first, at the center tap, measures 38.38uH. The two, in series, measure 151.637uH. I find the none-linear nature of the inductance odd, as the coil was made from a single wire pair, but that will have to be a discussion for a separate thread.

[Kleinstein]

The test with a DMM at the shunt is to look for stability of the set voltage. So for drift in the OPs etc., e.g. with warming. If in addition the current is measured one could also check if the shunt changes with temperature.

With inductors it is normal that inductance does not increase linear with the turn. Ideally is should be closer to a square law - not perfect as the coupling between the parts of the coils is not perfect. The test with the inductor is kind of the worst case for stability.

[t1d]

The test with a DMM at the shunt is to look for stability of the set voltage. So for drift in the OPs etc., e.g. with warming. If in addition the current is measured one could also check if the shunt changes with temperature.

May I please have the setup and testing method details. This is really all above my skill level, so the details really help. Thank you for this extra effort.

With inductors it is normal that inductance does not increase linear with the turn. Ideally is should be closer to a square law - not perfect as the coupling between the parts of the coils is not perfect. The test with the inductor is kind of the worst case for stability.

I am glad to know that I likely did not make a mistake when I built it.

[t1d]

I did a soak test, pending Kleinstein’s exact instructions.

Test Initiation
The intent of the test was to monitor the E-Load’s performance at 10v/1a=10w, over time.

Because I am unfamiliar with my oscilloscope, it took me about thirty minutes to find the waveforms and adjust the scope. The E-Load was working during this time. Meaning the E-Load and all the test equipment was fully warmed, when I took the first readings.

Initial Readings
Ambient temp was about 23.8*C.
Time: 2pm
PSU as DUT: set at 9.99Vdc @ 1.4A available. The extra 0.4A on the PSU was allowed to see if the E-Load would drift.
E-Load was set at 0.099945A x 10 (Shunt Factor).  The E-Load does not have provision to limit the voltage, so the voltage was the full voltage available.
MOSFET Face Temp: 36.7*C
Shunt/Sink Resistor Touch Test: Tepid, not hot, or cold.
See PNG2 for waveforms.
Yellow: Probe1 was attached to a flywire soldered to the output of R6, which is tied directly to the input of the MOSFET.
Purple: Probe2 was attached to the input pin of the Shunt/Sink Resistor; R9
Both probe ground leads were tied to circuit ground/neutral.


One Hour Soak Readings
Ambient temp was about 23.8*C.
Time: 3pm
PSU as DUT: set at 9.99Vdc @ 1.4A available. The extra 0.4A on the PSU was allowed to see if the E-Load would drift.
E-Load drifted slightly to 0.099928A x 10 (Shunt Factor).  The E-Load does not have provision to limit the voltage, so the voltage was the full voltage available.
MOSFET Face Temp: 37.0*C
Shunt/Sink Resistor Touch Test: Tepid, not hot, or cold; no discernible change.
See PNG3 for waveforms.
Yellow: Probe1 was attached to a flywire soldered to the output of R6, which is tied directly to the input of the MOSFET.
Purple: Probe2 was attached to the input pin of the Shunt/Sink Resistor; R9
Both probe ground leads were tied to circuit ground/neutral.


Conclusion
At 10v/1a = 10w, the E-Load exhibited minimal drift in the load sunk. 0.99945A – 0.99928A = 0.00017A. 0.00017A/0.99945A = 0.000017% Current Drift.
The MOSFET Face Temperature drifted from 36.7*C to 37.0*C, being a drift of only 37.0 – 36.7 = 0.3. 0.3/36.7 = 11.01%
The Shunt/Sink Resistor performed without labor/heat.
No errant waveforms were encountered.

The minimal current change is considered excellent for a DIY device. The temperature change is attributed to ambient influences and is considered not significant.

I performed the test under my best-guess as to what Kleinstein might instruct. If I did the test mostly correctly, then I am impressed with the results. Pushing the E-Load to its designs limits will be interesting.

[Kleinstein]

There is still some AC part visible in the scope traces. Not very much, but still. This could be something like EMI effects.
The drift measured as the voltage drop over the shunt is only part of the actual drift - it does not include the shunt itself. However it is not that easy to see how much the shunt itself changes with temperature, as one would need a second, better shunt of meter.

The temperature drift is not important. The relevant result from the test is more the temperature rise above ambient of some 13K. This would suggest the heat sink would reach 50 C at about 20 W. So 20 W should be pretty safe even for longer times. And from 40 W on one could expect excessive temperatures.

[t1d]

There is still some AC part visible in the scope traces. Not very much, but still. This could be something like EMI effects.

1) I do very much believe this is just ambient noise. I could turn off the unit and see what is still left on the scope.
2) I did switch the coupling to DC. There was no DC, on either probe.
Do we need to increase the value of the existing capacitors, or add additional ones? What needs to be done?

The temperature drift is not important. The relevant result from the test is more the temperature rise above ambient of some 13K. This would suggest the heat sink would reach 50 C at about 20 W. So 20 W should be pretty safe even for longer times. And from 40 W on one could expect excessive temperatures.

Please remember that the heat sink/cooling for the test rig is wholly inadequate for permanent operations. It is just a ~80mm x 80mm x 2mm aluminum plate with a 60mm 12vdc fan. Even so, in prior testing, I was able to momentarily load the unit to 60w. The face of the MFET went to 90*C and was climbing, so I shut it down, quickly.

The heat sink in the final case is massive and has a 120mm 120vdc computer case fan. I would be glad to install the board in the case, whenever you think best. I had also considered that, if I had the Dual-MOSFET board, now, I could go ahead and install it in the final case. This would make for more accurate testing of the design.

I look forward to your instructions for any hardware changes and the steps for the next test.

I am so grateful for your help. We are making good progress and you are teaching so very much; thank you.

[Kleinstein]

The shown scope traces are with a rather fine time scale. The visible "frequency"  is thus rather high - higher than expected for oscillations of the OP. Also it does not look like a single frequency, more like noise or EMI (e.g. FM radio).  This could be coupled to the circuit or as well picked up by the ground wire of the probe.  Chances are there could be a similar level without the circuit or just from the supply / mains.

If it is really related to the circuit it would be more like a slightly larger gate resistor. The OP is likely not fast enough.
Chances are the circuit is OK as it is.

For a small heat sink with fan the temperature rise is not that bad. At some point there is not much sense in improving the heat sink, as there is also thermal resistance in the FET itself and the case to heat sink interface. So a little more is OK, but not much more is needed with a fan.

It could be time to think about the extra circuit to limit saturation with the FET all the way on. This is already beyond the normal electronic load, but it would absolutely make sense to avoid possible spikes o turn on. My idea would be to add some kind of switch over to a constant resistance mode if the voltage is too low. This is a little like the CV to CC mode switch over in a lab supply. So if the voltage is too low, the current setting gets reduced to a level about proportional to the voltage. With an an adjustable limit this may also work as a constant resistance mode. Existing circuits for resistance emulation may be a good starting point.

 

[t1d]

Thanks, Kleinstein,

My expectation was that the next step was to test the circuit using the inductor that I built for that purpose. If we just missed that, what are the test perimeters? The same as the last test, but add the inductor?

As for designing a current limiter...
1) The MOSFET did not saturate even at the full design goal voltage and current; 30V @ 2A = 60W. However, because of the MOSFET's increasing heat, the circuit only remained at this level for a moment, or two. And, no auxiliary oscillation was injected.
2) Designing a CC circuit is above my present pay grade. But, maybe one day...

[t1d]

Inductance Test
Feb 9th/2020

Purpose
To add inductance in series with the positive leg of the load and observe the circuit’s reaction.

Setup
Probe #1 – Yellow – Attached to MOSFET input pin. A 15.0mV offset may have been left on, throughout testing.
Probe #2 – Purple – Attached to shunt resistor input pin.
38.38uH of inductance was added in series with the load on the positive leg.
Beginning ambient temperature 22-23*C.
The current setting of the circuit was determined with a separate DMM.
The face temperature of the MOSFET was determined with a separate DMM.

Ambient Noise
This picture was taken after the end of the first test level. The test system was left fully in place and the only change made was that the PSU supply was switched to standby.


First Level of Testing
PSU set to 10.0v and 1.4a. The addition of 0.40a was added to test for circuit advancement beyond the circuit’s current setting of 1.0a.
Circuit set to 1.0a
Soak time = 30 minutes
MOSFET face temperature revolved around 35*C, with minor variations.


Second Level of Testing
PSU set to 30.0v and 2.4a. The addition of 0.40a was added to test for circuit advancement beyond the circuit’s current setting of 2.0a.
Circuit set to 2.0a
Soak time = 30 additional minutes
MOSFET face temperature revolved around 108*C, with minor variations.


Observations
Both positive and negative amplitude variations were observed at both test levels. They manifested as signal jumps, being whole lines, or slopes. It is important to note that these events were not spikes. The current sunk remainded steady and had only minor float.

I am not experienced enough with my scope to collect the max/min data through the scope’s functions. But, I did try to use the max/min settings and I was able to see 400mV readings, most often, during the instantaneous fluctuations. This same 400mV reading was observed with the supply set to standby, but it occurred as spikes. I am not saying that the maximum reading was 400mV, only that it occurred enough for me to see it among the flashes.

Conclusion
The jumps in amplitude will be investigated. I think my new scope can record a session. If so, I will repeat the test and make a movie.

My guess is that the jumps in amplitude may be a build up and collapse of the inductance? This is beyond my present knowledge, but I am sure Kleinstein can set us straight.

I would think that the majority of the noise observed is from ambient sources.

The results are encouraging. With the circuit at its full design limits, 30v/2a/60w and with inductance added, the circuit yielded these results…
- Steady current sinking operations.
- Low noise.
- Low MOSFET face temperature

We are, again, in need of Kleinstein’s wisdom and knowledge… To draw conclusions from the above… And, to determine what needs to be done next.

One additional thought… I have recently learned about current mirrors and I wonder if one might be useful to balance the load between the two MOSFETs, in the Dual MOSFET model.

[Kleinstein]

The inductance could effect the response to things like steps in the DUT voltage, as this is the difficult load case. I would expect the circuit to behave well. So the test is more like just in case and to make sure it really does. From the scope pictures it is hard to tell if this is just noise / external picked up interference.

For better visibility one could try adding some jumps to the set current, e.g. make the load go 0.5 A to 0.6 A and back. The active steps in the current are a little different from an external disturbance, but not to much. Such load jumps could also be a good test for a regulator, though the more normal way it with 2 separate loads and switching on hard on / off.

[t1d]

Thanks, Kleinstein!
How about a square wave, through the auxiliary input. Would that do it? If so, what frequency/amplitude/etc... My Function generator only goes to 2MHz and I think the max amplitude drops to 10Vpp.

Edit: Oops... We are talking about switching the current. So, yes, my PSU has two channels and I can switch between them. I will do the test and report back. Thanks!
Edit2: Hmm..  I think this will require learning how to set up the PSU to trigger. I will need to tie the scope to it, to catch the change. Sounds like lots of fun...

[Kleinstein]

The external set input and function generator is perfect for the test. I would try it with a square, at low frequency (e.g. 100 Hz - 1 kHz) and something like 0.5 /0.6 A, so not all the way to zero and not full current.

[t1d]

The external set input and function generator is perfect for the test. I would try it with a square, at low frequency (e.g. 100 Hz - 1 kHz) and something like 0.5 /0.6 A, so not all the way to zero and not full current.

My Function Generator only has an adjustable voltage. The current is fixed and the (short) instructions do not say what it is. See picture.


However, my new PSU does have a Timer output that allows you to select voltage, current and timer intervals. See picture.


With either instrument, I will need to learn how set up my new oscilloscope to trigger and how to connect all the instruments. But, I am determined to work it out.

Thank you for your support and help.

[Kleinstein]

Of cause the Fgen has a voltage output. It is the job of the electronic load to convert from control voltage to current.  This may need an offset to the output at the Fgen. So something like 0.5 / 0.6 V from the generator if the load gives 1 A/V.

[t1d]

Of cause the Fgen has a voltage output. It is the job of the electronic load to convert from control voltage to current.

Sorry, no sleep, yet again, and your prior message said "0.5/0.6 A." 

This may need an offset to the output at the Fgen. So something like 0.5 / 0.6 V from the generator if the load gives 1 A/V.

I will repeat your instructions, so I can make sure that I understand... Set the voltage amplitude of the Function Generator to 0.5/0.6V and its square wave frequency to 100 - 1KHz. Set the electronic load to 1 amp per volt. Do I have it correctly now?

[Kleinstein]

The Fgen should be more like 0.1 V (peak to peak) amplitude and a 0.55 V (or similar) offset. So the voltage would change between some 0.5 and 0.6 V. The offset could be from the Fgen or maybe from the load circuit if it permits.

The 0.5 and 0.6 A value was meant for the resulting current of the load and not the FGen. Sorry for the confusing text.

[t1d]

The Fgen should be more like 0.1 V (peak to peak) amplitude and a 0.55 V (or similar) offset. So the voltage would change between some 0.5 and 0.6 V. The offset could be from the Fgen or maybe from the load circuit if it permits.

I think I have it, now. Thank you for the extra explanation.

The 0.5 and 0.6 A value was meant for the resulting current of the load and not the FGen. Sorry for the confusing text.

No worries, at all. You are very gracious with your time, knowledge, effort and expertise. And, you are very patient with my lack of knowledge. Thank you!

Amazingly, we have come a long way and made good progress. I think we are close to being able to say we have a complete project and that it works well. Your design is proving to be very robust.

[t1d]

I checked and the function generator does have an offset. So, I will report back to you, when I have completed the test. Thanks.

[t1d]

Setups

E_Load
Voltage = 1V
Amperage = 1.0A

DUT = PSU
Voltage = 1V
Amperage = 1.1A (0.1 added to look for drift.)

Function Generator
Wave Type = Square
Frequency = 501.16 ~ 501.22Hz (The drift is due to the age of the unit.)
VPP = 584mV (This is the units minimum setting.)
Offset – +0.50V
Impedance = 600 Ohms

Oscilloscope
Both Test Probes = x10/20MHz
Probe 1 – Yellow = Attached to a fly-wire soldered to the board at the MOSFET Gate.
Probe 2 – Purple =  Attached to the input of the Shunt Resistor.
BNC Lead Ch 3 = x1/20MHz. Was attached after testing to take picture to show the Function Generator waveform.

MOSFET Face Temperature
Was monitored with a separate multimeter.

Environment
The florescent light bulb that is on the same house circuit was turned off for these tests.

Results
The E-Load performed as expected. The current was sunk steadily and consistently. The waveform was transformed to a triangular shape, but was not degraded.

The auxiliary input worked as expected.

The MOSFET’s face temperature rose less than 2*C above ambient.

I am well pleased with the results.

Kleinstein, what do you see?
What needs to be corrected and how?
What are your instructions for what to do next?
Thank you so much for your contributions to the project. I am having great fun and I hope you are too.

Picture 1 - Yellow = MOSFET Gate


Picture 2 - Purple = Shunt Resistor Input


Picture 3 - Function Generator Waveform

[Kleinstein]

The gate waveform looks more like triangle and not much visible at the shunt.  The triangle waveform points towards a low bandwidth somewhere. If this is before the control loop, one could change this. The control loop is not very fast, but I expect a higher speed. Anyway one could lower the frequency for a start to see at least something that is similar to a square at the gate.
For the test I would use a little more than 1 V from the supply, more like 5 V to give the load something to work with. If available a larger series resistor (e.g. at the negative side to the supply) one could see the current with higher resolution. To limit the power one may chose a lower current range (e.g. 50 mA - 100 mA).

[t1d]

... Anyway one could lower the frequency for a start to see at least something that is similar to a square at the gate. For the test I would use a little more than 1 V from the supply, more like 5 V to give the load something to work with.

If available a larger series resistor (e.g. at the negative side to the supply) one could see the current with higher resolution. To limit the power one may chose a lower current range (e.g. 50 mA - 100 mA).

I did a new test and tried to match your setting instructions. See the following post.

I did the test without the additional series resistor on the negative side of the supply. I need your instructions as to what resistor(s) to use. In power resistors, I have available:
(4 Each) 1R/10%/5W
(2 Each) 10R/5%/5W
(1 Each) 220R/5%/5W

[t1d]

Setups
Function Generator:
101Hz/VPP=5.20/Offset=+0.92v/Termination=50R

Scope:
For a picture of the Function Generator Setup(Picture 4): Channel 3/Blue/BNC Cable = x1/BWL=20M/DC Coupled

Probes:
Channel 1 – Yellow/x10/BWL=20M/DC Coupled/Gate Pin
Channel 2 – Purple/x10/BWL=20M/DC Coupled/Shunt Resistor Input

DUT:
PSU= 5V/0.14A (0.04A added to detect drift)

E-Load:
The Function Generator was removed from the scope and was connected to E-Load auxiliary input.
The DUT was connected to E-Load through the 38.38uH Inductor.
The E-Load was set to sink 0.11A

Picture 5 – Probes DC Coupled
Channel 1 shows the waveform at the Gate Pin. The waveform is already beginning to deform at this slow speed.
Channel 2 shows noise on the Shunt Resistor pin. See Picture 7 for additional findings on Shunt Resistor Input.

Picture 7 – Probes AC Coupled
I switched the coupling to AC, just to see what was there. That’s when I realized that there is a ring on the Shunt Resistor Pin concurrent with the change of direction of the waveform – rising to falling and falling to rising. This ring is 14.2mV in amplitude.

Conclusions:
The E-Load sunk the load steadily throughout the test.
The MOSFET face temperature remained just a degree, or two, above ambient.
The deformation of the waveform should be investigated and improved to higher frequencies.
The ring on the Shunt Pin Input should be investigated further and cured, if it is considered significant.

As always, Klienstein, I need your directions for what to do next and specifically how to set it up. Thank you, good sir.

[Kleinstein]

The gate voltage signal looks reasonable, though relatively slow. Anyway better to start a little slow than oscillating. So if the measurement of the current is OK, one could consider a speed up with slightly smaller capacitors. One could also compare the measurement to a simulation. The simulation could than give a hint on how small the capacitor can be.

There seem to be some RF background on the signal at the shunt. However this signal looks more like coupled from the outside than with an origin in the circuit. The amplitude is changing at more random times, not related to the signal.
To really see the signal one could have another resistor in the current path (could be at the negative side) a larger resistor in the 10 Ohms range should give more signal and still not too much power to heat up the resistor too much.

[t1d]

Thanks, Kleinstein!

The gate voltage signal looks reasonable, though relatively slow. Anyway better to start a little slow than oscillating. So if the measurement of the current is OK, one could consider a speed up with slightly smaller capacitors.

I am sorry to be so unlearned, but I need you to tell me which caps and what values to try.

One could also compare the measurement to a simulation. The simulation could than give a hint on how small the capacitor can be.

I have not learned to do simulations, yet. Maybe someone following the thread could contribute that for us.

To really see the signal one could have another resistor in the current path (could be at the negative side) a larger resistor in the 10 Ohms range should give more signal and still not too much power to heat up the resistor too much.

I believe that I have enough directions to do this part, on the next round of tests.

I do appreciate you so much!

[t1d]

This post will be about where the project stands, at present, and what I intend to do to wrap it up...

Testing of the Single-MOSFET design stopped in March, without necessarily being considered as completed. However, I have been using the test rig in regular use and find that...
1) It meets the design goals to be able to sink 2A/30V/60W. Actually, I think it can handle more than that. The MOSFET has never heated up to its rated limit, even with the poor heat sink and fan.
2) It has never saturated the MOSFET, gone into oscillation, or exhibited other errant behavior.
3) It has never caught on fire. lol...

This is not to say that my occasional use has adequately proven all functions. The Auxiliary (Function Generator) Input has never been used, for example. I will leave it to each individual that wants to build the device to make their own tests and conclusions. However, the Dual-MOSFET board is laid out better and should be even more robust.

To complete the project, several things need to be done to the Dual-MOSFET design...
1) Consider if the Dual-MOSFET design needs any additional circuitry to balance the load between the two sets of circuits. I really need the group's input, on this point.
2) Add Test Points to the PCB.
3) Change the Voltage Regulator specifications from the LM7(8&9) series to regulators that have more current output. This is just a precaution. It does not require any changes to the PCB.
4) Order the PCBs and build one out.
5) Do a little testing.
6) Change out the errant power supply in the permanent case, for the one that I have been using and know to work without terrible oscillations.
7) Install the PCB and heat sink in the permanent case.
8.) Remove the case from the kitchen counter, where it has been sitting all this time, and put it in the lab.

I have attached the Dual-MOSFET schematic, here, to save hunting for it in the earlier posts. The additional balancing circuitry is pending, of course. I am eager to hear from you, in that regard.

EDIT: I have discovered that the Voltage Reference circuitry is incorrect. See the additional image, for the needed correction. I will post the updated files, after further testing reveals any additional errors.







 

[Kleinstein]

There is no need for some extra circuit to get precision balancing. There may be a small difference according to the OPs offset (likely some 10-100 mA), but this should be Ok and only a small part of the possible capacity.


There are a few possible additions one could consider:
1)  some temperature sensing and emergency off in case of too much.
2)  provision to sense the output voltage (high resistance divider)
3) together with 2) possibly a way to limit the current when the voltage drops too far. This could be a kind of constant resistance more that takes over. This would be a little like the CV/CC mode in a lab supply: one the voltage drops to far and this the effective resistance to low, there is a minimum resistance (e.g. some 0.2 Ohms here). So the load would be constant current / constant resistance. This extra part would avoid possible overshoot from MOSFET saturation / wind-up.

[t1d]

Kleinstein, it is wonderful to hear from you!

There is no need for some extra circuit to get precision balancing. There may be a small difference according to the OPs offset (likely some 10-100 mA), but this should be Ok and only a small part of the possible capacity.

That makes sense.

There are a few possible additions one could consider:
1)  some temperature sensing and emergency off in case of too much.
2)  provision to sense the output voltage (high resistance divider)
3) together with 2) possibly a way to limit the current when the voltage drops too far. This could be a kind of constant resistance more that takes over. This would be a little like the CV/CC mode in a lab supply: one the voltage drops to far and this the effective resistance to low, there is a minimum resistance (e.g. some 0.2 Ohms here). So the load would be constant current / constant resistance. This extra part would avoid possible overshoot from MOSFET saturation / wind-up.

Those are all really good suggestions. But, designing them is beyond my skills. Maybe someone will take up the project, where we have left off. All of your great technical advise and my KiCad files should give them a great head-start.

I did look at the current draw for doubling the circuit, in consideration of the 1 amp supply of the 7809/7909. Even doubled, the circuit draws very little. No worries. And, the 12V supply for the fan is outside of the circuit, so it does not make for any problems.

[t1d]

Even though I have not posted in a long while, this project has never been dead. lol I was able to get the Single MOSFET Design to work as intended. Then, I was side-tracked with other circuits. After creating enough to panelize a few designs, I moved on to ordering several panels. The Dual MOSFET Design was included in that order.

I received the Dual Boards and assembled one. I discovered several mistakes and made bodges to work around the errors.

In making initial tests, thereafter, I discovered that an oscillation/ringing is causing the MOSFETs to instantly saturate. I suspect that the Snubber component values need to be adjusted. I am in the process of doing some testing to get the numbers needed to calculate the new resistor and capacitor values. After I have those numbers, I will post, here. I am using the information at this link: http://paulorenato.com/index.php/electronics-diy/197-rc-snubber-calculator-spreadsheet Hopefully, I can get a picture posted, too.

I have extra copies of the board. I will send one, free of charge, to someone that will promise to assemble it as designed, do extensive testing on it and post their findings, here. Send me a Private Message, to discuss the details. USA/Lower48 only.

Electronic Load Boards have somewhat common circuits. If there are any boards left over after testing, I will send one to someone that wants to try different components. USA/Lower 48 only.

[t1d]

I did additionally testing. I, now, believe that I was just starving the DUT circuitry for voltage/amperage. The circuit seems to be working better. I am not seeing the ring that I thought I saw, before.

Presently, the only issue seems to be that there is not much swing on the pot. I attribute this to testing at low voltages and amperages, because the the unit is not attached to heat sinks/fan. So, I am moving forward to install the unit in its case, where I can test at full power.

[t1d]

I have long procrastinated in assembling the Dual E-Load into a proper case. I am endeavoring to do that, now, and new questions arise...

The most thermally efficient method for transferring heat from a MOSFET to its Heat Sink is to have the bare back of the MOSFET directly abutted (with proper paste) to the bare metal of the Heat Sink. Doing so requires consideration of the electrical isolation of the MOSFETs and/or Heat Sink...

Pin #2 of the MOSFETs is common to the heat pads, on their backs. The MOSFET pins are not so clearly identified on the Data Sheet, IMHO, however I believe PIN #2 to be their Drains. (DS attached.)

The Drains of the MOSFETs receive their input directly from the DUT. It would seem to me that connecting the Drains to the Heat Sink would simply make the Heat Sink an input path (an antenna, of sorts) for ambient noise, even if the Heat Sink were electrically isolated from the case, which it would need to be. Correct?

The next most efficient method for transferring heat to the Heat Sink is to use a Mica Insulator Pad, with Heat Sink Paste on both sides. As I need to isolate the MOSFET Drains, this is my best solution. Correct?

I do have proper Silicone Heat Sink pads, but, if I understand correctly, they are significantly less efficient at transferring heat. And, the removal of the heat is critical to this project.

I do have a proper case fan (120VAC/120mm) installed.

The Schematic can be found at Post #193.

So, I am desiring your thoughts and suggestions, please and thank you.

PS: I do have additional boards to share (for free) with anyone that is willing to commit to actually building one out and vigorously testing it. As these are prototype boards, some bodges are needed. Send me a private message, if you are interested. USA/Lower 48, only.

[Kleinstein]

There is not absolute need to isolate the drain from the heat sink. It can work with a life heat sink, especially if active cooling is used and the heat sink deep inside the case.

The power of the MOSFETs tends to be more limited by the SOA than the pure power. So cooling is not that important and one cannot use the Ptot anyway. So a silpad is OK. Mica conducts better, but the difference is no longer that large with paste + mica + paste if not perfectly mounted.
The is also the option of connecting the MOSFETs to a common heat spreader plate and than isolate that plate from the actial heat sink. with a larger area for thermal contact.
I see no clear winner here. All the solutions have there pros and cons.

The electronic sink usually is not for very low currents and noise pic-up is usually not that critical. With the more larger currents it is more about parasitic inductance than parasitic capacitance.

[t1d]

Hi, Kleinstein! Thank you for continuing to help me.

There is not absolute need to isolate the drain from the heat sink.

My case is metal and it is tied to Earth Ground. If I don't isolate the MOSFET and/or the aluminum Heat Sink, won't that short the Drain to Earth Ground?

It can work with a life heat sink, especially if active cooling is used and the heat sink deep inside the case.

I am sorry, but I do not understand the term "life heat sink." Do you mean live heat sink? Meaning that the heat sink is actively tied to Earth Ground?

So cooling is not that important and one cannot use the Ptot anyway. So a silpad is OK.

I am sorry, but I do not understand the term "Ptot." Please clarify. It is good to know that a Silpad is acceptable. I have that in stock.
Thank you, again!