Fast comparators for logic analyzer inputs

[dxl]

Hi all,

i've got a Lauterbach Logic Analyzer (named Powerintegrator). Unfortunately i don't have any probes for it, and Lauterbach wants ~400EUR for one 17 channel probe. As i have other full-featured LAs, that's way to much for me. I only want that one because sometimes it might be helpful to have logic analyzer traces related to JTAG debugging.

So i'm thinking about building that cable by myself. Does anyone have some recommendations for Ultra-fast comperators? The Logic Analyzer takes 3.3V CMOS input level (guessed, switching threshold is at 2V), and provides a reference voltage for the comparator. Lauterbach states that the LA can do 500MHz.

Thanks

[danadak]

Needless to say it would not be trivial to do a layout that guaranteed skew, pulse
distortion at 500 Mhz.


TI makes 700 pS comparators, Analog devices in the tens of pS range parts.


Regards, Dana.

[smoothVTer]

The part(s) danadak refers to is this series:

http://www.analog.com/en/products/linear-products/comparators/adcmp582.html

( Thanks, danadak )

Really cool stuff ... 37ps  rise time ( in ideal conditions )        Some folks have used this part, along with a carefully laid-out and impedance controlled PCB to build fast-edge pulse generators for DSO bandwidth measurement. 

I wonder if there's any commercially available parts out there similar to this but with rise times ~10ps?   I would be willing to buy a $100+  piece of Sige, GaAs, or other just for the challenge of designing this experiment.

[tggzzz]

I wonder if there's any commercially available parts out there similar to this but with rise times ~10ps?   I would be willing to buy a $100+  piece of Sige, GaAs, or other just for the challenge of designing this experiment.

HMC874: fall time 15ps (rise time 24ns), available from Mouser etc, apparently
http://www.analog.com/en/products/linear-products/comparators/high-speed-comparators-lessthan-100ns-propagation-delay/hmc874.html

[Marco]

I'd simply try 630 Mbps LVDS receivers. Combine with this probe cable (has a resistor in the probes I think, high speed LA probes are generally passive divider probes, dunno if the termination is built into the connector for the LA though).

[David Hess]

Older logic analyser probe designs which are documented use a fast JFET input pair as part of a comparator.  Unfortunately, fast JFET input comparators were never common and last time I looked were not available.

This is still the topology I would use however; use a matched JFET pair to drive a differential line receiver in the logic family of your choice.  For a less universal design, just a differential line receiver can be used.

[Marco]

You only really need the JFETs to be able to use a very high input impedance at low frequencies, where the LVDS receiver bias current would cause too much voltage shift.

Even if that's really important to you, you can use AC coupling with DC restoration with a FET input opamp. No longer any bias current needed so you can use any input impedance you want at low frequency. Opamp manufacturers have an easier time matching FETs.

[dxl]

I think i try a design with the ADA4891 as a first step. 100-200MHz should be more than enough for that kind of LA - if i need faster acquisition i can still use the Tektronix LA i have.