Should be able to do it in slightly fewer, due to this being a sorting problem (of sorts) and sorting problems being guaranteed N log N worst case complexity.
Not that this helps much at small N, and indeed, if N = 4, then 4 lg(4) = 4*2 = 8, so the 6-comparator solution given earlier can't be too far from there.
I suspect it's possible to save some comparators, in exchange for more logic (e.g., doing pairwise comparisons on ordered sets; using analog muxes to compare pairs in sequence, latch the state and resolve the sampled result; etc.), but this probably won't save many transistors or much space.
The analog method is to use a max(a, b, c, d) circuit and monitor the current through each diode; only one will be active at a time (outside of a transition range, which we can make arbitrarily narrow with op-amps).
To improve on spec's proposal: instead of a pull-down resistor, first just use a current sink instead of a pull-down resistor. This keeps the offset, transition band, and speed more consistent over the operating range, and lets us work with it more easily, at least for now.
Either:
- In place of the diodes, use transistors to detect when a channel is active. That is, the pull-down current is communicated through the active transistor's collector, to a load resistor, which probably needs a level shift to get back to a standard logic level (say if the A through D inputs are 0-5V, and the output is 5V CMOS logic level). So we'd need four NPNs and four PNPs, plus resistors (the PNPs can be the "prebiased" or "digital" kind, saving on components).
- When a channel is "losing", its op-amp is saturated to -V. In an active rectifier circuit, we often use a diode from -in to out, to reduce integrator windup (i.e., holding the output at (-in) - Vf rather than allowing it to saturate to the full -V, saving slewing time when that signal turns back on). We can capture this with crude comparators (probably just transistors or diodes), and resolve state with logic if necessary. (This is probably not as nice of a method, so I haven't fleshed it out as well.)
Similar logic applies to this circuit as well, though being just a two-channel min(a, b) implementation for a particular situation (i.e., wrapping around an error amplifier).
https://www.seventransistorlabs.com/Images/Limiter2.png By adding a logic output to the diff pair, a comparison output is available; this could be scaled to any number of limit inputs, if such were needed. This works very nicely for a power supply where you want V/I limiting and indication. The 4-variable version works just the same, but with more process variables.
Tim