Author Topic: gate switching time & digital noise?  (Read 1576 times)

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Offline k8943Topic starter

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gate switching time & digital noise?
« on: June 24, 2017, 06:58:48 pm »
Had a single channel SPI connection between PIC and external ADC.

Noticed there were noise spikes all over the circuit that matched the edges of the data waveform. No noise spikes related to the Clock line.

Zooming in on both noticed that

- on the Clock line the PIC18F would pull high or low over about 30ns;
- on the Data line the ADC would pull it high or low in only 5ns;

I guess that's why the ADC (AD7780) was able to generate noise?

Anyone have anything to say about this? Amongst other things, how is the ADC so much faster at switching than the PIC? (Both connections are from adjacent pins and on identical parallel wires....)

btw. "fixed" the problem (the spikes were actually generating errors in the ADC) by putting a 1k resistor series with the data line: it reduced them to non-critical levels.

Photos show: a) large noise spikes correlated with data waveform (last 8 status bits are all "1" because "unhappy") ; b) spikes moderated by adding 1k resistor (last 8 status bits are now "healthy"); c) a zoom on a high-low transition showing how the data line is much zippier than the clock!
« Last Edit: June 25, 2017, 04:25:03 am by k8943 »
 

Offline DaJMasta

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Re: gate switching time & digital noise?
« Reply #1 on: June 24, 2017, 07:19:27 pm »
Is this a dev board or your own design for the ADC board?  Have you looked at the decoupling diagram in the app note?  They've got inductors (ferrite beads) on every supply pin because they know this will happen  :)


If you're clocking this thing to the limit, it is sampling at up to 40Msamples/sec full speed, so the transition times on the outputs have to be very sharp - and with quick digital transitions comes noise in the power supply (and radiated noise from traces and such).  Proper decoupling with added ferrites is critical to suppressing these tiny spikes, as it's going to be effecting the noise performance on the input end as well.

Things like isolating its own power supply or limiting output current can help too, but ideally your data lines are running into a fairly high impedance, so by increasing that resistance further you do slow the transitions, but you also reduce signal integrity, so it's not an ideal solution.
 

Offline k8943Topic starter

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Re: gate switching time & digital noise?
« Reply #2 on: June 24, 2017, 07:24:27 pm »
Interesting.

Yes it's the Evaluation board - which itself can be configured in many different ways and does have 0.1uF and 10uF caps on analogue and digital power pins. I just applied the same external voltage source as for the PIC (which is on a breadboard).

The ADC is set to provide 10 results / second to the PIC so the communications themselves are quite slow.

I don't really know what I"m talking about but did look at a random MOSFET datasheet and see that switching times were about 30ns.

So perhaps the PIC's performance is "normal"? In which case how does the ADC switch so fast? Or is that fast?
 

Offline DaJMasta

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Re: gate switching time & digital noise?
« Reply #3 on: June 24, 2017, 08:32:10 pm »
I don't have the knowledge of the processes used, but think of it as the difference in speed between 4000 series CMOS and 74ALS or similar - by using a different process and differences in the design of individual transistors on the die, you can improve the switching speed dramatically - there's some fast TTL series that switch at <2ns, and of course if you're going to be running anything over a GHz then you're going to need <0.5ns transition times or you signal is still rising/falling when you need to start the next edge!


Surprised that it's happening on a dev board, though, does it have an onboard regulator that you can use to isolate your power supply?  Is there perhaps some coupling between the data lines and the power lines (are they next to each other for a distance) that may actually be reintroducing the high speed noise into the power supply?  While it is a normal thing to come across in designing with higher speed devices, I'd expect Analog Devices to make a dev board that wasn't doing that on its own.
 

Offline k8943Topic starter

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Re: gate switching time & digital noise?
« Reply #4 on: June 25, 2017, 04:33:33 am »
The schematic for the dev board is here on page 9.

http://www.analog.com/media/en/technical-documentation/user-guides/UG-078.pdf

I've connected jumper wires to my PIC18F from the relevant LK7 and LK8 jumpers on the schematic - at the same time disconnecting the ADC from the microcontroller on the dev board.

There's also a built in 3.3v low dropout regulator one can use on the board, if one plugs it into a 5v USB source. I tried that and it works "much better". So for ages I thought the problem was my choice of external power source. However it turns out that those spikes are still occurring: they are just 3.3v / 5v times as high, which reduces them to a non-disruptive level!

I guess it may have something to do with my jumper leads (15cm breadboard male->female) supplying inductance/capacitance whatever and so none of this shows up on a PCB. But I got to thinking that it is all brought to the fore by the difference in switching time?

Here's a guess: perhaps a PIC has a robust switching system (designed for up to circa 20mA) whereas the data-only gate on this ADC is very lightweight. In consequence they use different technologies and the price the PIC pays for its power handling capabilities is that it is slower? That the side-effect of that slowness is that it works better over jumper wires?!
 


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