Author Topic: Grant Searle Z80 SBC troubleshooting  (Read 10230 times)

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Offline 255Topic starter

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Grant Searle Z80 SBC troubleshooting
« on: September 22, 2018, 01:48:59 am »
Hi All,

I recently finished building a Z80 computer based on Grant Searle's design (32K RAM version.) However, I simply cannot get anything to display on my terminal program. I ensured proper continuity of the address and data buses as well as all the other control lines. It is not the FTDI cable, as I have tested it with another project and it functioned properly. I tried several terminal programs to no avail. I have triple checked each and every connection on the board with a multimeter and everything is wired perfectly without any shorting. I even replaced the 6850 ACIA with a 68B50 which is supposed to handle higher clock speeds. I rechecked the ROM image and that looked fine. I am running the computer off a 7.3728MHz oscillator, as per Grant's design, however, I think it may be too fast and causing timing issues. I have attached a photo of the clock signal, does it look OK? Any suggestions would be greatly appreciated.

-Adam
« Last Edit: September 22, 2018, 01:50:30 am by 255 »
 

Online Ian.M

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #1 on: September 22, 2018, 03:02:07 am »
That clock looks like it may be excessively distorted, but unless you decrease the time/div by a factor of 10, and the volts/div by a factor of 5 so we can see a single cycle in detail, no one can be certain.

Also proper probing technique and scope setup is important:  Both the variable time/div and volts/div controls need to be at their CAL positions.  The Y offset needs to be adjusted with the input grounded to put the zero level right on a graticule line near the bottom of the screen, and you need to use a properly compensated x10 probe with as short a ground connection as is reasonably possible.

Assuming you've built it to the design at: http://searle.hostei.com/grant/z80/SimpleZ80_32K.html
I think the next step would be to pull the RAM and ROM chips  and patch in 8x 10K resistors as pulldowns to hold the databus low so the Z80 can only execute NOPs.   You can then check that the address lines are cycling correctly in binary sequence at every chip that uses them and check the M1 instruction read cycle waveforms and timing, and the various control signals to the RAM and ROM.

If you suspect the clock is too fast, get a 3.6864MHz crystal to replace the 7.3728MHz one, and decrease the PC terminal baud rate from 115200 to 57600. 
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #2 on: September 22, 2018, 03:20:04 am »
Thanks for the quick response.

I attached a photo of the clock signal at -x10 time/dev and -x5 volt/dev. Any better? I need to get my hands on a good digital scope with bus analyzing capabilities to check the machine cycles. In the mean time I will order up a 3.6864MHz oscillator.

-Adam
 

Offline DaJMasta

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #3 on: September 22, 2018, 03:54:55 am »
It doesn't look great, but it's probably passable.  Since the info isn't available on the screen the amplitude is correct and it doesn't go negative, correct?  Do you have a high frequency probe ground - some of the overshoot on the edges could be from the inductance of the ground lead.

Have you tried scoping any of the other pins when it's powered up to see if there's any activity even if nothing is making it to the terminal?  If you're using sockets, maybe it's worth reseating some chips or connectors to see if there's just a loose connection.
 

Online Ian.M

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #4 on: September 22, 2018, 04:08:13 am »
Your scope bandwidth is greater than your clock frequency by a factor of over five so it *should* look a lot better than that.  There's probably something *badly* wrong with your probing setup.  Are you using a x10 probe, is it properly compensated and is your ground connection for the probe as short as possible?

For comparison, I've plotted a bandwidth limited square wave with all harmonics above the 5th removed.  See attachment.   Note the shape and the approx 10% ripple on the top and bottom of the waveform due to the bandwidth limiting suppressing higher harmonics.

The glich (small peak and dip) about 25% up the rising edge is particularly suspicious, as I have myself had trouble with glitches on the rising clock edge preventing Z80 instruction execution.
 

Offline james_s

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #5 on: September 22, 2018, 05:19:28 am »
Do you have activity on the chip enable pins? Are you *sure* everything is wired properly? It only takes *one* wire in the wrong place for the whole thing to not work.
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #6 on: September 22, 2018, 05:42:46 am »
Could you elaborate on the high-frequency probe ground. Whats the best way to clean up how the wave form appears on the scope? Thanks.
 

Offline DaJMasta

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #7 on: September 22, 2018, 05:53:03 am »
Dave has some videos on good probing on scopes, but the long and short of it is that you want the shortest loop between the probing point and the probe's ground to minimize parasitic inductance, which can cause overshoot to show up which isn't actually in the signal being probed.  For many probes, this involves a small spring with a wire sticking out in the direction of the probe tip as your ground instead of the normal hook attachment and the alligator lead ground that you're probably used to using.


This all being said, have you checked with the scope for activity elsewhere?  If the rest of the thing isn't doing anything, then the clock could certainly be an issue, but if you're seeing activity in other parts of the circuit, then chasing down some overshoot in the clock goes down several positions on the list in terms of finding the cause.
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #8 on: September 22, 2018, 05:55:32 am »
Checking with the multimeter, I see a high signal on the ROM /E, a high signal on the ACIA E, and a low signal on the RAM /CS.
 

Online Ian.M

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #9 on: September 22, 2018, 06:52:51 am »
A multimeter really wont tell you much that's useful* on a Z80 system that's being clocked.

There's not much on google for a Soltec 5400 oscilloscope, but I have managed to determine its a 40MHz dual channel CRO with a delay timebase, 20mV/div Y input sensitivity (without using pull x10 mode) and a timebase that can do 1us/div or better.  Its also got a Z modulation input at the back.

If you post a large sharp photo of the whole of its front panel square on, so we can see all the controls and inputs, and a separate photo of your probes, we can better advise you how to use it for probing medium speed complex digital logic circuits like your Z80.  Even better, if you've got its user manual, scan it to PDF, put it on a file sharing site and post a link to it here (as it will be too big to attach)

You'd be surprised how much troubleshooting you can do on a CRO with those specs, if you feed Z80 M1 to the Ext trigger input so the display is locked to the Z80 instruction cycle, then use two x10 probes on its two Y channels to check signals around the board

* An analog multimeter or a DMM with high quality averaging on DC V ranges can tell you the approximate duty cycle of a digital waveform.
« Last Edit: September 22, 2018, 06:55:57 am by Ian.M »
 

Offline wilfred

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #10 on: September 22, 2018, 07:02:27 am »
I found this set of videos on YT where someone is also making a GS derived Z80 computer.

https://youtu.be/UC8GLtA-59w?t=2m3s

Shows the clock signal as I would expect it to be. It doesn't look like he is using a fancy oscilloscope  but I am not sure. But it is displayed on a laptop. I'll probably watch a bit more later.
 

Offline guenthert

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #11 on: September 22, 2018, 07:03:23 am »
Hi All,

I recently finished building a Z80 computer based on Grant Searle's design (32K RAM version.) However, I simply cannot get anything to display on my terminal program. I ensured proper continuity of the address and data buses as well as all the other control lines. It is not the FTDI cable, as I have tested it with another project and it functioned properly. I tried several terminal programs to no avail. I have triple checked each and every connection on the board with a multimeter and everything is wired perfectly without any shorting. I even replaced the 6850 ACIA with a 68B50 which is supposed to handle higher clock speeds. I rechecked the ROM image and that looked fine.
A *lot* of things have to be just right to allow a terminal session, i.o.w. the problem could be in any (as well as several) of many steps.  I'd recommend starting small, e.g. using a zero'ed ROM/RAM and let the CPU spin through all those NOPs.  Do you see then proper bus signals?  And then work your way up (perhaps next step would be some trivial program which counts up on a given port etc.).


I am running the computer off a 7.3728MHz oscillator, as per Grant's design, however, I think it may be too fast and causing timing issues. I have attached a photo of the clock signal, does it look OK? Any suggestions would be greatly appreciated.

-Adam
I don't think you mentioned which chips you're actually using.  The original Z80A was specified only for 4MHz, later versions (from other manufacturers) were much faster.

I've seen worse clock signals, so I wouldn't think that's the issue here, but I can't be sure.
 

Online Ian.M

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #12 on: September 22, 2018, 07:21:09 am »
As I said, I specifically don't like that glitch on the rising edge of the clock. Until the probing has been sorted out, and/or the clockspeed reduced, there's no way of telling if its a real problem, but I have seen Z80s fail to run when clocked with a glitchy rising edge.

I'm also 100% in favour of stuffing the data bus with NOPs and checking all the address and control lines right through to the ROM and RAM sockets.  To do further debugging, one really needs to be able to burn ROMs with various short test programs in them, so ideally, you need a ZIF socket in the ROM socket and a compatible EEPROM  to minimise the turnaround time, + a PC hosted programmer and a Z80 cross-assembler.
 

Offline MK14

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #13 on: September 22, 2018, 07:25:02 am »
If your scope has a 1KHz scope cal point, you can use it to check that the 1KHz looks square, to confirm your scope probes are working ok and don't need adjusting (to straighten the square wave).

If you take a quick look at some of the data, address and other signal lines, are you seeing a randomish up/down pattern, probably showing the Z80 is trying to work ?
Or do you see any straight (stuck) lines (high numbered address lines, may be straight, which can be fine though), probably showing the Z80 is largely not working yet ?
Datalines are the most important, if they are "stuck", the Z80 is not doing much, yet.

What method of construction have you used, such as PCB, breadboard etc, and have you put in plenty of decoupling capacitors ?
« Last Edit: September 22, 2018, 07:28:14 am by MK14 »
 

Offline NivagSwerdna

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #14 on: September 22, 2018, 07:42:58 am »
The clock looks sort of clock shaped to me.

Looking at the schematic the clock is pretty simple.  You might try a divide and conquer approach.  Firstly can you eliminate everything downstream of U5B and measure again... if socketed remove the Z80 and the MC6850 and measure again. It's a relatively fast signal so you should have short leads.

After that I guess you need to look for life on the address bus... anything going on A0 (pin30)? Also /RD (pin21) and /WR (pin22)?

If you have life on the address bus, rd, wr then... address decoding... and then the ROM... and then the RAM?

Simple checks are also power and ground at the 2764.
« Last Edit: September 22, 2018, 07:46:36 am by NivagSwerdna »
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #15 on: September 22, 2018, 04:44:28 pm »
Thanks for all the responses.

Unfortunately, my extremely obsolete Soltec 5400 scope has no documentation on the web. The front panel has no buttons or dials labeled "store" or "trigger" which means it is not a storage oscilloscope, right? I posted a picture of the front panel anyway. I ensured that all the chips have proper voltages at  VCC and VSS. As far as the chips i'm using:

-Zilog Z80B CPU (data sheet says it is rated for up to 6MHz)
-CY62256L 32K SRAM
-ST M27C64A 8K EPROM
-ST EF68B50P ACIA (says it is only rated for 2MHz)
-74LS32N Quad-OR
-74F04 Hex-NOT

I have local 100nF bypass caps on the big 4 chips (CPU, RAM, ROM, ACIA) and one big 220uF board cap filtering the main power rails.
My computer is currently soldered onto perf-board. (see picture)

As far as trouble shooting the address and data buses, I will try to sneak in after hours into the EECS department at my school to use their rigols to see what kind of life i'm getting on the buses.

Thanks.
 

Offline DaJMasta

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #16 on: September 22, 2018, 05:10:07 pm »
For the data busses, no need to get a full readout at this debug stage, just probing them like with the clock to see if they are doing anything is the important part.


That said, if your CPU is rated to 6MHz and your current clock is 7.3728MHz, we may have found a cause  ;D
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #17 on: September 22, 2018, 05:16:06 pm »
My instinct is telling me that the whole system is being overclocked, however, Grant Searle seemed positive that any Z80 or 6850 will work at this speed. I'll change out my oscillator once it arrives in the post.
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #18 on: September 22, 2018, 05:22:55 pm »
Quick question, what is the proper way to calculate the baud rate if I swap out the 7.3728MHz crystal for a 4MHz one?
 

Offline HB9EVI

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #19 on: September 22, 2018, 06:27:45 pm »
the Z84C0006PEC is only specified to 6,144MHz clock rate; some overclocking could work, but if you have issues, it's maybe an idea to reduce.
4MHz is not a good clock for baud rate; depending on dividers and desired rate, you could run at 6,144MHz; otherwise go down to 3.6865MHz - it's still very fast for the purpose.
 

Offline 255Topic starter

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #20 on: September 22, 2018, 06:40:50 pm »
Here are some pictures of some of the data/address lines.

photo 1: data 0
photo 2: data 1
photo 3: address 0
photo 4: address 1

The address cycle looks a bit garbled.
 

Offline DaJMasta

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #21 on: September 22, 2018, 06:55:10 pm »
Yeah, the first picture looks a bit funky with the lower high level, but in the others you can tell that there's activity - even if nothing shows on the terminal, something is certainly going on.  Using a lower clock could still potentially help, but it's much more on making sure every element is wired correctly and is operating (maybe the data and address lines are mostly good, but one line is dead, for example).  Otherwise, this starts moving towards logic analyzer territory for debugging because it starts being about what instructions are actually being executed.  It could be that the overclocking or some intermittent bit failure is causing it to continuously reset, which would be obvious with a logic analyzer but is hard to notice when you can only probe a data line or two at a time.

Since you see activity, I'd check other used pins for activity.  If you see something on everything you expect it on, and it turns out the lower frequency doesn't help... then the debug starts getting trickier.
 
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Offline Andy Watson

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #22 on: September 22, 2018, 07:00:20 pm »
Quick question, what is the proper way to calculate the baud rate if I swap out the 7.3728MHz crystal for a 4MHz one?
I would divide the clock by two, or possibly four with a D-type flip-flip. Then your baud rates should be halved (or quartered).
 
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Offline MK14

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #23 on: September 22, 2018, 07:11:13 pm »
The address cycle looks a bit garbled.

It's a very long time since I handled Z80's, but unless the address bus is tri-stating (probably not, can't remember off-hand if Z80 lets the address bus tri-state) at that time, it should be cleanly high or low. Exact voltage levels depend on if CMOS or TTL parts, I think you said it is CMOS, so should be full Vcc and Ground.
So that address line (which address line ?, are the other address lines ok ?), could be accidentally shorted to another pin or other wiring faults.
It seems too "neat" to be caused by the overclocking, but the overclocking could still be the cause.

garbled.
Garbled (unless it is the data lines going tri-state), usually means connections have ended up shorted together, or similar connection faults.
« Last Edit: September 22, 2018, 07:21:31 pm by MK14 »
 

Offline MK14

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Re: Grant Searle Z80 SBC troubleshooting
« Reply #24 on: September 22, 2018, 08:07:56 pm »
I seem to have got confused by your labelling of the traces.

Assuming:
Quote
photo 1: data 0
photo 2: data 1
photo 3: address 0
photo 4: address 1
is the correct ordering,

then the address lines shown seem ok at a quick glance (as you mentioned, digital storage scopes are better this this kind of work). But, there is not much activity on the data lines (doesn't seem to say what the timebase was set to ?).
I would have expected much more activity. With it looking similar to the address line traces. Assuming a big program is loaded up in it and it runs ok.
So maybe it is the overclocking, or there are problems with the Z80 accessing the memory devices.

The garbling, I was talking about, could just be because it was tri-stating the data lines, between access cycles. I mis-read you labels.

As other(s) have said. I would be tempted to check all address, data, control and chip select lines. With the scope and see if any of them look suspicious, while it is running.
It shouldn't take long to do, maybe 5 or 10 seconds per pin.
Anything which is always low, always high or is not at the correct logic high or low voltage levels (difficult to explain quickly, but tri-stating can go between logic levels, need to see control lines at same time, to see if tri-state is legit), is suspicious.

Trying without the overclocking, such as dividing the clock by 2, as suggested above by another poster is a good idea (or a lower crystal freq, as also mentioned).
« Last Edit: September 22, 2018, 08:16:15 pm by MK14 »
 


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