H11F1M photo mosfet - offset voltage

[splin]

The Fairchild datasheet for these devices states:

As an analog switch:

      Extremely low offset voltage

What does this mean? I wouldn't have expected an analog switch to have offset other than that from thermal EMFs. Or could it mean voltages created by leakage (or load) current flowing through the switch's on resistance?

It isn't specified anywhere in the datasheet that I can find - does anyone know sort of magnitude might be typical at room temperature? A few nVs? 10s of uVs?

Looking at a more conventional analog switch, the Vishay DG200B datasheet specifically states that:

In the on condition, this bi-directional switch introduces no offset voltage of its own.

So I'm at a loss as to what Fairchild were referring to. No doubt its something simple.

[T3sl4co1l]

Of course there's no offset!  Why would they specify something that doesn't exist?

Dummy... 

Tim

[edavid]

FYI, the H11F1 series has JFET output, not MOSFET.

The low offset voltage is in comparison to a bipolar transistor used as an analog switch.  (It's a very old part.)

[splin]

Of course there's no offset!  Why would they specify something that doesn't exist?

Dummy... 

Tim

Ok, thanks - there was a simple answer. Guilty as charged. But why mention it at all, especially as a headlined feature, if no-one reading the datasheet would expect it have an offset anyway? And why use the phrase 'extremely low offset' rather than 'no offset' or 'zero offset'? Interpreting datasheets is difficult enough without having to consider that any specification may not only be 'specified under 'favourable' conditions, but may be utterly irrelevant. I can't say this is something I can remember encountering before. Yes I know marketing droids love misdirection but blatently irrelevant standout features in datasheets isn't that common. Is it?

Datasheets could get very tedious - can we expect TXCO datasheets with 'high immunity to chroniton particle induced jitter'?*

Perhaps I've got the wrong end of the stick... again.

Splin

*Audiophool specifications excepted.

[digsys]

But why mention it at all, especially as a headlined feature ... 

I wouldn't worry about that rude reply, maybe he ate a bad muffin :-)  What you say is reasonable, and you'd THINK manufacturers would go out of their way to make
sure datasheets were concise and correct, after all, they're trying to make you buy their product, and they KNOW that people reading them aren't regular dummies.
Unfortunately, many datasheets have errors, some serious. Sometimes they do it to make their part look good, and hope you ignore the errors.
Sometimes, they just don't proof read properly, or use a generic templates. It's VERY common to find errors.
My biggest b*tch is with SOA regions of Power Mosfets (used in linear mode). Not one has an accurate (or realistic) graph. I spend days creating realistic ones.
On top of these, they don't always get the dies as expected, or repeatable, or switch to a new fab and things go out-of-tolerance. Often it's easier to shaddup :-)

 ... And why use the phrase 'extremely low offset' rather than 'no offset' or 'zero offset'? .... irrelevant standout features in datasheets isn't that common. Is it?
 

As before - very common

Edit: And it can be much worse ! In one project for a Solar EV BM system, we spent great effort in chosing perfect components. Then I made up several units,
and had others writing code. Turned out the INA198 current sense IC was completely non-linear (and non-repeatable) at the lowest 15-20% of it's curve.
$1,000s of time and parts wasted. It wasn't even CLOSE to the graphs supplied, including white papers. Moral : DON'T trust spec sheets implicitly !!

[Zero999]

I wouldn't worry about that rude reply, maybe he ate a bad muffin :-)

Which reply are you talking about? I haven't seen any rude replies to this thread, unless you're talking about a post which has since been deleted?

Or are people just very sensitive round here?

A FET optocoupler is an FET coupled with a LED. The FET is designed to operate in enhanced mode, so without external gate potential, it does not turn on.

I've never seen an enhanced JFET before? I'm aware it's possible for a JFET to operated in the enhancement region but the gate impedance reduces dramatically, especially as it approaches the diode turn on voltage. Normally JFETs conduct considerably when the gate voltage is zero. I'd be interested to see the die of this IC.

[digsys]

Which reply are you talking about? I haven't seen any rude replies to this thread, unless you're talking about a post which has since been deleted?
Or are people just very sensitive round here? 

Anyone can have a bad moment. Maybe you're just being overly sensitive about people being sensitive? Incident is over.

[Zero999]

Which reply are you talking about? I haven't seen any rude replies to this thread, unless you're talking about a post which has since been deleted?
Or are people just very sensitive round here? 

Anyone can have a bad moment. Maybe you're just being overly sensitive about people being sensitive? Incident is over.

Now you're just being sensitive about me being overly sensitive about people being sensitive. 

[Kleinstein]

There is a chance to find a small offset voltage due to parasitic photovoltaic effect, like described above. However this should not be much, though missing in the usually DS.  Even intentional photo-currents at that power are only in the 10-100µA range and the on resistance will shunt the unintensional current and would allow a rough estimate. Something like 100pA * 200Ohms = 20 nV would sound reasonable for me.

The chip is used in sensitive coppers, so I would expect the value should be below 1 µV, likely much lower.

Thermal EMF can also be a problem as the LED part can cause quite some heating.

Edit:
There are enhancement JFETs, made from GaN. Interesting high power devices, so not like the normal small JFETs.

[T3sl4co1l]

Ok, thanks - there was a simple answer. Guilty as charged. But why mention it at all, especially as a headlined feature, if no-one reading the datasheet would expect it have an offset anyway? And why use the phrase 'extremely low offset' rather than 'no offset' or 'zero offset'?

But seriously...

Maybe CYA?  Nothing is zero after all, it can only be zero +/- margin.  But then they'd have to actually measure that margin.  Which is a waste of their time.  The underlying reason is probably as edavid suggested,

The low offset voltage is in comparison to a bipolar transistor used as an analog switch.  (It's a very old part.)

 

Datasheets could get very tedious - can we expect TXCO datasheets with 'high immunity to chroniton particle induced jitter'?*

Perhaps I've got the wrong end of the stick... again.

Splin

*Audiophool specifications excepted.

 

Tim