An update:
I tried an LT1999-10 with a 0.1R shunt resistor; this seems quite accurate. I then stuck an AD8271 after it in G=1 configuration, to level-shift the LT's differential output back down to ground-reference (with the AD powered by my generated split +5/-5 supply).
Turns out: this is terrible. There's a significant current flow between the LT's REF pin and the feedback network of the AD, causing about a 12% error in the indicated output. Remove the AD chip, and watching just the LT chip on its own, that chip remains accurate.
So my next plan involves using a full inamp after the LT chip - perhaps the AD8253. This chip has the advantage of having digitally-controlled gain, switchable between G=1, 10, 100 or 1000. That could be handy indeed.
Except, at least on the data sheet, there's another problem. According to the sheet on the LT1999, that has a possible input offset voltage anything up to 1.5mV (over full temperature range), or 750µV at 25C. Using my 0.1ohm shunt resistor that's an implied reading error of up to 15mA full range, or 7.5mA at 25C. A much larger error than I was hoping to have. I suspect I may have got lucky with my breadboarded chip, having a much smaller error on it than that.
So i'm still somewhat stuck for ideas here. Should I:
- Try to trim out the Vos of this first stage chip. Indeed; is this even possible, to work over a range of commonmode input?
- Find a different chip with much better Vos. It's rare to find difference amps that can cope with extended commonmode input range anyway; this was so far the only one I've found with a bandwidth as fast as I'd like
- Adopt a new approach. For example, the FET-based current mirror to level-shift the high-side shunt down to a load-side, before using an in-amp to detect that.
This latter idea might not be so bad actually, if I used a DC-DC converter to power the upper opamp, the one sensing the shunt resistor. That would allow it to cope with any bus voltage. A high bus voltage would just level shift the sensing opamp up but it will still function just fine, the FET just has to drop a larger voltage. A low bus voltage (maybe even below 5V) would mean that the sensing opamp still has 5V to play with, because its lower end is now negative with respect to output ground. The only trick then is to ensure that the FET still has positive headroom.
Probably the most demanding circumstance I could foresee in this scenario is about 500mA through the shunt, at 2.5V bus voltage. That's a 0.05V shunt drop, so at a 10:1 ratio on the mirror line, we're at 0.5V leaving still 1.95V to drop over the FET. At that ratio, it does mean at the low-current end, the bottom mirror resistor might only be at 500µV when indicating 500µA through the shunt. The inamp I have in mind (AD8253) has a Vos of 150µV max, so it's within ability, but not very accurate here. But it still might be in the realm of doable.
Does this sound like a good bet?