Author Topic: High Volt Buck converter gate drive high side switch G vs S. LTspice help please  (Read 1968 times)

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Offline SquattingInTheCornerTopic starter

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Hello. I'm just here squatting in the corner looking for answers from the magic world wide web.

I've built this circuit of a simple buck converter with a single high side switch with feedback, and PWM generating circuitry to drive the gate. However, I am currently using a behavioral voltage source in LTspice. It also works for a voltage controlled voltage source. The problem that I'm having now is that I have been trying things to replace the ideal voltage sources with actual gate drive capabilities. The gate of this power fet needs to be 10-15v above the source for proper operation. The VDD is 300V. I've tried a few things that haven't worked and for the life of me I cannot figure out how to practically drive this fet in a way that closely mimics the drive with a behavioral voltage source. The pictures attached should help.

Notes: Currently the power supplied to the pwm circuitry is referenced to ground and not floating. Meaning I'm just producing 15v PWM referenced to ground and using the behavioral source or the voltage controlled voltage source to drive the gate and source to high voltage ranges as in the photo. As you can see the PWM on times, the gate voltage reaches about 200v fairly quickly and the source reaches 185v at the same time (15V difference for proper fet operation). I realize I may need to change that.

I've tried a simple bootstrap method for high side switching to isolate gate and source, but it didn't work. However, I read that this method requires the gate voltage to reach above Vdd which is not likely to ever happen because it is 300v. Maybe I misread that and maybe I executed this method poorly. I've tried using a coupled inductor setup , and a few other things. I'm kindof a noob with LT spice as well as dealing with dealing with a DC-DC converter with this high a voltage demand.

Any help would be greatly appreciated.
 

Online T3sl4co1l

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Show your approaches.

What's wrong with an off-the-shelf gate drive IC?  Is this merely a model study?

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline SquattingInTheCornerTopic starter

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Show your approaches.

What's wrong with an off-the-shelf gate drive IC?  Is this merely a model study?

Tim

This is a learning project. As in, I have to design all components of the process. That being said, I think  simulating this design with an IC that keeps the gate and source latched or shifted 15v apart at all times in the on state would be a good idea. Is there any chips you could recommend off hand or should I just find one?
 

Offline SquattingInTheCornerTopic starter

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Show your approaches.

What's wrong with an off-the-shelf gate drive IC?  Is this merely a model study?

Tim

The issue is if I were to use an IC it would have to be able to handle up to 300v. I know they exist, but I don't know if there is a spice model that has one of that high of a required voltage range.
 

Offline Jay_Diddy_B

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Hi SquattingInTheCorner,

I am not sure about the model that you have, because I can only see part of it.

This is one way to achieve what you need.



And the results are:



I have attached the model. The source B1 is ground reference in my example but it can be floating.

The source V1 is used to generate a test signal.

V=IF(time<0.5m,0,(IF(V(test)>2,15,0)))

is used to describe the behaviour of source B1.

This can be read:

IF the simulation time is less than 0.5ms the output is zero

ELSE IF the voltage on the node test is greater than 2V the output is 15V ELSE the output is zero.



Let me know if this helps.

Regards,

Jay_Diddy_B
 
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Offline SquattingInTheCornerTopic starter

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Hi SquattingInTheCorner,

I am not sure about the model that you have, because I can only see part of it.

This is one way to achieve what you need.



And the results are:



I have attached the model. The source B1 is ground reference in my example but it can be floating.

The source V1 is used to generate a test signal.

V=IF(time<0.5m,0,(IF(V(test)>2,15,0)))

is used to describe the behaviour of source B1.

This can be read:

IF the simulation time is less than 0.5ms the output is zero

ELSE IF the voltage on the node test is greater than 2V the output is 15V ELSE the output is zero.



Let me know if this helps.

Regards,

Jay_Diddy_B

Thanks Jay for the response.

I have my behavioral source working.  The problem I'm having is that if I wanted to physically build this circuit I could not use a behavioral source in the real world. I need to drive the power fet with a real practical setup. And I cannot just pump in 0-15v pwm into the gate and call it good because it will not work. Vgs = 10-15v for switched on operation. If you have any ideas on how to do that in a real circuit setup that would be great.
 

Offline Jay_Diddy_B

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Hi,

You might be able to rearrange the buck regulator like I am showing here:



The switch is now at ground, the output is referenced to the positive supply. The feedback has been level shifted using a simple PNP transistor.

I have attached the LTspice model.

Regards,

Jay_Diddy_B
 

Offline SquattingInTheCornerTopic starter

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Hi,

You might be able to rearrange the buck regulator like I am showing here:



The switch is now at ground, the output is referenced to the positive supply. The feedback has been level shifted using a simple PNP transistor.

I have attached the LTspice model.

Regards,

Jay_Diddy_B

Thank you for the help!

I will play around with this. Interesting setup using a lowside switch method.
 

Offline ocset

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You can also use a gate drive transformer, in conjucntion with a current sense transformer to drive a high side NFET.
This doc tells you Gate drive methods
http://www.radio-sensors.se/download/gate-driver2.pdf

Remember to use a pnp turn-off circuit if you use a GDT.
The essential theory of GDTs is to ensure that your primary doesnt saturate with the V.us. -Its the magnetising current that saturates a GDT.
With a CST, its important to remember in the secondary, that your volt.seconds OFF must at least be equal to the volt.seconds ON, in order to reset the  CST, and stop it saturating.
Give me a shout  here if you want further info on this.   :popcorn:

If you want a high side nfet and not a GDT, then you can use a bootstrap high side drive IC.....but watch if you go into total no load or burst mode then your bootstrap cap may discharge which may effect the return time from no load to full load.
« Last Edit: January 20, 2018, 12:45:12 pm by treez »
 


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