PHASE LOCKED LOOP: TRF 3750

[Jasmeet Kaur]

Hello all
We are working on a PLL circuit, using TRF3750, FREQUENCY SYNTHESIZER.
We have tried with the Supply voltage: 3.3 V (and VCP=4.3v).
 We are sending serial data through docklight to the data pin (pin 12) of the IC, and then enable the LE pin for an instant, and remove it. According to the datasheet, the data should be loaded onto the selected latch from the shift register. We are first programming the function latch with r divider and then the r-counter. But we are unable to get the desired output at the MUXOUT pin (pin 14).
Can anybody guide us about the programming of the TRF3750?

[Frangible]

Here's a list of stuff you'll have to know before mucking about with the PLL:

• How fast is the shift clock into the PLL?
• Are you making sure to meet tsu1 and th times?
• Is the LE strobe long enough?
• What is the frequency of REFIN?
• What is your VCO range?
• What is your desired frequency?
• What is your prescaler setting?
• What are you writing into the AB counter latch?
• What are you writing into the R counter latch?
• What are you writing into the Function latch?
• What are you writing into the Initialization latch?
• If you using Fastlock mode, is it appropriate to your VCO?
• Is your loop filter design appropriate to the output of the PLL?

This is not a trivial task.  It takes quite a bit a research to get it right the first time you work with them.