I did a LOT of Z80 in the 80ies - it's very rusty. If you think it will be helpful I'll find some datasheets and study it.
Your rusty knowledge is most likely ok, You would just need to look at the instruction set byte values in octal.
Four 8 x 8 tables will show the logic.
Think of a picture of a (real)Z80 acting like a Z80 by running a program.
The (real)Z80 is changing IO bits just like a real Z80 changes what is on it's pins.
You have IO for each pin of the real Z80.
You would have two 8-bit ports for address bus
One two direction port for data bus or one in and one out port.
A port for control bus.
and more.
So you have less then 40 pins total.
The program on the (real)Z80 is acting like microcode. Due to the ports used,
The (real)Z80 memory is separate from the other.
the microcode does not have to stop to maintain proper values on any pin.
A change could be made so that the (real)Z80 would be acting like a PDP-11 or other CPU.
64 bit add on a Z80, 64 is just a number could be larger or smaller, 8-bit steps makes it easer.
64-bits is 8 bytes, so think of three arrays of 8 bytes.
Z80 does add A= A + __
To add larger like 64-bits you need add X = A + B
Note that Z80 has two Add instructions.
one is ADD while the other is ADC {add with carry}
You do a ADD on least byte followed by 7 ADC. Each ACD is adding in the carry from lower byte.
so
ADD X(0) = A(0) , B(0) ; Lsb
ADC X(1) = A(1) , B(1)
ADC X(2) = A(2) , B(2)
ADC X(3) = A(3) , B(3)
ADC X(4) = A(4) , B(4)
ADC X(5) = A(5) , B(5)
ADC X(6) = A(6) , B(6)
ADC X(7) = A(7) , B(7)
If you look at the 181, you have some pins that connect to next 181.
So one 181 can act like many if you save a copy of value that goes between the chips and use this value as input for next step with 181.
ADC is just using stored output of connecting lines of 181 as input to connecting lines.
My plan was not to use a flag register.
It is common to have one instruction modifying flags and then do more instructions before checking if a flag was changed.
I use a simple 2Kx8 EPROM for microcode, I have a RAM chip + a EPROM on the address line. I use MSB on the address line to select between the EPROM and the RAM (the RAM only has 15 address bits).
Quick look at this sounds like a mess. It looks like you are trying to put microcode into CPU memory.
You said you wanted to start with a 32-bit wide microcode and are building an 8-bit CPU.
Microcode store = 4x 2Kx8 EPROM
You could add some ram to Microcode store 4x ___ ram\
Instructions and data for CPU should be separate.
A PDP-11 is von Neumann architecture to the programmer & users.
The logic and microcode of CPU is more Harvard architecture.
Normal Harvard architecture is instructions (microcode) separate from data.
Data inside CPU is all CPU registers, the 181's and other registers that make logic simpler.
I understood that the 182 is just for carrybit optimization - something I'm not really aiming at. Are there other functions I need to be aware of?
N0, Just a way of speeding up 181's
To be honest, reading this seems to be more complex than what I have?
A bus is easer and quicker to wire and can do more at the cost of time.
Last post I used a normal ram to contain all the CPU registers.
This limits you to a read or a write.
With a lot more chips you could have a 374 as a register.
You would have an input bus and an output bus.
OE controls what goes on output bus.
Ck controls when input bus is latched.
You now have Read-modify-write, faster but many more chips needed.
You could enable OE all the time and use two or more chips like 244 to get data to the two inputs of 181. Again many more chips needed but you can gain some speed.
You have two output buses and one input bus.
So a Move using ram needs one latch to hold data between read cycle and write cycle of ram.
Using the ALU(the 181's) needs two read cycles and one write cycle with ram. And two or three latches.
Simple is using more microcode steps with wider microcode.
I used three temp registers for 181 in last post. Each would have a bit in microcode for when to clock the input in to the latch.
The one on output of 181 would have a additional bit in microcode for when to enable output.
Only a few registers are connected to the ALU directly.
This greatly limits what can be done.
8-bits you normally think a max of 256 instructions.
Z80 Shows you can get more then 256 instruction with a little change.
With more instructions you lose some by needing to read more instruction bytes but can have a huge gain by not needing to use even more instructions to do same job.
Look at difference of using Z80's DJNZ vs doing same thing with normal instructions.
A lot of instructions are used to work around only having one accumulator on Z80
Much easer and quicker on PDP-11 where every register is an accumulator.
With the register modes on PDP-11 any register can be used as a stack pointer.
As I said the modes are created by microcode and some use of 181's for some modes.
The microcode is acting like a C function.
You can have a C IF or CASE statement as microcode.
All this says that you have variable length microcode sections
So how would you implement this? I already explained about how I were going to implement the conditional jump statement. Nothing in the microcode will understand what "JUMP" means let alone a condition? I'm still reading about this, so if there's a good source to understand how you would wire microcode to do these kind of conditions I would very much like to learn.
[/quote]
What is a conditional jump in assembly or IF in C
Do next PC address or other PC address based on condition.
Next address is a field in microcode.
Other address is a field in microcode.
Condition just selects which is used.
Why?? That's pretty much what I have. A 4 bit counter where I reset when the 4th bit is set (so it's a 3 bit counter). Seems to work just as I want it to?
At first it looks easy. But it is not very powerful and very limiting.
Next address field in microcode lets you have any amount of microcode for an instruction. Lets you have common sections of microcode.
The Z80 checks for interrupt and other things before next instruction, Common microcode.
Some Z80 instructions do (HL) and access memory. Again common microcode.
As for rows, with 2 273's you could have 65.536.
This is where I goofed up earlier this week. You're talking about the number of OP codes not microcode?
No this is microcode bit rows or microcode steps.
Draw your self a box. The pins of a Z80 are the connections from inside box to outside of box.
Outside of box the Z80 looks like a Von Neuman processor.
The Z80 chip is a black box.
You are building what is inside the black box.
If you look around there are other 8-bit microprocessors in a 40 pin chip.
If you keep the insides of black box general in logic, then the microcode makes it a Z80, 8080, 8085, 6502, 6800, 6809
By using two bytes for an instruction you could have the PDP-11 instruction set with a 8-bit outside data bus. The hardware is there, this is just a microcode change.
Add more bits to address bus, this is a small change in hardware and you can add later gen Z80's
General here is simple logic that is very flexible.
My ram chip for registers gives you simple for a huge number of registers.
From a teaching point of view, simple can be easy to understand.
Simple also would let you show small changes needed to expand to a 16-bit data bus and then act like a PDP-11
Or change to different instruction set.
Look at what you are doing now.
Remove Added logic to simplify and get same result in microcode steps.
So I would have to pick up PDP11 myself first I once illustrated how a CPU worked using paper notes that people carried from person to person. Each person was a function, and the people that moved the papers around were the bus But it was again a basic Von Neuman + a bit of Z80 that I used back then (80ies - a looong time ago).
For simple what is on programming card is all you need to know about PDP-11 instructions.
To get closer to an actual PDP-11 then you would have to add more knowledge about PDP-11
For example the PDP-11 34 used the unibus to connect CPU to rest of computer.
An LSI-11 23 used the PDP-11 instruction set with the Qbus and CPU bus to rest of computer.
The PDP-11 45 used unibus for IO and a different bus for memory. Basic instruction set is the same, 45 added some instructions.
Now with little hardware change, DEC created a VAX. Most VAXes could still run PDP-11 programs.
IF you do not understand something, please ask.