How do I measure small signal input impedance and capacitance properly?

[bd139]

I’m attempting to do some measurements for the sake of understanding gate characteristics of JFET and MOSFET small signal models a bit better. I’ve been measuring impedance and frequency response for years but have come unstuck now when the impedance is very high and Cin is very low.

Are there any guides or approaches on how to do this?

Main problem is that the scope probe parasitics of 10M || 12.5pF are dominant in my measurements.

[tggzzz]

You may find some inspiration in this: https://www.edn.com/design/test-and-measurement/4435414/Sub-picofarad-measurement-with-CMOS-inverters

As I'm sure you are aware, the capacitance depends on the relative voltages of the device's terminals.

[bd139]

Thanks - will read through that today

Indeed I am. Every PN junction is a nice little varactor out to kill your idealistic views of mother nature

[bd139]

Ok worked it out.

For 2n4416...

Firstly measure Rin close to DC. 1M 1% in series with the source at 100Hz 100mV p-p then measure the voltage either side with the scope. Vertical out is connected to the 3478A input to get an AC true RMS reading. This forms a voltage divider with the 1M source impedance and the 10M "probe" resistance in parallel with the input resistance. Solve that for Rin. Gave me 356M which is about right at DC.

Now you crank up the generator frequency until you hit 3dB point. From that, the known probe capacitance of 12.5pF you can solve for the input capacitance (standard LPF) which is about 2.5pF

So 2.5pF, 365M Zin (tis an old 1971 dated FET so newer ones are probably better than that)

Coffee time!

[David Hess]

Ground the source and bias the drain with a low impedance voltage source at the desired Vds.  Bias the gate through a resistor or high impedance current source to the desired drain current or gate voltage.  Couple the capacitance measurement into the gate via a DC isolation capacitor.  Now any small signal capacitance measurement technique will work.

[bd139]

Thanks for the tip. Will try that this evening.

[T3sl4co1l]

If you don't have a precision VNA to measure it directly, then create a condition where the desired parameters would be emphasized or exaggerated.

Example: gate impedance is high, so match it to a low impedance where you can use, say, 50 ohms to deal with it normally.

This can be done at a single frequency with an L match network.  50R < gate Z, so this will look like a series resonant circuit, with the gate on top.  That is: 50R source - series L - parallel C || gate.

The resonant impedance, sqrt(L/C), shall be placed halfway (geometrically speaking) between 50R and gate R.

You don't know gate R to start, but you can reasonably assume it's high, like 100s of k, or megs.  So sqrt(L/C) should be in the >1kohm range.

1/(2*pi*sqrt(LC)) of course is the resonant frequency.  You can only do this measurement at a given frequency, so if you want a range of values, you'll need new component values for each one.

First, quantify this network without the gate.  Use a high Q inductor.  Measure the impedance dip at resonance.  The impedance gives R, and the resonant frequency gives L and C.  Note that you can't probe the voltage at the capacitor, because your probe will load it -- though you might find it illuminating to repeat the measurement with the probe connected, to see what effect it has.

Whatever load you attach, repeat the RLC calculation, then separate the R into series (known inductor loss) and parallel (unknown load) components, and the parallel (un/known) components of C.

Note that this must be done at very small signal levels: 10mV at 50 ohms becomes 1V at 500kohms.

It is very reasonable to calculate or simulate the circuit properties, based on datasheet values.  You'll at least get within the tolerance of the part itself, which is pretty awful, so you'll need to adjust things later anyway.

Tim

[SiliconWizard]

You could also estimate the input capacitance of a logic input or a MOSFET by measuring the current draw of a very fast driving buffer passing a high frequency square signal. Measure the current draw for a series of frequencies and there you go.

[bd139]

Thanks again both. Will read this over today

[G0HZU]

If you want to go on to measure the complex impedance across the typical RF frequencies that these devices get used over then you really need to measure/model it up to several hundred MHz. The complex input impedance will be affected by the configuration of the JFET (eg operating point, common drain. common source etc) and the circuit/load it is connected to.

In my experience (at RF frequencies) the input impedance of a jellybean JFET like this will typically look like a small resistor (maybe 10-100R) in series with a few pF across a few MHz to maybe 500MHz. This is a reasonable wideband model but you need to measure or model it to know what this small series resistance is. In some circuits (eg source follower) the real part of the input impedance can go heavily negative and it depends what circuit/load is connected at the source. i.e. it depends on what the source follower (buffer) is connected to at its output.

I'd expect the 356M || 2.5pF 'complex parallel' model to fall apart quite quickly even at modest RF frequencies. The 2.5pF will probably be OK but I think that the real part will be wrong even at fairly low RF frequencies. However, it probably won't matter for many applications because the 2.5pF will dominate. But if you want to measure/predict the reflection coefficient up at (say) 250MHz, then you would really want to know the impact of the real part of the impedance on the reflection coefficient. |r| could be as low as 0.97 by 250MHz for example.

[G0HZU]

If you don't have a VNA or vector voltmeter then you could wind a decent air cored solenoid (2uH?) and use this to resonate away the 2.5pF up at 70MHz or so.
But the solenoid needs to have a lowish ESR at the resonant frequency. Preferably just a few ohms at 70MHz and this might not be easy to achieve.

This then leaves the real (series) part plus the ESR of the solenoid at 70MHz. The real part in the JFET would typically be something like 20-80R but it depends on how the JFET is configured etc. There are various ways to measure this 20R (+ a few ohms ESR in the solenoid) with basic test gear. I can suggest a few if you want to try it but I think it would be better to use a VNA or a vector voltmeter for stuff like this.