How should I layout VRs to separate Analog and Digital?

[Yaro]

Hi all,

I need to create two power and ground domains: Analog and Digital. I've a common power supply that I'll call VCCBattery that power 2 voltage regulators. Since each voltage regulator have decoupling Caps and GND pin, on which plane should I connect this GND pins? After that, how should this 3 planes (Battery GND, Digital GND, Analog GND) should be connected together? (like first Digital and Analog and next to Battery, or a star joint between them)

I've attached voltage regulators that I use and their Pinout with essential capacitors, also 2 possible Ground connection to main GNDBattery.

Thank you!

[Buriedcode]

Theres quite a bit of conflicting information regarding split ground planes, mostly from audio ADC/DAC manufacturers. 

Whilst I haven't designed very high speed boards or ultra sensitive ones, one the occasion I've had separate analogue and digital planes I either tied them together at the power entry to the board, or more commonly, drew a dividing line between analogue and digital parts, laid out the board so that the return paths for digital and analogue did not cross/mix, then removed the dividing line and had one solid ground plane.   If its not possible to have a neat separation, I have used a cutout of the ground plane, so whilst its still one plane, there's a cutout of it about half the width of the board with no signals crossing it.  Like an E shape.  This means signals in the upper half of the 'E' must travel around the cutout, and the return paths must do the same.

In your case are the two regulators for digital and analogue? or both regs for both?  If you have separate regs for analogue and digital (which I have done where space allows) then you can start the partition at the power entry.

As I said, I drew a line dividing them, on the top silkscreen layer as a guide to see return paths, then removed this once I was done.  I haven't had a problem with crosstalk or ground bounce even on 20-bit analogue boards but I cannot say I am overly experienced in this.  I once posted about this on the TI forum and got 30 responses, people actually got quite heated about it - I guess they felt others were claiming that all their split designs were wrong.

[tggzzz]

RTFM, which in this case implies RTFDS and RTFAN, where DS=data sheet and AN=application note.

They should give you the necessary information for the specific device you are using. If they don't, then choose a different device.

[Yaro]

Thanks for your answers. This two regulators are each one for each power domain. I've tried to ask a question that is most general as possible, since every component I see that it's not a specific Analog device but it's a Digital device with an Analog part (like for example ATSAM MCUs that have ADC ports and Analog supply pins and grounds for ADCs). This components describes well digital part but not analog schematics, at maximum it's possible to find inside adviced schematics just a FB that is connected between AGND and GND no further explaination. Sometimes I encounter components that have two different voltage requirement for Analog and Digital (most of them are optic sensors or general analog sensors) and separate DGND and AGND.

Since there is lackage in documentation about this, what I've supposed is there's a common right way to layout this planes with not very sensitive devices but that can't have mixed planes.

As I've asked in my first post, if I have an AGND usually I should connect it to a single point (directly or through a FB) to main GND plane. But what happen if I have also a DGND? Should I create a STAR point, or two point connection or a cascate (like AGND to DGND to GND)?

About Voltage Regulators, they have all a GND and decoupling CAPs. CAPs are usually (in this case TPS799 for example) at IN and OUT. Should I connect all this grounds to VR domain? or maybe IN caps ground goes to main ground and OUT caps goes to DGND/AGND?

[technix]

For me I use one continuous ground plane across both digital and analog domains, as nothing beats a good solid fill in low impedence and low inductance. As of power, I throw a small inductor between the analog and digital domains right next to the AVCC pin if the analog domain is small enough (this makes a tiny L/C Pi-filter between the digital and analog decoupling capacitors and that small inductor) or use a separate local regulator if the analog domain is big.

[T3sl4co1l]

No, you don't.*

Ground them all to a common ground plane.  Avoid crossing noisy current paths, and route digital I/O signals away from sensitive analog signals.

*Or more precisely: you might, but you almost never, ever need it.  And for almost every single project, ever, it actively makes the design significantly worse.

Separating grounds, and adding ground slots or cutouts, are techniques which are seldom, if ever, used.  But they are frequently written about.  Thus, it betrays the fundamental nature of human perception: articles are taken as confirmation of use.

As with airplane crashes and shark attacks, the widespread publication, of an otherwise rare subject, skews public knowledge by several orders of magnitude.  So too, these techniques are written about far more frequently than they should ever be used (and ever are used, by the few experts who know when to use them).

Tim

[danadak]

Some ap notes on this general topic.


https://www.dropbox.com/s/ruaf9booe17jk8n/PCB%20Layout.zip?dl=0


Regards, Dana.

[anfang]

Ground them all to a common ground plane.  Avoid crossing noisy current paths, and route digital I/O signals away from sensitive analog signals.

Separating grounds, and adding ground slots or cutouts, are techniques which are seldom, if ever, used.  But they are frequently written about.  Thus, it betrays the fundamental nature of human perception: articles are taken as confirmation of use.

Is separating ground plane different from creating a star ground? Or would the group plane act as the star "core", so that all the ground lines should be independent but they all should merge into the single ground plane?

[Yaro]

No, you don't.*

Ground them all to a common ground plane.  Avoid crossing noisy current paths, and route digital I/O signals away from sensitive analog signals.

*Or more precisely: you might, but you almost never, ever need it.  And for almost every single project, ever, it actively makes the design significantly worse.

Separating grounds, and adding ground slots or cutouts, are techniques which are seldom, if ever, used.  But they are frequently written about.  Thus, it betrays the fundamental nature of human perception: articles are taken as confirmation of use.

As with airplane crashes and shark attacks, the widespread publication, of an otherwise rare subject, skews public knowledge by several orders of magnitude.  So too, these techniques are written about far more frequently than they should ever be used (and ever are used, by the few experts who know when to use them).

Tim

I've recently get an answer from TI and they said me that all CAPs of VR should be connected to VR power/ground domain. I've found that in electronics there's a lot of discordances about ground topic. This remember me also that I've read some papers about how to ground correctly capacitors or connect local ground planes to main ground plane; a lot of people advice to use a single via each plane but in most of professional boards you can find 4-5-6 vias connecting same plane to main plane. Who is right?

[T3sl4co1l]

Is separating ground plane different from creating a star ground? Or would the group plane act as the star "core", so that all the ground lines should be independent but they all should merge into the single ground plane?

Yes.  A star ground allows unconstrained RF voltages on each ground stub.

A stub is a length of a conductor away from a common point or chain.

For example, if you use a splitter cable, you are using a transmission line stub.  These are strongly discouraged for high speed communications, which is why you rarely see tees used with video signals, cable TV, Ethernet and so on.  They are all point-to-point signals, with one source and one load.  (Cable TV RF splitters contain circuitry that manages the split properly.  They are not simply three-way wire links!)

The most cardinal of offenses you can commit, is having signals run between ground domains.  A signal connecting from one 'point' of the 'star' experiences a different RF voltage, and encloses a loop that is susceptible to magnetic fields.  If that loop happens to pick up some flux from the next loop nearby, you get an oscillator.  If it picks up ambient radio signals, you get interference -- from anywhere in your circuit, not just the input!

No, you must use a solid ground plane, in almost all cases.

Star grounding is still quite possible, but it requires appreciating that an amplifier's input voltage difference (because all amplifiers are differential; the simplest merely have "+in" tied to GND) is what it sees, and that there is no such thing (indeed there can be no such thing as) absolute ground!

Given this, you should design an amplifier stage, so it is sensitive to the voltage between two input signals, while the amplifier's supply current flows straight to ground plane.  The differential input now affords you the option of star-grounding.  And the "ground", in this case, is not some global point, but it is the ground reference of the proceeding amplifier stage, or signal input.  Often, that happens to be the ground plane, or the star point of the previous stage, so that the ground references tend to chain, or collect to the same point anyway (thus forming a star).  The important fact is that no load currents flow through the star point, so that oscillation is avoided.  Which is likely impractical, so it is still best avoided, by using an amplifier design that has separate input-ground and output-ground reference signals.

For 99.9% of circuits, again, such advanced subcircuit designs are grossly unnecessary, by orders of magnitude.  This level of detail only applies to extreme precision, low noise circuits.  Most designers will go their entire career without touching a circuit like this.

Tim

[T3sl4co1l]

I've recently get an answer from TI and they said me that all CAPs of VR should be connected to VR power/ground domain.

Two things:
1. Likely, they* are not grounding experts, themselves.  They are merely parroting the safest information that they have: put the caps as close to the regulator as possible.
2. The underlying purpose, is to minimize possible stray inductance between the regulator and the nearest capacitors.

The reason underlying that purpose, is the regulator needs to be in an environment where the impedance is low, stable, and resistive or capacitive (depending on type).

The amounts of capacitance and resistance allowed or required, [necessarily] dictate the maximum inductance that can be allowed between those components.

If an LDO requires an ESR of 0.5 ohm and a capacitance of 2.2uF, the RC time constant is 1.1us.  The L/R time constant must be shorter than this, in order for the supply to have a predominantly RC-like impedance.  (Otherwise, the L would dominate, and the supply would exhibit ringing; possibly, the regulator itself would become an oscillator.)  This means Lstray << 0.55uH.  Which is a pretty considerable amount of inductance (about a meter of hookup wire), but how far smaller than this amount it must be, depends on the LDO's internal circuitry.  If the factor is 1/10th, then the limit is 10cm, which is typical of most HDOs (classics like the LM7805).  Fast LDOs will be even more critical, so that a few cm is the limit.

Returning the capacitors to a distant ground would obviously violate this, but in a particularly sneaky way, because the inductance is between grounds: so that, what you thought was "ground" (in the absolute sense), is actually being skewed by the currents flowing between these two branches of ground.  And as a result, neither regulator (nor most other loads in the circuit) are truly seeing the "ground" you should hope to provide.

*The TI forums are made up of customers and FAEs.  I've met plenty of FAEs; most are generalists, and few are expert at any particular subject.  They're almost universally bad at EMC, and matters such as grounding.

To be clear: you absolutely can make a circuit worse by adding too many bypass caps.  But the chances of this happening at random, are very small.  The chance of a circuit being worse by using too few bypass caps, is very high.  This is the only reason why datasheets, appnotes and FAEs recommend bypass caps, and lots of them.  It does not arise from a nuanced understanding of power distribution network (PDN) dynamics.

After all, they don't know your particular circuit, or how you're going to route it, so it is impossible for them to evaluate your PDN, for you.  That is your responsibility (or mine, if you hire a consultant like myself to do this analysis and provide you that assurance of quality!).

I've found that in electronics there's a lot of discordances about ground topic. This remember me also that I've read some papers about how to ground correctly capacitors or connect local ground planes to main ground plane; a lot of people advice to use a single via each plane but in most of professional boards you can find 4-5-6 vias connecting same plane to main plane. Who is right?

You're asking the wrong question.

You should be asking to quantify a via.

Making a sweeping generalization that "four is better than one" is ridiculous.

A single 0.3mm via, through 1.6mm PCB, with typical 0.5-1oz copper plating thickness, has about 3nH inductance and a minuscule amount of resistance (< 1mohm).  It is capable of handling 2-3A without getting dangerously hot.

If this is sufficient for a given location, then you only need one.  More will have no effect.

If it is insufficient, as might be the case for a high current switching converter (where nH and uohms matter), you will need to use more.

The most frequent application of many vias, is thermal.  A tight array of vias will almost triple the thermal conductivity of the PCB.  If filled with solder, double that again.  (You should use relatively large vias, if you expect them to fill with solder.  I recommend 0.5mm i.d..)  Applied to a DPAK type power device, the power dissipation can be increased from a limit of 1W (no copper pours or vias) to over 10W (with large copper pours, solder-filled thermal vias, and thermal pads and heatsinking on both sides).

Tim

[Yaro]

Thanks for your answer! It explained me more about caps and VRs.

About Vias, my question was more related to possible noises that may harm MCUs, ADCs and Sensors since they have low courrent consumption of 50mA to 200mA peaks.

I've searched about advices and found this:
http://electronics.stackexchange.com/questions/15135/decoupling-caps-pcb-layout
and most voted answer by "Olin Lathrop".
As I understand he advices, to keep components and circuit sensibility to RF as low as possible, to create a big a single ground plane for analog, a big a single ground plane for MCU digital ecc... for every component or power domains and to connect them to main ground layer using a single via per each plane. This, I suppose, to have big and compact ground to shield PCB and avoid ground loops. And, as he say, from his experience this is a good practice to keep EMI enough low even to pass FCC certification without can shields.

I've checked also on other websites that advice, to eliminate effect of via parasitic inductance, to use 2 vias each cap and multiple vias each ground plane if more caps are connected to same plane. Also, it's not adviced to use a single plane with a single via becouse you're going to create long ground paths that may create RF antennas, big resistance or harm fast speed applications. And to keep vias as close as possible to capacitors.

In either layout is supposed to not mix components domains as, for example, connect decoupling caps of digital and analog on the same via or share grounds or cross signals.

Now, I've created some boards using both method. Some boards creating biggest and compact ground plane I was able to do before connecting it via a single via to main gnd layer (4 layer boards), of course isolating this via on the other side of the board to avoid that this ground via will add another ground via on the other side. Something crazy, very long and very brain consuming for complex board with multiple microcontrollers and a lot of signals.
And I've tried also the simply way about don't care about how much vias I had, just to keep them as close as possible to decoupling caps. With each top and bottom ground islands with 10++ vias.
My conclusion was, since I never needed to certificate any of my boards, that all boards worked without problems. But I did this becouse I like to keep a good practice if maybe in the future I'll need to create a more ""professional"" board.

But I supposed that what "Olin Lathrop" said was true.

Now I need to wire a sensor that have an analog and a digital part.

My layout was this: (wire are just temporary connection to explain ground paths, they will be removed and all will be filled with a solid ground plane)


I thought, if I connect all possible grounds of decoupling caps, voltage regulators, analog pins of my sensor to a single ground plane, connect all to a ferrite bead and then to a single via to the ground layer it will be the "most isolated ground even seen" (joking). But what I'm also worry about is that this may couse other problems that I don't know.

An easy way was this:


What is better? Worth really spend time to create a layout as "Olin Lathrop" advice?

[Siwastaja]

When you have partitioned digital and analog sections properly by component placing and have taken care of current paths by routing traces on the right sections, the return currents in the ground plane are approximately the same, regardless of whether you have the split or not. Split won't help, because the return currents are already going in the right place; the current takes the shortest path, and you should design the routing this in mind in any case.

If you have any mistake or brain fart in your partitioning or routing -- or you just cannot place and route your partitions completely separately, because, you know, most often these things do interact with each other! -- then the split will make things a lot worse than just having a solid plane.

Split plane needs solid understanding, and of course it can fix some issues in some cases. As a general advice, it's extremely dumb.

[Neilm]

I have about 15 years experience in electronics design - especially involving EMC compliance and small signal processing. In all that time, I have come to realise that there is only one time when I will agree that split 0Vs are a good idea. That time is if you require galvanic isolation between the two planes. Every other time will at best have no effect, at worst make things very much worse.

Once I had to rework products that were affected by a new EMC regulation. All of these had separate ground planes (one had as many as 5 different 0V tracks). Each of these was fixed by going to 4 layer boards with a single 0V plane. In some cases, the performance was improved and some were actually cheaper as we didn't need the ferrites that were put on to pass the emissions.

[Yaro]

I have about 15 years experience in electronics design - especially involving EMC compliance and small signal processing. In all that time, I have come to realise that there is only one time when I will agree that split 0Vs are a good idea. That time is if you require galvanic isolation between the two planes. Every other time will at best have no effect, at worst make things very much worse.

Once I had to rework products that were affected by a new EMC regulation. All of these had separate ground planes (one had as many as 5 different 0V tracks). Each of these was fixed by going to 4 layer boards with a single 0V plane. In some cases, the performance was improved and some were actually cheaper as we didn't need the ferrites that were put on to pass the emissions.

I quite always use 4layer boards. Same in this case, I'll always have a solid ground, under the layer with signals and components, without splits becouse I'm creating a layout on a 4layer board. What I'm confused on, is the ground on top layer where I can find my components. On this top layer I've placed components on different sides of the board to not mix signals(analog side of the board and digital side), but both side have a single and continuous solid ground plane under them. What I'm not sure is how it's better to ground this components on top layer:
- Should I connect all analog parts to an analog ground island on top layer and digital parts to digital ground island on top layer? or I can mix them without problems?
- Each of this island on top should be connected using a single via or can I don't care about how much vias it have?

This are my questions, I have a solid ground and I will not spit it, but I need to know how it's better to connect ground islands on others layers to main ground layer.