How to read memory timing specs?

[technix]

I got very confused at the memory timing specs and how to apply it to the processor's memory controller. Any help?

To be specific, I am trying to tighten the timing as much as possible on STM32F417ZG FSMC and IS61WV51216BLL-55TLI. The STM32 chip is running at 168MHz. All the Chinese demo code I saw uses the default timings on the controller, which works but is not optimized since it wastes cycles. I want to tighten it up as much as possible. This is even more important on one of my dev boards as that one is populated with a IS61LV51216-10TLI which is a 10ns SRAM instead of a 50ns one, and I definitely need to squeeze the timing as much as possible to extract its full performance.