Inductor saturation tester, alternative route to dump the excess energy ?

[BravoV]

After reading this excellent thread made by jahonen -> https://www.eevblog.com/forum/projects/inductor-tester/ , curious if it is workable to dump the excess energy from the inductor during the discharge cycle that will go through the lower mosfet into light bulb instead of wasting it by heating the poor mosfet and the sense resistor if without the bulb ? 

We don't need to measure or observe the discharge cycle anyway, cmiiw.

[SeanB]

Try to put the light the other side of the mosfet so it stays saturated.

[BravoV]

Ahh.. thanks a lot SeanB, apparently I forgot the lesser Vgs caused by the bulb's drop out voltage when discharging, and eventually will cause the fet to heat up more in less saturated state, noob mistake. 

So is this workable ? Did I miss anything ?

[Jay_Diddy_B]

Hi group,

Here is a slightly different idea. The inductors are place in a asymmetric bridge. This allows the energy in the inductor to be recovered and returned to the supply. This allows testing of high current inductors with a small bench supply. The bench supply only has to supply the circuit losses.



I have attached the LTspice model if you want to play around.

Note: in the LTspice model the inductors do not have their saturation characteristics modelled.

Happy New Year !!!

Jay_Diddy_B ( I am in disguise  ->  O0 )

[jahonen]

I wouldn't be worried about heating the mosfet or the sense resistor, but the main advantage would be faster current decay if one could allow higher voltage across the inductor. In principle you could do that but the mosfet driver doesn't like that the switch node goes very negative.

Of course, one could make much simpler circuit by leaving just the bottom mosfet and putting the sense resistor between mosfet source and ground. The inductor under test would then lie between positive supply and the mosfet drain. The main disadvantage would then be that the fet gate charging spike would also be measured. But then one could put a diode from mosfet drain to the cap bank, to recuperate the stored energy back to use (think it as a boost converter boosting its own supply voltage!). Also, the gate driver could be simpler then. With this configuration, one could use more elaborate high-side current sense amplifier, to avoid measuring mosfet gate current.

Regards,
Janne

[BravoV]

Here is a slightly different idea. The inductors are place in a asymmetric bridge. This allows the energy in the inductor to be recovered and returned to the supply. This allows testing of high current inductors with a small bench supply. The bench supply only has to supply the circuit losses.

Hmm.. great idea, dumping the energy back to the bulk caps, never thought of that, thanks a lot ! 

Now time to digest & understand it thoroughly.

Quick question, for an accurate result reading, what should I aware of compared to the original one ?



@Janne, its great to see you here, thanks ! I launched this thread cause don't want to "contaminate"  your fine thread with noob questions like this.

Of course, one could make much simpler circuit by leaving just the bottom mosfet and putting the sense resistor between mosfet source and ground. The inductor under test would then lie between positive supply and the mosfet drain. The main disadvantage would then be that the fet gate charging spike would also be measured. But then one could put a diode from mosfet drain to the cap bank, to recuperate the stored energy back to use (think it as a boost converter boosting its own supply voltage!). Also, the gate driver could be simpler then. With this configuration, one could use more elaborate high-side current sense amplifier, to avoid measuring mosfet gate current.

Seriously, I'm having a difficulty to visualize the circuit and doubting my self, would you mind to make some quick scratch of the circuit in picture from above description please ?

[Jay_Diddy_B]

Hi,

The circuit that Jahonen proposed looks like this:



This circuit does not recover the energy stored in the inductor. The energy is dissipated in the winding resistance of the inductor and the diode.
The duty-cycle should be low, to allow the inductor current to reset and control dissipation in the diode.



If ypu are testing small inductors it is not important to recovery the energy. As the energy in the inductor increases it becomes increasingly important to recover the energy to reduce power dissipation.

This circuit and the bridge circuit, that I proposed, include the MOSFET gate current on the sense resistor. Fortunately, there is no gate current when the inductor saturates.

Inductor saturation is typically defined by a 30 - 40% change in inductance. In the tester this is seen as a change in dI/dt.
For the intended purpose these testers will be accurate enough.

Jay_Diddy_B

[jahonen]

Hi,

The circuit that Jahonen proposed looks like this:

This circuit does not recover the energy stored in the inductor. The energy is dissipated in the winding resistance of the inductor and the diode.
The duty-cycle should be low, to allow the inductor current to reset and control dissipation in the diode.

Yes, I realized that after I posted my message and turned off my PC . Naturally, one needs a some form of a bridge circuit to recover the energy, like in motor drive circuits.

But, having used the thing in practice with various bench supplies, even if the energy is not recovered, no need for beefy power supply as the energy required to saturate the inductor (in cases where such tester construction is applicable anyway) is quite low. Intended usage is anyway by single pulses or low repetition frequency (<10 Hz) anyway (works nicely with a DSO with averaging acquisition).

Regards,
Janne

[mazurov]

I like JDB's idea. It seems that it should be possible to achieve much higher pulse rates which is handy if one wants to simulate real life conditions for a particular inductor to observe temperature rise, for example.

Another handy feature would be a possibility to inject DC current into DUT. I'm going to build a circuit and check it as soon as the parts arrive.

[BravoV]

PS : Edited my previous post cause I just realized the H-bridge model using 4 mosfets wont work, silly me. 

JDB, your idea is really great after observing the simulation you provided, what kind or type of mosfet drivers needed for this concept below to work ? The same one used by Janne's circuit like IR2011 is enough ? Btw, both are N-Mos, no P-Mos.




@mazurov, thats great, please share once you built it ! 

[Jay_Diddy_B]

Hi BravoV and the group,

The MOSFET driver required is a little bit different than a normal half-bridge driver.

For my circuit to work properly, both of the MOSFETs in the bridge have to be ON at the same time. Normally you would not want this condition and the circuit would have dead time between the top and bottom MOSFETs.

The other issue with MOSFET drivers like the IR2011 is that they require the circuit to be switching to provide a charge pump action to drive the top MOSFET. In this application, it is desireable to be able to do a single pulse or low repetition frequency.

I chose a P Channel MOSFET for the top MOSFET. This allows me to drive it with the level shifter M3 and Q1. As originally drawn there are some limitations. The supply voltage must be high enough to turn on the MOSFETs but less than Vgs max (typically 20V).

I deliberately chosen not to drive the MOSFETs very hard, that is why I have 22 ohm series resistor on their gates.

A 555 will provide enough gate drive for this application.


I would also recommend that you place a 51 ohm resistor in series with the output from the sense resistor. Make the connection to the scope with 50 Ohm coax and terminate the scope input with a 50 Ohm resistor.

This will divide the signal amplitude by 2, but you will get much cleaner waveforms.


Jay_Diddy_B

[BravoV]

@JDB, thanks alot for your help, this has been very educational, at least for me. 

The MOSFET driver required is a little bit different than a normal half-bridge driver.

For my circuit to work properly, both of the MOSFETs in the bridge have to be ON at the same time. Normally you would not want this condition and the circuit would have dead time between the top and bottom MOSFETs.

The other issue with MOSFET drivers like the IR2011 is that they require the circuit to be switching to provide a charge pump action to drive the top MOSFET. In this application, it is desireable to be able to do a single pulse or low repetition frequency.

You know what ? Your comment above made me read tons of those mosfet driver's datasheets & appnotes from various manufactures, and learned a lot, yeah, those dead time and also the one with charge pump with the boost cap needs quite some high frequency in order to charge the gate driver strong enough.

While in our case here, the signal might be running at quite low frequency and also very low duty cycle, it might not be enough for the charge pump to work effectively, correct me if I understand it wrongly.

Ok, then mosfet driver is out. 

I chose a P Channel MOSFET for the top MOSFET. This allows me to drive it with the level shifter M3 and Q1. As originally drawn there are some limitations. The supply voltage must be high enough to turn on the MOSFETs but less than Vgs max (typically 20V).

I deliberately chosen not to drive the MOSFETs very hard, that is why I have 22 ohm series resistor on their gates.

I'm curious on the reason why you prefer not to drive the mosfet very hard like Janne did ?

A 555 will provide enough gate drive for this application.

I assume you mean using the bi-polar version of 555 instead of cmos version right ? Cause it will be driving the gate of M2 and M3 mosfet.

I would also recommend that you place a 51 ohm resistor in series with the output from the sense resistor. Make the connection to the scope with 50 Ohm coax and terminate the scope input with a 50 Ohm resistor.

This will divide the signal amplitude by 2, but you will get much cleaner waveforms.

Yes, will do since my scope has 50 termination mode, thanks for the reminder, and note to others that have low end dso, most of them don't have 50 ohm termination.


Another question, the M3 doesn't need to be high power mosfet right ?

[jahonen]

IR2011 does not have any cross-conduction protection or integrated dead time so you can actually turn both outputs on simultaneously, and it should work fine as posted by BravoV. Only thing is that it needs a path to charge the bootstrap capacitor. Otherwise, the high side driver fails to turn on due to UVLO. Also, if you don't use four mosfets (i.e. full bridge configuration), and two IR2011s, then make sure that the diodes used for energy return are beefy enough, they should be able to withstand the maximum current in the inductor.

Regards,
Janne

[Jay_Diddy_B]

Hi BravoV and the group,

How hard you need to drive the MOSFET depends on a how short a pulse you need, or how small an inductor you want to test. The advantage is that by not driving the MOSFET hard, the gate current is insignificant when looking at the source current.

MOSFETs have steadily improved over the years if you look at a figure of merit Gate charge / RDSon.

The other argument is power dissipation.  Power dissipation increases with soft gate drive. But since, we are doing low repetition frequency, I am not too concerned about switching losses.


The Bipolar version of the 555 is preferred. It has the capability of +/- 200mA of drive. The gate drive could be increased with a complimentary emitter follower if required. I am trying to use generic parts, that people should have in their junk boxes or that easy to get.

Thank you for clarifying the 50 ohm termination.

M3 is a small signal MOSFET (2N7002, BSS170 etc.)

I am going to try an build the circuit over the weekend.

Jay_Diddy_B

[BravoV]

IR2011 does not have any cross-conduction protection or integrated dead time so you can actually turn both outputs on simultaneously, and it should work fine as posted by BravoV. Only thing is that it needs a path to charge the bootstrap capacitor. Otherwise, the high side driver fails to turn on due to UVLO. Also, if you don't use four mosfets (i.e. full bridge configuration), and two IR2011s, then make sure that the diodes used for energy return are beefy enough, they should be able to withstand the maximum current in the inductor.

Like this ?

Ok, I'm a bit confused here, especially the decaying route pointed by the dotted arrow, once the energy in the inductor depleted, isn't that same path will charge the inductor again if we don't control the timing precisely ? 




Also about the charge for the bootstrap capacitor, on my previous topology using diode for the decaying route instead of mosfets, any idea how to solve it without getting the circuit grows overly complicated ? 

I am trying to use generic parts, that people should have in their junk boxes or that easy to get.

I am going to try an build the circuit over the weekend.

This is great, especially using ordinary easy to find components  , can't wait to see your implementation.

[jahonen]

Like this ?

Ok, I'm a bit confused here, especially the decaying route pointed by the dotted arrow, once the energy in the inductor depleted, isn't that same path will charge the inductor again if we don't control the timing precisely ? 

Also about the charge for the bootstrap capacitor, on my previous topology using diode for the decaying route instead of mosfets, any idea how to solve it without getting the circuit grows overly complicated ? 

Yes, it does charge the inductor again. Diodes are a good that they will not charge the inductor back but of course dissipate fair amount of instantaneous power due to the forward voltage drop. One way would be to monitor the current and stop driving those fets when the current turns negative, but I guess that is quite complex solution.

I think that a suitable resistor in parallel of the left diode will solve that charging problem, provided that you are not in a hurry to charge the capacitor, i.e. the pulse frequency is low enough, so that there is enough time to charge the capacitor before the next pulse.

Regards,
Janne

[Jay_Diddy_B]

Hi Group,

I have been busy building. Here are the results of my efforts.

Schematic:



Board Layout



Milling the circuit board on a LPKF Protomat 60



The finshed board after tin plating



The assembled board



Testing a 22uH Inductor. The scaling factor is 10mV per Amp. The saturation can be clearly seen at around 3.2A



With a Tektronix TCP202 current probe (red trace). The difference between the trace is MOSFET gate current.


I was driving the test circuit with a 10V power supply. The pulses were supplied by an HP8112A pulse generator.

Improvement:

An inverting stage should be added to the input.

I have attached a pdf version of the schematic.

Regards,

Jay_Diddy_B ( I am in disguise  ->  O0 )

[BravoV]

Wow .. so fast, I never expected you came out with so nicely built circuit so soon !  Btw, feel so jealous seeing that Protomat 60, its one of my dream machine. 

To be honest, the reason I started this thread was to start learning and trying to build much simpler one compared to Janne's nicely built, and the idea of dissipating the excess energy from the inductor popped out while learning it.

Now, I'm convinced and definitely I'm going to build it, thanks to you JDB and Janne too. 

In my version, the plan is to build a standalone unit with the signal will be supplied by using a much simpler pwm generator like using a 555 for generating the triangle wave and a comparator maybe like LM311 with a pot for duty cycle adjustment in order to get a really small pulse at low frequency. This should be workable right ?

Those scope shots are really nice, and if its not too troublesome, please shorten the pulse maybe like 10us to get close to the "knee" without the signal shooting up too high to show the complete cycle nicely in the scope screen.  And from your traces, it looks like the inductor decaying speed was so fast. Also how is the discharge cycle when the inductor was releasing the energy ? Again, if you had a chance, please do trace the TP4 point, curious to see how the voltage jumps at the point during the decay period.

Off topic, your TCP202 decaying red trace is slower with a slope compared to the black inductor trace which is straight vertical, why is that ? The probe's limitation ?

Again, thank you so much JDB.

[Jay_Diddy_B]

Hi BravoV and the group,


The LPKF Protomat is a great tool. It gets  (three thumbs up)


Here are some more screen shots from the oscilloscope that further explain the circuit action.





This condition is essentially the same as the earlier screen shot.

In this first picture I have 'zoomed out' to show the more of the cycle. The upper trace is the output from J1. The sharp edge is caused when the MOSFET Q2 is turned off, it is no longer possible to measure the inductor current.

The Tektronix TCP202 current probe is on the inductor, so it is able to measure the inductor current as the energy is returned to the supply via D3 and D4.

The lower Trace is TP4, one side of the bridge.







I have now reduced the width of the pulse from the pulse generator, keeping the scope settings the same.

You can no longer see the inductor going into saturation






In this screen shot I have 'zoomed out' further and increased the repetition frequency. I have also added TP3.

The voltage across the inductor is the difference between the TP3 and TP4 waveforms. Again, this shows how the energy is recovered.

The current draw from the 10V power supply from this test was 0.058A, which is 0.58W and this includes all the power consumption in the gate drive circuitry.




Jay_Diddy_B ( I am in disguise    ->  O0  )

[BravoV]

Thanks for the scope shots JDB (or what ever your real name is) ! 

In this first picture I have 'zoomed out' to show the more of the cycle. The upper trace is the output from J1. The sharp edge is caused when the MOSFET Q2 is turned off, it is no longer possible to measure the inductor current.

Again, beginner's mistake, silly me. 

The voltage across the inductor is the difference between the TP3 and TP4 waveforms. Again, this shows how the energy is recovered.

During the decaying period, once the inductor's voltage (minus diodes drop out) is equal to power supply rail, the inductor will self dissipate the rest of it's own excess energy through the ringing as observed at the scope shot, am I correct ?

Just curious and purely academical here, curious in ball park number on how much percentage of the energy left in percentage of total only at that ringing period ? 

Still learning, hope you're not bored to death entertaining my noobness. 

The current draw from the 10V power supply from this test was 0.058A, which is 0.58W and this includes all the power consumption in the gate drive circuitry.

I'm aware of the energy required to charge those big caps when the circuit was turned on for the 1st time, but lets ignore this initial state, from this result that this circuit draws only 58 ma at 10 volt is pretty low isn't it ? This is valuable info, so I don't need a beefy power supply. 


Another question 

Is it easy to separate the supply of the driver (inc the pwm generator) in the yellow shaded area from the green one at the below pic ?

The reason is, say for an inductor with high inductance and high current saturation, this will have a really slow di/dt or shallow loong trace, so the easier part is to crank up the supply voltage to speed up the di/dt, and vice versa like small inductor with low inductance that has really steep di/dt, reducing the supply voltage will make the measurement easier.

Of course there is a reasonable min and max test voltage for the inductor say like starting from 5 volt up to maybe 30 volt ? Or what ever range that you think is possible without over complicated your design ?

Thanks in advance, JDB. 




PS : Suggesting you to attach any pictures at this forum like I did here, instead of using external hosting like the tinypic.com you're using, we never know what will happened in the future for this kind of hosting sites. An example what is happening with these so called "FREE" pic hosting site -> HERE. 
Just use the attach feature right below the dialog box where you type your post.

[Jay_Diddy_B]

During the decaying period, once the inductor's voltage (minus diodes drop out) is equal to power supply rail, the inductor will self dissipate the rest of it's own excess energy through the ringing as observed at the scope shot, am I correct ?

Just curious and purely academical here, curious in ball park number on how much percentage of the energy left in percentage of total only at that ringing period ? 

Still learning, hope you're not bored to death entertaining my noobness. 

There is not very much energy left at all. The evidence for this is the Tektronix TCP202 shows essentially zero current. What is happening is that the inductor is ringing with the capacitance of the diodes and the output capacitance of the MOSFET.

I'm aware of the energy required to charge those big caps when the circuit was turned on for the 1st time, but lets ignore this initial state, from this result that this circuit draws only 58 ma at 10 volt is pretty low isn't it ? This is valuable info, so I don't need a beefy power supply. 

Absolutely, I had my Power supply current limit is set to 200mA.

Varying the Supply voltage.

As I have designed the circuit, it is all dc coupled. I also designed the circuit using commonly available parts.

I have given some thought to using transformer coupled gate drive. This  means using an non-junk box part, I could probably find some thing on Digikey. If I did this it would be really easy to separate the supplies.

Stay Tuned.......


Jay_Diddy_B

[BravoV]

Varying the Supply voltage.

As I have designed the circuit, it is all dc coupled. I also designed the circuit using commonly available parts.

I have given some thought to using transformer coupled gate drive. This  means using an non-junk box part, I could probably find some thing on Digikey. If I did this it would be really easy to separate the supplies.

Stay Tuned.......

Great .. , looking forward to see the new revision and thanks for your generousity.

About transformer, I'm not scared to wind my own and will not hesitate to go thru trial & error if needed, its part my learning journey too. Btw, I have tons of salvaged inductors or ferrite cores here, and this is the sole reason why I'm interested in this circuit from the 1st place. Hopefully you will assist me in making one if required.

About digikey, though I can afford it, a fix minimum $70 just for the shipping cost alone is too much if just for few passive components 

Please, apart from the required transformer, use common or easy to find components in your design if possible.

[Jay_Diddy_B]

Hi BravoV and the group,

Here is a LTspice model of an Inductor Tester with transformer coupled gate drive. The transformer allows the two supplies, one for gate drive and the other to power the inductor to be separated.



This gives these results:




I have attached the LTspice model for you to play around.

Jay_Diddy_B

[jahonen]

That particular pulse transformer looks a bit limiting for this kind of application since it limits the maximum pulse width by saturating itself. When that happens, the gate drive voltage collapses. Maximum volt-µsecs is specified as 95 V*µs, so at least I think it is a quite limiting for this kind of application (12 volts gate drive supply means that maximum pulse width attainable is 95 V*µs/12 V = 7.9 µs if we go by the specifications).

For example in this measurement I needed several tens of µs of pulse length before the saturation occurs (I believe that the supply voltage was 30 V). Note also the di/dt math trace which can be used to calculate the inductance for a particular inductor current.

I'd prefer that high-side gate driver, easier to use. But, it will limit the gate drive pulse length also, but what I measured the maximum pulse length for the values I have in my tester is several milliseconds before the high-side capacitor runs dry and UVLO kicks in, and is easily increased by increasing the value of the bootstrap capacitor.

Regards,
Janne

[BravoV]

JDB, thanks for the new revision, but I just knew that the issue Janne's brought out about the max pulse length, how to overcome this if we need longer pulse ?

Thanks Janne, I tested JDB's new revision at ltspice using longer pulse (40 us), apparently the gate voltages collapsed sooner below 10 volt at < 10 us as you stated, these are the gate-source voltages for both mosfets M1 and M2.