L-Edit forces one of my Metal 1s to be GND

[Ronny]

Good night everybody,

I am making a NAND gate in L-Edit for a project, but I am getting an weird bug.
In the bottom of the circuit there are 2 metal 1's, one of them (the one in the bottom that is really long) is the true GND and another one connecting the source of the first NMOS to the drain of the second NMOS. For some reason when I extract the circuit L-Edit is forcing the piece of metal 1 that connects the two NMOSs to be GND.
I have tried calling this piece o metal 1 Vx for example, but L-edit just ignores it and calls it GND again. When that happens the bottom NMOS is shorted out of the circuit.
Can anybody help me please?

Thanks a lot.

[Ronny]

I can't just change it in the extracted the file, because it will be a headache when I make my full project and it is there.

[rfeecs]

Maybe you made a mistake in your layout?
I would think the layout for a CMOS NAND gate is very standard.
Yours doesn't quite look right.  Seems like you have an extra substrate connection.

[Ronny]

Maybe you made a mistake in your layout?
I would think the layout for a CMOS NAND gate is very standard.
Yours doesn't quite look right.  Seems like you have an extra substrate connection.

Hello,

Thanks for your answer. I did, in fact, change the layout. I initially thought it would be better this way because by joining the NMOSs I would have a different threshold voltage for the top one. Problem is that when I do that the bulk connection that would allow me to have the same threshold voltage for both NMOSs shorts the bulk of the top one to GND through the body. That was the problem.
I ended up doing the standard one.

Thank you.