Lab Power Supply - The Lost Current

[xavier60]

It did become unstable when I reduced C6 to 1uF
Without changing the speed of the MOSFET, I was able to make CV mode stable by tweaking the CV op-amp's feedback components.
So I hope this means that I can now more trust the stability when I make C6 larger again.
 I gave it some Proportional gain also which has helped the CV op-amp regain control much sooner from voltage overshoot after a load dump.
This period after an overshoot can be a problem because the CV op-amp drives the Gate to a lower than usual voltage. If load is applied during this period, it catches the CV op-amp off guard and not able to turn the MOSFET on in time causing a very deep dip in output voltage.

I really must make the PCB now.

[C]

I could be wrong but just looking at it, it's still not very good.

Guess I am not explaining very good.

If the two op amp circuits so not look the same you have a problem.
The difference between CV & CC is nothing but gain.
Really think it through.
R5 uses current to create a Voltage.
R20 & R21 a voltage divider output is a voltage.
Looking like you just want to hack a poor CC hack on a voltage regulator..

Adding cap's is very last step. Should have very good stability with out cap's.
An osculation is trying to tell you it's bad.
You have to find the reason it's bad and correct the real problem source not hack a patch.

To see the true problem requires looking, testing and some times adding or modifying to find the actual problem.

Remove feedback from CV amp and just use a resistor to gain some control.

What will help is some non linear gain in path. Remember that this is one big mess of interactions and need to get all correct.
If is osculates work to make it osculate at a higher frequency.

First get you connections to Q2 area correct and good.
With your 12V common connected to + output you are adding control noise into what you are trying to sense. This can cause problems.

Moving 12V common to drain of Q2 is proper connection to prevent control currents effecting both sense.

Start testing CC mode, just set CV to not harm load.

Start with a load of the biggest cap you have as a load.
The big cap will give you more time to use scope to look at circuit.
With cap discharged you should see a quick ramp up to set current.

Now think about CC op amp. It's acting like a comparator more then an an amp. This is a cause of osculation
Remove C1 and replace it with a resistor.
This resistor value is like current gain.
As you are not changing to CV mode until load cap is charged, CV circuit should not be effecting circuit.

Replace R1 with two resistors in series. Parallel one with back to back diodes. This should be the higher value resistor of the two.
What this does is change your rate of change to be non-linear.
You are using the conduction curve of the two diodes.
With cap as load. when turned on, you will transition from diodes not conducting to diodes conducting hard.
As current gets closer to set current, The rate of change will decrease due to diode curve.
If this osculates decrease feedback resistor on CC op amp.
Change values of two R!'s
Resistor paralleled by diodes is center control.
Other resistor is high rate of change control.
Feedback resistor is how hard to go at high rate.
All interact.

Once you have best action. lesser value load cap should just have voltage across cap changing at a faster rate.

If you have osculation, look for cause.
bypass caps should be large between op amps V+ & V-
A cap to V common is a source of noise.
A huge cap on output has no high frequency, as caps are for High frequency No caps, Find the problem.

When you have this make CV op amp match. only feedback resistor is different.
Test it with out going into CC mode.

When you have this, next step is working on mode change.

Note when testing in CC mode with large cap you can switch in/out a resistor to discharge the cap.
Q2 will be changing from open with resistor doing allmost all the discharge back to some on resistance when resistor is switched out.

If you have problems, think of a good change, think you will save time posting the change first.
Think along the lines of non-linear with smooth changes.
To be clear an osculation keep going.
Ringing that decreases is not osculation.

For example op amps have no output down control, Only veering up control. A resistor with one bypass diode changes feedback of up vs down.
 

[xavier60]

I could be wrong but just looking at it, it's still not very good.


Looking like you just want to hack a poor CC hack on a voltage regulator..

No, not at all. In my previous post I explained that I had eliminated  instability when C6 is 1uF. I can even get it to be stable with no output capacitor. But I will be putting a 47uF on the output when I finish it.
What part of the circuit looks like a hack? Because the CV and CC are working very well.

Extra: Ill post an updated schematic after I have done the PCB and done more testing.

[C]

If you still have 12v common connected to positive output.
It is not as good as it could be and that connection adds control noise to what you are trying to sense.

Proper connection for 12V common is between Q2 and current sense resistor.

[xavier60]

If you still have 12v common connected to positive output.
It is not as good as it could be and that connection adds control noise to what you are trying to sense.

Proper connection for 12V common is between Q2 and current sense resistor.

That would reduce noise but makes voltage sensing a bit more complicated, needing a balanced input amplifier.
This is the schematic for the Agilent U8002A. They seem to have tied the 12V common to the + output. Difficult to be certain with the way they use ground symbols.
And I can't find the output capacitor to see what size it is. It appears to be about 100uF when I do an external measurement at the output terminals of my U8002A while it's totally powered down.
http://d1.amobbs.com/bbs_upload782111/files_39/ourdev_639010D487UM.pdf

[C]

If you look at that HP supply you will see a whole bunch of differential connected op amps.

And you can create a dual differential mixer using an op amp
I call this a mixer as used in audio but it is actually a summer.

Think differential output -  differential reference.

In addition to working it also lowers noise some.

[Kevin.D]

One of the big problems for a power supply is the unknown load.

That's the challenge really :

Designing (not copying or combining a few integrated regulator's) a DECENT bench power supply really takes a fair amount of knowledge and skill, many try but few succeed in creating anything decent, the web is full of them.
It's far more challenging  than designing a C.V/C.C source (linear or switcher) for a 'known' fixed load.

No, not at all. In my previous post I explained that I had eliminated  instability when C6 is 1uF. I can even get it to be stable with no output capacitor. But I will be putting a 47uF on the output when I finish it.

To be sure a design is up to the job you have to test the stability and frequency response under the most 'unfavorable' loads you can expect.
knowing what the most unfavorable conditions possible to test under then is crucial in a design/test process.

Here's a few suggestions to try :-
For C.V Mode:-  test at a set voltage that gives lowest voltage across  Mosfet (which gives max Cgd) and  near the max current rating of the supply using a current sink as the load (so high Z load) and load the output with ceramics, say 2uF worth to emulate a load which may have lot's of ceramic decoupling cap's (so this test has created the lowest possible frequency gate and load pole's using very low esr caps).
Then also test with just a low ohmic load and no load capacitance and at high current and at max/min voltages (now there is no load pole and a high current (= higher FET Gfs) so the Vcntrl loop should be at max gain/speed).
For CC mode test. Try load stepping at high current with various pure inductive loads (10uH,1mH,100mH), but the large capacitor you generally find on the output of supplies though makes C.C mode very stable and ruins it's transient load response .

The large cap on the output of almost all bench supplies is a bit of a fudge really but it gives a very good load transient response in CV mode and makes for easy stability (rely's on large size and ESR) so the trade off is  sacrificing  CC mode performance in favor of CV mode performance.

 
Best Regards   . Kevin

[xavier60]

For C.V Mode:-  test at a set voltage that gives lowest voltage across  Mosfet (which gives max Cgd)

That is a problem, when the regulator goes into drop out. The Gate gets over charged causing a longer than usual delay when either op-amp tries to turn off the MOSFET later. Ill try some higher current op-amps later like TLC072. Reducing the control supply rail voltages should have some advantages also.

[C]

Most op amps have a limited current output.
Here the op amps only have one direction control with the other by resistor.
With limited current output of op amps in mind, think a two transistor current booster would be a better choice.
This could be placed next to the gate of Q2 and give a better increase/decrease of output.

If you have a signal source need to check the booster for speed.
Here you can do a non linear voltage to current curve of booster with the center more action of op amp and current increasing for larger changes.
have booster powered from 12v rails.
Make up side match the down side of booster.
Note Booster not just a high current driver.

You need to check the range needed to adjust booster properly.
Take measurements of Q2 gate to base.

Make an xy chart of the values. One axis output voltage and other current.

Then test that the booster will function over the range need with a little extra margin.
Speed is important as you can easily slow the speed but not boost it.

[xavier60]

I have experimented with an Emitter follower buffer and have found little advantage in turning the MOSFET on faster than the 2ma from the pull up resistor. While Vds is above 2V, the Gate is fairly easy to drive. 
The TLC072 is suppose to output about 50ma which will turn the MOSFET off fast enough and I can increase the pull up current if needed also.

[C]

Think of a load like a esp32, sleep, running & transmit.
very fast change and too much drop and big problems.

Todays loads change very fast, and you need to test the dynamics  of the supply. Lack of fast change leads to larger cap across output which is bad for CC mode

[xavier60]

This is a load transient test I did at 3A while the output capacitor was 1uF. The voltage dip on the top trace is upside down because I am measuring everything with respect to the + output.
This response is comparable to that of my U8002A, and I suspect that it has a 100uf output capacitor. I wish I could be certain about this.

[C]

A transient lets things settle.

To know what you have, you need to test with repeated changes.

So what I see in picture is a slow response.

[xavier60]

A transient lets things settle.

To know what you have, you need to test with repeated changes.

So what I see in picture is a slow response.

Keep in mind that I tested my regulator with only 1uF on the output.
This is the same test done on my Agilent U8002A, a well respected model.
I think it would be very difficult to get it much faster than this.
Maybe the new op-amps will help.

[xavier60]

If you look at that HP supply you will see a whole bunch of differential connected op amps.

And you can create a dual differential mixer using an op amp
I call this a mixer as used in audio but it is actually a summer.

Think differential output -  differential reference.

In addition to working it also lowers noise some.

The ORing is done in a clever way in the U8002A. The CC op-amp,IC9, can take control of the CV op-amp,IC8, via D42 to pin 8. Pin 8 is one of the op-amp's compensation pins that provides a connection to the point where the transconductance amplifier's output connects to the input of the output stage.
So in both CV and CV modes, IC8's output has full source/sink control of the Gate.
http://d1.amobbs.com/bbs_upload782111/files_39/ourdev_638271E5Q049.pdf

[C]

And this is the U8002A that has slow response to over-current.

[xavier60]

And this is the U8002A that has slow response to over-current.

Yes, This test was done by connecting a 0.22 ohm resistor to its output with the U8002A set to 15V 1A. There is about 0.06 ohms of lead resistance.
The DSO shows over 10V being sustained across the resistor, about 45 amps.
I have little doubt that this is caused by too much delay in going from CV to CC mode, likely due to the time taken for IC9's output to slew down to where it can take control of the Gate via IC8.

[radoczi94]

It's interesting to see an actual supply during development. I didn't even knew, that high-er current opamps exist.

[xavier60]

I have removed my posts that contained schematics because they had a serious mistake that has found its way to my PCB design. Ill post a corrected one after I get it right.

[C]

I hope that you have found that CV circuit should match CC circuit.

With a CC mode & a CV mode control is Min (current OR Voltage).

With 0.1 R current sense  you have 0 to 3V current sense for a load range of 0 to 3 amps.

With a 0 to 3 volt voltage sense for an output of 0 to 30 volts output you have two matching control circuits.

If the two circuits do not match then you start getting a voltage caused change not equal to a current caused change.

With matched circuits, testing becomes a little easer.

[xavier60]

I hope that you have found that CV circuit should match CC circuit.

With a CC mode & a CV mode control is Min (current OR Voltage).

With 0.1 R current sense  you have 0 to 3V current sense for a load range of 0 to 3 amps.

With a 0 to 3 volt voltage sense for an output of 0 to 30 volts output you have two matching control circuits.

If the two circuits do not match then you start getting a voltage caused change not equal to a current caused change.

With matched circuits, testing becomes a little easer.

Do you mean they should have the same gain and response? Can you tell me where I can find an example? The Current Sense resistor is now close to 0.05 ohms. I'll eventually get some power resistors and mount them on the heat sink.
Anyways, I have corrected my massive blunder with the input circuitry on the CV op-amp.
The PCB is working as well as the breadboard mock up.
I'm still not totally satisfied with the CV to CC transition. Under certain conditions, there is brief dip in current after the initial spike.

Oh yes, also, I ended up adding the extra op-amps to make it digital ready. There are outputs for monitoring voltage and current. And the set inputs are now positive  voltage.

[C]

Total system is what counts and is what will power your load.

As I have stated many times you actually have foru states.
CV mode where current is not close to your current setting.
CC mode where voltage is not close to your voltage setting.
CV = CC
The fourth mode actually has two sub modes.
One where you are changing from CV to CC.
One where you are changing from CC to CV

Do you mean they should have the same gain and response? Can you tell me where I can find an example?

What happened to using common sense for answer?

Think of a load change.
If the load increases then you have two things happing, Voltage drops & current increases.

If you just look at the voltage drop then control will try to increase the Voltage.

If you just look at the current change then control will try to decrease current.

Only one is correct response.

If times do not match, then you can easily have a increase the voltage followed by a delayed decrease the current.

For a short this could be increase the voltage and output changes to max voltage the 30V+ followed by the decrease the current to x amps at 0V.

I would think that this is common sense.

[xavier60]

Think of a load change.
If the load increases then you have two things happing, Voltage drops & current increases.

If you just look at the voltage drop then control will try to increase the Voltage.

If you just look at the current change then control will try to decrease current.

Only one is correct response.

If times do not match, then you can easily have a increase the voltage followed by a delayed decrease the current.

When the output is overloaded while in CV mode, first the voltage drops, the CV op-amp immediately starts allowing the Gate voltage to rise. The CV op-amp has to react first because it is in control at the time of the overload.
The CV op-amp keeps allowing the Gate voltage to increase for some time after the current has exceeded the set point because the CC op-amp can't react quickly enough.  I have reduced this delay to an acceptable level.
Slowing down the response of the CV op-amp would allow extra time for the CC op-amp to react to the overload before the current rinses too high. I don't want to slow down the response of the CV op-amp.

[C]

From you post it is clear to see you are not thinking balanced or matched.

Don't slow the voltage side, speed up the current side.

You would only slow the voltage side as a last choice.

Think about what the test facts are trying to tell you.

IF you have a problem going from CV to CC then you also have a problem going fro CC to CV.

 

[xavier60]

This is the corrected schematic without the extra op-amps, in case anyone wants to experiment with it.
The circuitry at the output of the CC op-amp allows it to swing low at its full slew rate to take control of the Gate quickly during an overload. Q1 connects the compensation capacitor, C1, after the CC op-amp is in full control of the Gate.
This quick current control response might not be important to every one.
My Agilent U8002A would output about 40A for 100us in the same test.
The bottom trace shows the current response when the output is short circuited with the regulator set to 10V 3A.
The top trace shows the output voltage upside down because I'm measuring with respect to the + output.