If filter capacitance is to be used, which is indeed great in some cases where noise cannot be dealt with otherwise, I'd still go with lower R (than 2.2k) and higher C for the same RC cutoff, for even more increased immunity against external pulses by having bigger C. (Of course, C cannot become excessively big without having its package size and parasitic inductance increased, making very high-frequency filtration worse again, so indeed, you can see bigger (than your typical 10R-47R series termination) resistors in these cases.)
Just to give an example, a combination of 470R and 1nF would result in an RC time constant of 0.47 us. Assigning 10% of time to transitions, this would ballpark to a usable frequency of around 100kHz. 1nF capacitor would require quite some significant noise energy to be injected to change its terminal voltage to give false input reading. Now, with 2k2, the capacitor would only be 220pF. Still a huge improvement over just the pin parasitics, but given the higher level of noise coupling due to higher output impedance of the driving side, the capacitor has more to do. Hence, I'd choose 470R+1nF over 2k2+220pF.
By the way, the noise susceptibility figure (delta V required to cause a glitch) of the digital input stage is not the '0' to '1' or '1' to '0' threshold value; it's either the input hysteresis value, or the said logic threshold value, whichever is smaller; usually the hysteresis is smaller. Because noise can also couple during switching!
The input stage hysteresis is highly critical, because the transition is the critical moment where noise coupling can happen as well, and in fact, in synchronous digital logic, several signals tend to be switching nearly at the same time, possibly causing coupling exactly at this worst moment when the signal is exactly in the halfway of the logic low and high thresholds. If the input stage has way too little hysteresis, no amount of filter capacitance is going to fix the noise issues, because the capacitor can never filter perfectly due to its ESL, and especially PCB layout inductance - the extra filtration is then only making the susceptible transition area longer, and increasing the odds of the disturbance happening at that moment.
With very careful layout design, the filter capacitor can be placed within 1mm of the input pin, right to the ground plane, properly stiched and connected to the nearest ground pin of the input IC, and if it's a nice 0402 part, this is as good as it gets. However, nothing beats a nice schmitt trigger input in this kind of single-ended design, so that a noise disturbance of, say, even 1V, simply doesn't matter, even while transitioning.
BTW, I have yet to see a bus that is magically unsusceptible to "single pulses" strong enough to cause wrong logic interpretation. Single pulse strong enough will corrupt SPI, I2C, LVDS, RS422, or CAN, and in each case, requires design on how to manage data consistency checks and resends (some busses such as CAN offer this automatically or semi-automatically, but the designer still needs to understand how and why it happens, and monitor how often it occurs).
Sure, SPI is probably about two orders of magnitude more susceptible to noise than, say, RS422 or LVDS, but that doesn't mean that a properly designed system would have such noise sources. In fact, seeing SPI corruption inside your equipment is a signal that there is something really, really wrong with that design and it needs to be fixed very first. For communicating with the "outside world" or long cables (what is long? It depends, 60cm is not impossible), things are of course different; there, while using SPI is not a total non-option, it requires careful understanding of the consequences and mitigation strategies.
Many I2C devices I have worked with tend to totally lock down and kill the whole bus, necessitating bus resets, sometimes unpowering the devices with added PFETs on their Vcc which seems to be alarmingly common mitigation technique (also, modifications of I2C such as PMBUS exist to address the commonly known reliability problems). OTOH, I have never had such issues with SPI, since the most typical implementation selects one device at a time with a robust select signal, which tends to reset any communication state logic within that device, so that even after one faulty transmission, we are back again and can get fresh data out of a sensor - or send a new refresh to the screen. Of course, with both typical SPI and I2C devices, you never tend to have checksums or any other means for 100% protected communication (IC manufacturers simply don't seem to design in such features), so you are on your own if you need to think about data checking & resending. If you are having noise issues, quite frankly, you need to look at where these issues originate, and only resort to extra filtration when you are doing something quite non-standard (such as running long cables outside the box). These busses are simply meant to be designed in so that the designer guarantees that electrical data distrubations simply do not happen, or are so rare that they are consider acceptable failures (such as an unimportant consumer device freezing once a year, requiring a reboot; but usage in a life support system, for example, wouldn't be allowed for most SPI/I2C parts).
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