The ground loop you already realized yourself is definitely bad. Definitely add those GND vias, right next to the ceramic caps, 2-3 vias per cap if possible.
For manufacturability / reliability, you should add thermal reliefs to the ceramic cap GND pads; most ceramic cap appnotes absolutely require this, although with experience, and a preheated board, it's possible to handsolder them properly without applying too much heat/stress, but it's still a risk. (I have had an MLCC failure after 1000 hours of operation in exactly this case, no thermal reliefs, too much stress while manually soldering all the caps to the shared big plane!) I know, it makes inductance a bit worse, but with the vias close, it's still much better to what you have now.
Is this a 2-layer design? 4-layer would provide you a solid ground plane, your caps would all have solid low-inductance connection easily. I'd not do a design like this on 2 layers. I guess this doens't need to be optimized to the last cent? 4-layer is not that expensive nowadays.