Low noise amplifier.

[GK]

Will etch tomorrow...............

[Kleinstein]

There are quite a few 100 nF filtering caps to GND in quite a small form factor. I don't think using class 2 MLCC here is a good idea as they can be piezo electric and thus act as a microphone.

For some of them using just 10 nF and than NP0 version might be good enough other should be better film type.

[GK]

?? They are all 1206 and 100nF in 1206 is readily available in NPO/COG.

[GK]

Board done, parts won't arrive until late next week.

[GK]

Well it works, with a minor tweak. Somewhere along the way with the simulations I made a few oversights with the servo constants. Firstly, when modifying the servo topology from the first basic sim I erred with the loop gain scaling by 20dB making the unity loop gain frequency of the servo one decade higher that what it should have been. Secondly I did not re-investigate the servo loop gain and phase margins after adding the BJT cascodes to the JFET input stage to mitigate JFET Miller-effect capacitance. Cascoding the JFET input stage quite largely increases input stage transconductance, which pushes the unity loop gain frequency of the servo loop out proportionally. As it turns out, due to the sum of these oversights, the servo loop with the 1uF integrator capacitor wasn't close to stable.

For adequate phase margin in this topology the unity loop gain frequency of the servo really needs to be not higher than one third the input frequency pole formed by the 1uF input coupling capacitor and the 2M2 resistor; which is thus currently at 0.072Hz. Increasing the servo integrator capacitor from 1uF to 1000uF got the unity loop gain frequency down to ~0.02 Hz where it should be and the amplifier was then stable. I don't like a servo with a 1000uF capacitor. That large it has to be electrolytic which will no doubt be leaky and therefore contribute very low frequency drift all on its own accord. So the design will require a revision, but fudging in the 1000uF for now is a quick way the get the amplifier operational to evaluate its noise performance and other parameters.

Here it is (the tall skinny electrolytic in the middle is the 1000uF. It was the smallest 1000uF I had at hand):



I used my home brew noise measurement test set to measure the amplifiers noise:



Due to mains hum pickup and other interference of the bare amplifier PCB sitting on the bench top there are limits to which I can evaluate the noise performance prior to installing the amplifier into a shielded steel enclosure, so for now I used audio A-weighting filtering, primarily to get rid (mostly) of the 50Hz and HF crud coming from the local AM broadcast transmitter.

This scope shot shows the A-weighted noise at the output of the amplifier (the amplifier having its input shorted) amplified by 80dB (10,000 Av) (actually only by 60dB, but the DSO channel input coupling was set to 10:1 while the input connection was 1:1).



The noise measures 42 uV rms on my test set. The A-weighting filter has an equivalent noise bandwidth of 13.5 kHz. So the equivalent output noise, expressed in a 1Hz bandwidth =  42 uV / SQRT(13500) =  361 nV rtHz.

The amplifier has a fixed closed loop gain of 60dB (1000 Av), so the actual input-referred noise is 0.361 nV rtHz, which is getting quite close to the theoretical target. It can only be improved with a proper shielded enclosure. The noise on the scope has an obvious 100 Hz component (rectified mains) - most likely contributed by the crappy bench supply currently providing the +/-15V.

 

[Kleinstein]

Congratulations.  Less than 0.5 nV /Sqrtz(Hz) sounds really good.

For the servo loop, you might get a lower frequency, if the divider after the integrator is made larger. This would need a good DC stability and DC Level adjustment, as range for automatic adjustments gets smaller. Something like 10 µF and a little larger are available as film type caps.

If needed one could reduce the DC gain of the JFET + cascode stage, with just a resistor to GND.

[GK]

OK, some quick additional measurements for this morning and this will then be it for a couple of days. My noise test set has switchable first order bandpass filters with center frequencies ranging 10 Hz to 20 kHz in 1-2-5 steps. The Q of each filter is pi which (convenient for calculations) returns an equivalent noise bandwidth in each case of half the center frequency. These filter are for "spot frequency" noise measurements and characterizing 1/f noise. Fortunately you do not need bandpass filters with a 1 Hz bandpass to do this accurately! M and C in Low-Noise Electronic System Design show mathematically that in a system characterized entirely by 1/f noise the additional measurement error of a one-third-of-fc bandwidth bandpass filter over a 1 Hz one to be only 0.2%.

Here are my results:

Spot freq.            input-referred noise
 
500                     1.1 nV
1k                        0.45 nV
2k                        0.29 nV
5k                        0.26 nV
10k                      0.27 nV
20k                      0.25 nV

I didn't bother going below 500 because the results at 500 Hz (and 1 kHz for that matter) are already heavily contaminated and artificially raised by 50/100 Hz mains pickup.

In addition to improving the servo amp design I am thinking  about revising the lower bandwidth corner to be a decade higher (from ~0.1 Hz to 1 Hz) as at the moment after any overload you can go off and make a coffee while the servo loop stabilises. PSU and Vref noise is typically characterized in a 10 Hz and up bandwidth and and for audio stuff it's 20 Hz and up. 


 

[G0HZU]

Interesting stuff... could you use/adapt this setup to investigate the differences between thick and thin film resistors for current noise at low frequencies (eg below 500Hz)?

[Kleinstein]

For the low frequency range (e.g. < 10 kHz), the usual way to look the noise, is to send the output to an ADC of some kind and than do all the filtering in software. This way you get all the frequencies at the same time.

For voltage refs there is also interest in the really low frequency range (e.g. 0.1 ..10 Hz). But this might need a different system, more like using AC coupling and an AZ OP.

[GK]

In conjunction with the filter bypass position that is one of the things the amplified noise output jack on my test set is for. The manual filters in conjunction with the accompanying wide-band RMS voltmeter serve as a bench standard for reference/calibration. I don't necessarily trust 100% the accuracy of soundcard results without means to perform rudimentary double checks with a suitable bench standard.

For 0.1Hz to 10Hz voltage reference measurements dynamic (output) resistance is typically a fraction of an ohm so current input noise isn't such a consideration and you'd be better off just paralleling a bunch of <=1nV ein bipolar op-amps which can have much lower 1/f corners and superior LF noise performance than anything with a JFET input.

[GK]

Interesting stuff... could you use/adapt this setup to investigate the differences between thick and thin film resistors for current noise at low frequencies (eg below 500Hz)?

You mean excess noise when current flows through the resistor? Yes, I don't see why not. Once I get the shielding sorted and a few other issues one thing I am quite eager to evaluate is the BF862 gate leakage and the resultant input current noise performance of the amplifier. That will determine the source impedance range that the amplifier most ideal/suitable for.

[GK]

OK, I won't be free to play in the workshop with the soldering iron for at least another 24 hours (freaking Christmas stuff intruding!), but I've spent several hours of insomnia re-evaluating the servo scheme and have come to the conclusion that the scheme of the first prototype is crap.

What I was trying to do in the original scheme in servoing the DC potential of the drain of the JFET common source input amplifier independently of the amplifier control loop was to avoid having to directly couple the amplifier op-amp control loop. This permits the amplifier op-amp (via the non-inverting input) to be ground referenced, thus eliminating one potential source of noise injection, as the op-amp input need not be DC-biased.

However as it turns out after a fair bit of further investigation the pole (as essentially seen by the servo control loop) formed by the coupling capacitor to the amplifier op-amp virtual earth in conjunction with the drain impedance is effectively multiplied by the closed loop gain of the amplifier control loop. This effective pole, limiting the phase margin of the servo control loop, and can only be combated by making the servo loop bandwidth ridiculously low (hence the 1000uF integrator cap fudge on prototype #1).

Attached is a basic sim of of the revised overall topology that I am refining now. This is only a basic sim for the purpose of control loop stability analysis and the component values shown are for a 1 Hz lower cutoff and 100k input resistance, however with the new servo topology which is much better (doesn't need to be ridiculously slow) I'll be reverting to the much more desirable original goal of 0.1Hz and 1M.

The servo control loop now works on the output of the amplifier and everything is DC coupled. The non-inverting input of the amplifier op-amp is required to be biased at the DC potential desired at the BJT-cascoded JFET stage collector. The overall topology is technically sound and the servo can be made stable with sensible constants but some minor attention will have to paid to ensuring the bias potential for the amplifier op-amp is reasonably well filtered. The maximum op-amp input pin current must limited also due to the large 60mA bias current of the input stage, but neither of these requirements look like too much hassle. The voltage gain of the BJT-cascoded JFET input stage is so huge the noise of the amplifier op-amp is almost wholly swamped out. Even very large values of current limiting resistors in series with the op-amp inputs fail to have an effect on the noise performance. 
 

[GK]

OK, I won't be free to play in the workshop with the soldering iron for at least another 24 hours (freaking Christmas stuff intruding!)

Well I lied, LOL. I don't have to go out for another 20 minutes still and I managed to fudge these mods onto the prototype and it works absolutely perfectly:



Here is a simplified schematic showing the modifications:



Here is the amplifiers medium-level 10kHz square-wave response. Note that that huge amount of apparent noise on this signal is the 891kHz carrier of the AM radio broadcast transmitter several kilometers away. The bare prototype is still unshielded on the bench and I of course cannot filter this RF interference out and show the true squarewave response simultaneously. 



Now here is where it gets really interesting. I connected a 100k metal film resistor across the input terminals. This scope screen shot below shows the resultant (amplified) output noise through the audio A-weighting filter of my noise test set. It measured 4.7 mV rms. The A-weighting filter has a 13500 Hz equivalent noise bandwidth, so the output noise, in rtHz, = 0.0047/SQRT(13500) = 40.45 uV rms. Divided by the 60dB closed loop gain of the amplifier that works out to 40.45 nV rtHz - for all sakes and purposes exactly the theoretical thermal noise of 100k at room temperature.

[_Wim_]

Very impressive!

[GK]

Thanks. OK, it's getting on to 1am here, but who needs sleep when it's holidays. Attached is the revised schematic and I am almost done modifying the PCB layout.

[PartialDischarge]

What schematic editor are you using?

[GK]

Protel 99SE, schematic printed to a PDF, opened and screen captured to make the PNG image file via MS paint.

 

[blackdog]

Hi,

Another nice diagram drawing program is "sPlan".
You can not convert it to a file for making printed circuit boards.

This is the company were you can buy the software.
http://www.abacom-online.de/uk/html/splan.html

And below two diagrams drawn with this program.
The low noise amplifier is a almost ready design, i still need to test the protection of the input and the output.
It is not as "Low Noise as GK" desing, bus it is usable to measure normal powersupply's and almost all voltage references except the best.

If there is to much 50Hz in the measuring signal, then I can put a second measuring amplifier behind this one.
This amplifier has a additional 20dB gain if it is necessary and also a 50Hz notch filter (~55 to 60dB Notch).

The relativ low noise, wide band amplifier, designed for high gain and flat response.


Some 50 Ohm attenuators



GK,
Nice design, maybe the design need a little bigger value of C13 to make de square wave without overshoot ?


Kind regarts,
Blackdog

[sdouble]

did you pre-select some matched BF862 ?

Thanks. OK, it's getting on to 1am here, but who needs sleep when it's holidays. Attached is the revised schematic and I am almost done modifying the PCB layout.

[T3sl4co1l]

FYI, not really worth matching here -- gm is proportional to Id, and with an 8-20mA spread, any single transistor is never less than half the average (half of 14mA is 7mA).  So the incremental value per transistor isn't bad at all.

Tim

[GK]

GK,
Nice design, maybe the design need a little bigger value of C13 to make de square wave without overshoot ?

Yeah, increasing the value of C13 does reduce the overshoot, but at the cost of closed loop bandwidth. The current level of over shoot actually corresponds well with simulation and is indicative of better than 45 degrees of phase margin, which is still adequate for overall stability. The unity loop gain frequency is currently around 1.5MHz. 33pF yields a ~1MHz ULGF and very little overshoot. Hmm, I might revise the compensation for slightly prettier squarewaves for a small bandwidth penalty.... I'll see.
Incidentally, R36, the 10M resistor shown in parallel with C13, doesn't do anything useful now that the amplifier circuit is directly coupled, so I've now deleted it.
 

[GK]

did you pre-select some matched BF862 ?

Nope.

[Circlotron]

The BF862 looks like a small junction FET and you are using a lot in parallel. I am wondering if there are any single large junction FETs you could look at instead.

What about a power mosfet with it's thousands of paralleled cells? Would one of those have a good noise figure?

[NiHaoMike]

What about a power mosfet with it's thousands of paralleled cells? Would one of those have a good noise figure?

The input capacitance would be very high. Although that would offer a nice way to mount it on a Peltier for even lower noise.

[Kleinstein]

The BF862 is not that small for a JFET. There a few larger ones (larger trans-conductance and low noise), but these are usually really expensive (e.g. > $20). The BF862 is about the best one can get in low noise compared to input capacitance and it is still relatively cheap. However doing some matching / selection might be a good idea.

Power MOSFETs might be low noise, but they have likely quite some 1/f noise and a high input capacitance. So the noise figure might be good only for a very small frequency range.