Low noise amplifier.

[3roomlab]

Slick.

Have you been following any of Phil Hobbs's work?  This looks like something he would be quite fond of...

For anyone wondering what the heck a 150n inductor is for (aside from the explanation given above), it's approximately the inductance of a "100 ohm" ferrite bead.  The 100 ohm resistance, of course, is its resistance.

Cheap insurance to avoid unintentional grounded-gate oscillators.

Also useful for driving power MOSFETs, because the ferrite bead saturates, potentially sharpening the drive waveform, while providing considerable dampening in steady state.

Tim

is there a special reason to get 100ohm impedance on the ferrite? or there is an approximate way/equation to determine a usable range?

[T3sl4co1l]

Yes -- ferrite beads are measured at 100MHz, and 0.15uH is 100 ohms at 100MHz.  So, presumably, the desired damping is about equivalent.

This is an overestimate, because the losses are high over a wider range than a simple L || R network.  The result will be more noise at those extra frequencies (i.e., 10MHz+ vs. 100MHz+).  But this might not be a problem, since we're not talking extreme bandwidth, or very low noise impedance here.

This doesn't work in reverse, because of the overestimation; replacing a FB with an L || R may need a lower break frequency.  Depends where the Z(F) is needed.

FBs always(?) come with a Z or R & X plot, just match up how much you need at what frequencies.

Tim

[awallin]

This paper claims 0.5nV/rt(Hz) with either IF9030 or 2SK369 at the input
http://users.cosylab.com/~msekoranja/tmp/04447683.pdf

do you have a noise spectrum for the parallelled BF862 design?

[3roomlab]

The circuit is not very practical unless you select a matched set of FETs. A seperate source resistor for each FET would help balance the current.

The BF862 looks like a small junction FET and you are using a lot in parallel. I am wondering if there are any single large junction FETs you could look at instead. Something like a Process 58 FET such as  2N5432/3/4. It has a 6nV noise voltage but that is at 100Hz and not the 100KHz noise spec of the BF862. It is not hard to get a low noise figure at 100KHz.

Fortunately there is a fair amount of prior art here already. There isn't much that can match the BF862 in the combined terms of input C and price and the 1/f noise corner of 1kHz or less (better) has been very well established.

One (now defunct) forum I was on a member paralleled 64 of these FETs. There is little to be gained from matching devices.

was there any indication of the performance of that 64 JFET version?

[cat87]

Very interesting design. I too am looking forward to  details regarding the LNA's performance and also some details regarding the  noise measurement  equipment you previously showed. That, together with this LNA can be really handy for quite a lot of experiments.

Is the noise measurement test set, by any chance,  based on R. Cordell's plans?

[GK]

Is the noise measurement test set, by any chance,  based on R. Cordell's plans?

I'm not sure what plans those could be. It's just true-RMS wide-band ac voltmeter based on an LTC1968, calibrated against a REF192. There is a low-noise (1.3nV measured) bipolar-input front-end amplifier extending the meters sensitivity to 1uV full scale and a bunch of switchable bandwidth and frequency-defining filters between the two. There is also a switched-frequency, amplitude-calibrated sinewave generator intended to be used in conjunction with an external attenuator box for making accurate gain measurements of any suitable device under test. The only part borrowed from what Cordell has published is the passive network of the A-weighting filter. I've attached the schematics.

[cat87]

Thanks for posting the schematics.

I was initilly thinking it might have some elements from  Cordell's THD analyzer    It looks like I was way off.

[EmmanuelFaure]

AD8597 is a poor choice for such an AC coupled LNA. Too much current noise, too much bias current. A JFET input amplifier would have been a better choice. Like OPA140, OPA827, LT1792, or a discrete input amplifier based on the common low noise JFET.

[GK]

AD8597 is a poor choice for such an AC coupled LNA. Too much current noise, too much bias current. A JFET input amplifier would have been a better choice. Like OPA140, OPA827, LT1792, or a discrete input amplifier based on the common low noise JFET.

It's specifically intended for low impedance sources (like the signal output of an audio preamplfier or a power amplifier) and any JFET substitute here would be significantly noisier (about five times noisier for the OPA140 and about four times noisier for the OPA827 and LT1792). And for a bipolar op-amp in the ~1nV en class, the AD8597 actually has comparatively low input bias current and current input noise.

[eeFearless]

I'm confused.  I thought the parallel discrete approach is the LNA?  Or, will the parallel discrete approach be replacing the LNA board containing the AD8597?

[GK]

I'm confused.  I thought the parallel discrete approach is the LNA?  Or, will the parallel discrete approach be replacing the LNA board containing the AD8597?

He is talking about the "LNA" of my test set which is a separate project.

[EmmanuelFaure]

It's specifically intended for low impedance sources (like the signal output of an audio preamplfier or a power amplifier) and any JFET substitute here would be significantly noisier (about five times noisier for the OPA140 and about four times noisier for the OPA827 and LT1792). And for a bipolar op-amp in the ~1nV en class, the AD8597 actually has comparatively low input bias current and current input noise.

Not "noisier" but "the voltage noise from the datasheet is lower", nuance. There's also a current noise, and there's also noise from the input filter.

If its purpose is audio noise analysis, i.e. > 20Hz, so ok. But at low frequencies the performance of this schematic is not great. Calculations and equivalent noise diagram attached, I got 100nV/sqHz @ 1Hz and, it's true, about 1nV/sqHz at the asymptote.

Another nasty mechanism : With such a bipolar op amp the input bias current is about 100nA. Cf the datasheet on page 8 "Input Bias Current vs. VCM", it can be calculated the bias current TC is about 1nA/°C. When the input of your amp is short circuited, or when you connect a low impedance source, the non-inverting input of the op amp sees the impedance of your RC filter, about 5kOhms at 1Hz (28µF // 100k). Let's say there's a die temperature fluctuation at 1Hz with an 0.01°C amplitude, and there you have a new "noise" source contributing for 50nV/sqHz.

For very low noise AC-coupled application, bipolar amps are not the way to go. The design by Levinzon posted by awallin, JFET based, does better than this.

[GK]

It's specifically intended for low impedance sources (like the signal output of an audio preamplfier or a power amplifier) and any JFET substitute here would be significantly noisier (about five times noisier for the OPA140 and about four times noisier for the OPA827 and LT1792). And for a bipolar op-amp in the ~1nV en class, the AD8597 actually has comparatively low input bias current and current input noise.

Not "noisier" but "the voltage noise from the datasheet is lower", nuance. There's also a current noise, and there's also noise from the input filter.

If its purpose is audio noise analysis, i.e. > 20Hz, so ok. But at low frequencies the performance of this schematic is not great. Calculations and equivalent noise diagram attached, I got 100nV/sqHz @ 1Hz and, it's true, about 1nV/sqHz at the asymptote.

Another nasty mechanism : With such a bipolar op amp the input bias current is about 100nA. Cf the datasheet on page 8 "Input Bias Current vs. VCM", it can be calculated the bias current TC is about 1nA/°C. When the input of your amp is short circuited, or when you connect a low impedance source, the non-inverting input of the op amp sees the impedance of your RC filter, with is about 5kOhms at 1Hz (28µF // 100k). Let's say there's a die temperature fluctuation at 1Hz with an 0.01°C amplitude, and there you have a new "noise" source contributing for 50nV/sqHz.

For very low noise AC-coupled application, bipolar amps are not the way to go. The design by Levinzon posted by awallin, JFET based, does better than this.

 

Yes, noisier. Do you even understand the given application? The amplifier is specifically a front-end for an RMS ac voltmeter which isn't designed to respond to signals as low as 1 Hz and in the operational bandwidth with the intended low-impedance sources voltage input noise (which is much higher for JFET substitutes) dominates.

A snapshot from the project write-up I previously had on the web:



I deliberately set the high-pass input pole frequency low enough so that LF noise is adequately low in the operational bandwidth whilst setting time is not annoyingly long. That predicted/computed/measured/verified 1.3nV rt-hz performance would not be matched by a significant margin by any substitute JFET op-amp.

[EmmanuelFaure]

 

[vindoline]

It's just true-RMS wide-band ac voltmeter based on an LTC1968, calibrated against a REF192. There is a low-noise (1.3nV measured) bipolar-input front-end amplifier extending the meters sensitivity to 1uV full scale and a bunch of switchable bandwidth and frequency-defining filters between the two. There is also a switched-frequency, amplitude-calibrated sinewave generator intended to be used in conjunction with an external attenuator box for making accurate gain measurements of any suitable device under test. The only part borrowed from what Cordell has published is the passive network of the A-weighting filter. I've attached the schematics.

Glen, thank you for posting your beautifully prepared design documents. As an amateur, your clearly laid out drawings make it much easier to follow and learn. I look forward to seeing more on your test setup.

[eeFearless]

Glen, thank you for posting your beautifully prepared design documents. As an amateur, your clearly laid out drawings make it much easier to follow and learn. I look forward to seeing more on your test setup.

Yes ... very instructive ... thank you ...

[3roomlab]

i am curious about this parrallel noise thingy, so i went for a walk in google.

this article caught my attention, but it has too much math for my brains.
http://leachlegacy.ece.gatech.edu/papers/Parallel.pdf

under point 1.4 in the PDF it describes a "sweet" spot number of parrallel beyond which more BJT/JFET = more noise and not less. i am just wondering, for those who are good with maths, what would likely the approx max number for BF862 be?

[eeFearless]

this article caught my attention, but it has too much math for my brains.
http://leachlegacy.ece.gatech.edu/papers/Parallel.pdf

under point 1.4 in the PDF it describes a "sweet" spot number of parrallel beyond which more BJT/JFET = more noise and not less. i am just wondering, for those who are good with maths, what would likely the approx max number for BF862 be?

That paper is discussing finding the optimum N, where the total collector current is constrained to be constant. So, I don't believe it is relevant in this design, where the designer is accepting the incremental increase in current for each amp in parallel.

The answer to your question of solving for N will depend on what values you constrain the aggregate bias currents.

[nfmax]

MOSFETs are noisier than JFETs, especially at LF.

I forget what the lowest noise CMOS op-amp is, but most are upwards of 20nV/rtHz, while the better bipolar amps are in the single digits.

Though, MOSFETs have a good history of RF amplifier use.  Many of the "high tech" types do, too: PHEMTs, GaAs FETs and HBTs.  I forget which, but some of them have a 1/f knee in the MHz; all of them are distinguished by very high Gm, very low capacitance, and very low noise (in their intended frequency range), with fT into the 10s of GHz.  A daring few have dared harness them for "DC" use (Phil Hobbs is particularly fond of using bootstrapped combinations for wideband laser diode and high impedance probe amps).

Tim

We have used Eudyna FHX35LG HEMT's in broadband applications with frequencies down to a few kHz, though we are less concerned with noise down there. They seem to work well.

[3roomlab]

I'm not running the FETs self-biased at Idss (~14mA), they are running at ~5mA each (only a 1.29:1 noise penalty [ratio^0.25]). At ~3V Vds that's only 15mW dissipation per JFET. Hardly a heating issue.

could anyone enlighten me about what is noise penalty? (vs Idss current?)
i had a go at LTspice, but i dont have the BF862 model :/
it appears to work in simulation 1nV -> 5uV (0.01Hz). but i dont think it will be low noise

[GK]

JFET voltage input noise goes approximately by the fourth root of Id (<Id = >noise). If the FET has, say 5nV noise at 10mA Id, then at 1mA Id it will have 5nV*((10mA/1mA)^0.25) = 8.9nV.
AFAIK this is an approximation/general rule assuming that the FET is an ideal square law device. I don't know how well it typically continues to hold for values of Id decades below Idss.

 

 

[3roomlab]

i spent some time understanding more about JFET simulation, and i ended up with this model. what are the odds that 4 stages of this coupled 1 after another will actually produce x100,000 gain?

[T3sl4co1l]

I would be deeply concerned about s12 turning such a chain into an oscillator.

Tim

[GK]

Well, in my mission to tidy up / complete all of my unfinished projects, I have finally gotten around to knocking up a shielded steel enclosure for the final iteration of this little amplifier. Did it totally eliminate the pickup of 50Hz mains hum and radiated 100Hz rectified mains from my beefy bench supply and other equipment? Nope! But with a lengthy power lead and some careful orientation of the amplifier (on a chair in the middle of the lab) I managed to practically get the 50/100 Hz pickup below the broadband noise floor, but I'm sure if the amplifiers output was examined on a spectrum analyser the 50/100Hz would still stand out like dogs balls.

I now measure (audio A-weighting filter bandwidth) an input-referred voltage noise for the amplifier of 270pV SQRT/Hz.

To recap, the finished amplifiers bandwidth is 0.1Hz to ~1MHz and the gain is fixed at 60dB (x1000 Av).

I should have a web page for this project written up in a week or so, including the PCB Gerber files and further performance measurements. 

[necessaryevil]

Very interesting. I'm wondering about the measurements and the pcb design. Are you going to try to run it on batteries?