Use an FPGA, certainly get the I/O required. Design would be pretty
simple to get all the coupler status into a set of bytes or words.
Throw in a low end arm core to control, format, and output status.
Another way possibly is to do a 12 x 12 matrix using a UC and scan
them like a keyboard matrix. Lots of tech details to consider, not even
sure if it would work because of Vcesat issues, you would have to look
into this carefully, do a DC worst case analysis.
Regards, Dana.