nice design. I like the battery operation.
I'm using component values over and above those specified in the datasheet, to minimise noise. One good thing about the AD8130 is that the CMRR is given as 70dB at 10MHz, which is excellent.
Although that CMRR is good, since mechatrommer specifically asked about the switcher, I'll talk about that here. What you really care about is the op-amp PSRR when dealing with switching noise on the power rails, and that op-amp has about 55dB PSRR at your switching frequency, which for the MCP1624 is 500Khz. The voltage doubler operates at 24Khz.
With your MCP1624 circuit, and a 10uF output cap, assuming that your circuit draws 30mA total (just my guess), the worst case switching ripple will be at the high end of the the switcher duty cycle, say at 80%, it's going to be on for 900ns, thus, 30ma = Cout * dV/dt, dV is the ripple, dt is the FET on time.
Heck, lets go worst case and assume 100mA draw from the switcher(!) and 80% duty cycle.. then 100ma = 10uF * dV/900ns , dV =
9mV power supply ripple.9mV power supply ripple at 500 KHz, and the op-amps PSRR at 500 KHz is 55dB, then that 9mV power supply ripply will result in an output voltage of 10^(log(9mv) - (55/20)) =
16 uV ripple at the op-amp output (due to the power supply ripple).
That's a worst case guess I just did, and it depends if 16uV of error is acceptable to the designer
Chances are the circuit is not drawing more than 50ma, and maybe even just a few 10s of mA, so that power supply ripple will be even less and that error at the output will be even less still.
The PSRR at 24 KHz is about 85 dB, but I didn't do the math for its ripple and noise contributions. But 85dB is much better, and the noise contribution will be much lower.
If it was me, after building the first cut of this circuit, I'd certainly want to measure its current draw, know that value, and figure out what its ripple should be, then measure that to know its true value, and decide if the output error due to power supply ripple after rejection is OK for me and my design goals.
Cheers!