My version of Testbench power supply

[bogdant]

Here is my version of the variable power supply.
The intention is to build a 2 channel power supply: one channel is fully analogical and one is digital.
The input will be 2 transformers 12V*2 middle tapped, 2.5A secondary. The analogical channel is a series regulator implemented with a n-mosfet with current constant.
On the second channel I try to implement a synchronous buck stage controlled by microcontroller STM32F723.
Are there any big error in design(blunders)? The project is for learning electronics, so cost is not take into consideration here.

[mvs]

On the second channel I try to implement a synchronous buck stage controlled by microcontroller STM32F723.

Do you plan to have DCM operation at low currents? It might get tricky with sync rectification there.
I would put a Schottky diode parallel to lower MOSFET, just in case.

Are there any big error in design(blunders)?

Outputs can be on, while MCU is in reset condition. It is no go for a lab PSU.
Add some resistors to define state of EN_BUCK, VDAC, IDAC nets, while MCU is not able to control them.

DAC is not able to output true 0V, LM324 do have some offset, so your lowest voltage may be a bit higher then 0V. Add separate output on/off control to analog channel.

[001]

Avoid microcontroller in regulation loop
it is not fast as analog feedback and can`t provide uninterrupted regulation  by design
Use MC for service functions only

[mvs]

Avoid microcontroller in regulation loop
it is not fast as analog feedback and can`t provide uninterrupted regulation  by design

Yes, but bogdant may learn a lot by building a PSU with digital control loop.
Large inductor value of 560uH means also quite low frequency, so there might be no need for fast loop at all.

[David Hess]

1. Multiple stages in the current control loop makes frequency compensation difficult.  U13C and U13D should be combined into one stage.

2. T1 provides uncontrolled non-linear voltage gain within the voltage and current control loops making frequency compensation impossible.  The outputs of the control loops could drive the pass transistor directly with unity gain.

3. The high capacitance of pass transistor U16 should be driven from a lower impedance.

Fixing the above would allow better dynamic performance and a lower output capacitance for C9.

4. VPOT should be filtered and a safety resistor added between the wiper and ground.

5. IPOT should be filtered and a safety resistor added between the wiper and ground.

6. R44 is the wrong value for input bias current cancellation.

[bogdant]

My plan is to create a regulator in MCU. So far I have not done any tests.  I will start with 50khz cycle time. The challenge will be to write software that does not block the regulation durring other tasks.

[bogdant]

It was zipped with 7z program

[bogdant]

1. Multiple stages in the current control loop makes frequency compensation difficult.  U13C and U13D should be combined into one stage.

2. T1 provides uncontrolled non-linear voltage gain within the voltage and current control loops making frequency compensation impossible.  The outputs of the control loops could drive the pass transistor directly with unity gain.

3. The high capacitance of pass transistor U16 should be driven from a lower impedance.

Fixing the above would allow better dynamic performance and a lower output capacitance for C9.

4. VPOT should be filtered and a safety resistor added between the wiper and ground.

5. IPOT should be filtered and a safety resistor added between the wiper and ground.

6. R44 is the wrong value for input bias current cancellation.

1. U13D is a diferential amplifier and U13C is comparator, at least this was the intention. Can you give an example to combine this stage to one?
2,3. I did tried to make liniar but seems to fail, what do you propose to in liniar region U16 ?

[bogdant]

I found more issues:
- C26 and pin 1 of MAX6070 should be linked to 5V, missing connection
- Vin for U2 (KF33BD) should be linked to 5V, V+(31V) will be to much, chip is specified for 20V

[David Hess]

1. U13D is a diferential amplifier and U13C is comparator, at least this was the intention. Can you give an example to combine this stage to one?

The first example below shows the current sense resistor is on the input side but it could be on the emitter side.  The second example which is closer to your design shows the current sense resistor on the output side.

For a programmable output like you want, the control voltage referenced to ground is used to sink a current out of the non-sense resistor (the parallel value of R65 and R66 in the second example) which is moved to the input side of the current sense resistor so reversed compared to the second example.  This adds another operational amplifier for the voltage to current conversion but it is outside the control loop.  The voltage across the second resistor follows the output and operational amplifier compares this voltage to the voltage across the current sense resistor.  It is like the common high side current sense amplifier but in reverse since it controls the voltage across the current sense resistor instead of reporting it.

This does not quite completely solve the current control loop problem because when the output is at very low voltages, the voltage controlled current sink which creates the high side voltage to compare to the voltage across the current sense resistor will run out of voltage compliance if it only sinks current to ground.  But if it is acceptable that the maximum current is not available below 2 volts or so then nothing more needs to be done.

2,3. I did tried to make linear but seems to fail, what do you propose to in linear region U16?

The problem is that T1 is very non-linear as the signal levels change.  The large capacitance of U16 makes things even more difficult.

What I would probably do is reverse the logic of the or-ing diode D1 and replace T1, R21, R39, and R40 with something like a diamond buffer which is just a simple class-ab emitter follower.

[Doctorandus_P]

It seems you're well underway to making a very capable power supply.

Total cost of all the components is probably also substancial.
Why then put an LM324 in the thing?
It is the most jelly bean opamp you can find with jelly bean specifications.

Also:
You have long traces cutting the GND plane of your PCB into pieces.
This is not desirable.
In an ideal world every trace with high frequency transients has an unbroken ground plane directly under it.

[bogdant]

It seems you're well underway to making a very capable power supply.

Total cost of all the components is probably also substancial.
Why then put an LM324 in the thing?
It is the most jelly bean opamp you can find with jelly bean specifications.

Also:
You have long traces cutting the GND plane of your PCB into pieces.
This is not desirable.
In an ideal world every trace with high frequency transients has an unbroken ground plane directly under it.

Thanks for taking the time to look on my design. Can you recommend a better opamp? I search for a while but did not find a good reason to replaced it.
Do you think I should make a 4 layer board with 2 planes one GND and one Vin ?

[bogdant]

More issue has been found since last post:
- T1 has been replaced with bc857 pnp tranzistor with emitor connected to rezistor R39 and R40
- value for R15 is to small, 1k heat up for 27V
- diferential operation should be connected with + line to most pozitive rail( reverse sign in operation schematic)
- replace R13 =100k to 5k to reduce amplification to 5
- max6070 voltage reference has been removed and vref and connected to 5V
- ground for the second channel is commun to the first channel , it will not be posible to put the channel in series
- outputs does not have the overvoltage protection
- outputs does not have on/off switch
Now the analogical part it somehow working. the voltage can be set between 0.5->27V. current limiting is working from 0->0.75A. Only tested with 35ohm load.