New switcher - causing issues!

[Wilksey]

Tim!
Yeah, but bad routing is me speciality
I think the next rev of the board will be taking everything and applying it to the next one, I might stick with the same chip, for the price of an experimental PCB (or 10) from China, I can still use the boards I have for prototyping / development by sticking in a linear adjustable reg.

[rx8pilot]

FWIW, I have had bad results with TI and LT as well, due to layout problems. I was seconds away from throwing them away thinking TI doesn't know what they are doing. After a cool down period, I decided to seek out the root cause of my problems.

It is unlikely that this chip is an unworkable design. Moving to another chip will not fix your layout issues.

[Wilksey]

Hi rx8pilot,

No, I know that a different chip won't fix my layout issues, I am surprised the chip failed though through the layout, instability, yes, death, I can't get my simple mind around why it would kill the chip.

I will take everything that people have suggested and try a different layout, I think my previous board (I would have to look at them as I did them at work in Altium) with the LM2576 did use a GND plane with vias from the chip.  Not sure why I did it differently (continuous top route) on this one, seemed like a good idea at the time, and taking the feedback from the inductor rather than the 2nd output cap is probably not helping it either, isolating the feedback and analogue ground seems sensible, not sure it would cause the chip to blow, but cause instability issues, which I guess in turn, could cause the chip to blow?

[rx8pilot]

I am mobile right now, but I think I can find some waveforms I captured from previous learning efforts of mine.

Huge voltage spikes can appear on internal mosfet killing it. If you had a low indunctance probe to look at the SW node, you may find some surprisingly large voltage peaks.

Do you have a scope?

Sent from my SAMSUNG-SM-G890A using Tapatalk

[Wilksey]

Yes, I have a scope I can put it on and see what if anything comes out!

What would cause the high spikes / peaks? The ground layout, feedback point (VOUT from inductor) or something else?

Thanks

[DanielS]

I am surprised the chip failed though through the layout, instability, yes, death, I can't get my simple mind around why it would kill the chip.

If the chip operation becomes unstable due to excessive power, ground and feedback parasitics, the chip may have irregular switching not only from noisy feedback signal but also from internal voltages jumping all over the place: the chip may start turning on its switch, this causes the supply to droop and ground to bounce, VCC-GND drops below the UVLO and the driver turns off prematurely, supply across the chip's terminal bounces back, the chip turns back on, rinse and repeat. The output driver ends up spending more time in the on-off-on transient state than on/off, overheats and fails.

[hli]

I recalculated the components for 4V rather than the values supplied in the DS.  The output voltage went from 3.9 to around 3.7 down to 3.2 down to 3.0 down to 2.8 then to 0, all in the space of a minute or so, it didn't give me chance to hook a scope up before it died, nothing measures short cct, just 0V on the output pin, the FB pin stayed around 0.79 (0.8 it should be), the 12V PSU was drawing around 30mA, do you think it could be not enough load? I must admit I didn't think of that, I could add a load to see if it works better?

So you say that the output went down to 0V while the feedback voltage stayed at 0.79V? That would be strange - where did this voltage come from? When you power it now, is it still that way? Can you hook up a scope to the feedback voltage pin and see whether it follows the output voltage?

[wraper]

I have used different switchers in the past and put a few on perf board, they may not have been ideal, or worked 100% efficient, but they have worked, I have never had any other chip perform like this one.

Excuse me, but this is 500kHz, you cannot do with PCB just what you want. And your pcb have just awful layout which is inappropriate even for 10x slower switchers.
Edit: Also you cannot use 22uF electrolytic capacitors, they have too much ESR.

[Niklas]

The datasheet specifies 20V as an absolute maximum rating for SW pins. It could be the electrolytics and/or the long GND trace that adds an L*di/dt transient high enough to cause a breakdown of the switch transistors in the IC. Jim Williams did an interesting video and app note about the importance of diode turn on time and possible failure of the switcher IC. http://cds.linear.com/docs/en/application-note/an122f.pdf

[rx8pilot]

Shows how to 'see' what is going on.
https://e2e.ti.com/support/power_management/simple_switcher/w/simple_switcher_wiki/2243.understanding-measuring-and-reducing-output-voltage-ripple



Configure your scope probe like this (you can make it yourself if needed). Measure from PGND pin to SW pin and see what you have. I would guess that you will see the problem as a very large and very fast voltage spike resulting from the stray inductance on your PCB reacting to your switching currents. If you also look at your FB pin, you will probably see a ton of noise as well which directly impacts the control of the internal MOSFET. The circuit is sufficiently out of control that the mosfet is is being damaged from over current or over voltage or both. This can happen so fast that the chip never has time to heat up on the outside but is burned on the inside.

The difference between good and evil is very small.

[Wilksey]

0.79 on the feedback whilst the switcher was going from 3.9 to 3.7, 3.2, 2.8V, when the output of the switcher was 0V the feedback was 0V as the R divider takes it's reference from VOUT, which was 0V.

I suspect as others have highlighted, the internal circuitry has been oscillating and damaging the output FET.

I tried electrolytics to begin with, but I tried MLCC's (before the chip died) as I thought it was the cause of the chip going from 3.9 to 3.2V initially, perhaps too much ESR.  But it didn't make a difference.

I have yet to see if the chip works and if the shutdown was an internal thing to protect itself, if it has blown I am reluctant to put another on, I would rather re-design the board, or a PSU board to retro fit onto the existing one.

Interesting links rx8pilot and Niklas, and some valuable feedback from yourselves and others, much appreciated!  I do not confess to be a PCB design aficionado, most of my designs, work, most of my layouts, work, but they are not pretty by any means!

I shall cut the plane around FB and AGND and put the rest of the GND's on the plane below with VIAs, including the TR pad on the switcher,  and putting the feedback input onto the inductor rather than the output caps was just stupid of me!  I'll probably move the FB circuitry over towards the output caps also.

[nctnico]

Still I'm not a fan of Rohm. The chips I've seen from them where rather unlogical which hints to ultra low cost designs made by people with very little experience.

[Wilksey]

I looked at a previous one I did earlier, which worked out of the box, using a TPS62110, I must admit, I did not put the feedback near the inductor, and I did connect everything to the plane on the 2nd layer, but the plane was continuous around the feedback circuit, and I connected analogue and digital ground together without issue.

[Wilksey]

I have decided to stick with the chip and make a separate power board as I can still use my old one for prototyping with a bench supply, but I think it is worth designing a SMPS the right way as everything in the future will be SM, and I would like to use the cheaper chips, even if the more expensive ones are more forgiving to bad layout!

The capacitors I would use on the output are:
http://uk.farnell.com/kemet/c1206c226m8ractu/cap-mlcc-x7r-22uf-10v-1206/dp/2118135
1206 X7R 22uF 10V (don't need 35V as I am only outputting 4V, which gives plenty of overhead).

As nobody commented on the actual schematic I assume it was OK?

Well, if someone wouldn't mind just doing a quick sanity check on this before I start the new layout I would be appreciative.  The VIN will be protected by the other board as there is a bridge rectifier on the input of the power, so VIN on this board is AFTER the bridge.

I shall post the entire schematic for this as it is only a PSU, I have also added a few extra comments to the schematic (the tilde ~ means approximately / nominal it might look like a '-' at first glance )

TIA!

[Wilksey]

Anyone?

[georges80]

It's the layout that we'll want to see. We 'assume' your schematic is correct and based on the reference design...

cheers,
george.

[metacollin]

Ok, there is a lot of solid advice in this thread, but also a lot of speculation and vagueness. No one has actually given a specific cause of the problem, or how to fix it.  But all the layout advice is good, regardless.

Well, everyone is taking about frequency like its a big deal.  It's not, in this case.  This isn't a sine wave.  The slew rates of MOSFET switches is not even a little related to how often you switch them. 

Anyway, I'm going to go all in and give a specific answer: it's your input capacitors. The high dV/dt loop will have ringing voltages superimposed on your switching wave form, and you have easily 10nH of loop inductance there, more than enough to cause >8V of ringing.  12V+ >8V = blown output MOSFETs.  And that is indeed what you're seeing, the switcher works at first but as spikes on switching node hammer and quickly blow the FETs, they get more and more leaky, the output voltage falls, and eventually they can't even turn on anymore.  The 30mA draw is almost certainly the gate drivers trying to turn on the blown FETs, but there is just one big hole in the oxide layer separating the gate, so it's just shorting through to ground.  Whoops.

When the data sheet says the input capacitors should be as close as physically possible to the input of the chip (which, by the way, the data sheet does) what it really means is this: the input capacitors should be as close as physically possible to the input of the chip. 

The frequency is not the issue at all here, as mentioned earlier.  The MOSFET turn on time is the same regardless of if you're turning it on 50,000 times per second or 500,000 times a second.  The switch node formed by the MOSFET drains has no series inductor there.  The drains are shorted together to form the SW pin.  Frequency is irrelevant.  The dV/dt is independent of frequency.

The primary switching loop that sees all the actual switching and (being MOSFETS, very different beasts from, say, a BJT based switcher like the lm25xx parts) extremely high dV/dt slews is a loop from the input capacitors, to the sources of the top side and low side switches, with the drains connected to the inductor.  The inductor itself is not actually part of this loop.  The two switches wiggle it's one terminal between them, pulling and returning currents from the input capacitors.  The input caps are the most critical part of the buck convrter.  Output capacitors only effect output ripple, and it's not terrible if they are relatively far away.  Parasitic inductance in series with 4.7uH inducantance is just a little more inductance to store energy in, it is not really an issue.  The position and loop size of the input to output is mostly DC save for the output ripple, and it should not be a focal point.

Though aluminum electrolytics are not capacitors at 500khz, too much ESL due to their physical construction. They're expensive resistors.  They will just have ripple current proportional to their ESR flowing in and out of them, so serve no purpose beyond generating heat.  They have far too much ESL to do anything at all to a 500khz ripple.  So I assume they must be to heat the board, though it seems resistors would be a cheaper and more reliable means of doing this.


 Also, be sure to have enough ceramic output capacitance to keep the ripple voltage low enough that the ripple current on electrolytic output caps (which is simply the ripple voltage/their ESR, since remember, they are resistors at this frequency) does not exceed their maximum.  Generally 75mV is the rule of thumb for this.

[Wilksey]

Wow, metacolin, that was a superb and very specific answer, which makes absolute sense, I never would have though to look at the input cap locations, I mean, they seem close, but I guess from what you are saying they need to be almost touching pad?
I am going to redo the layout, would appreciate, when I post it up if you experts could cast your eye over it, as even if my other circuits have worked in the past, these MOSFET ones need a bit more care taken at the layout stage, live and learn!
I don't mind spending a few ££'s to get a few boards made (cheap as chips from China) to learn the correct way to layout a switching supply.  Linears are so much easier!

Thanks (all) once again!  I shall post a layout soon!

[Monkeh]

Well, everyone is taking about frequency like its a big deal.  It's not, in this case.  This isn't a sine wave.  The slew rates of MOSFET switches is not even a little related to how often you switch them.

But the requirement to switch them very fast is driven by the rising switching frequency..

Wow, metacolin, that was a superb and very specific answer, which makes absolute sense, I never would have though to look at the input cap locations, I mean, they seem close, but I guess from what you are saying they need to be almost touching pad?

I wouldn't go that far. The major problem with your existing layout is the complete lack of a useable ground plane, and the resultant horrific loop area. Also, pay attention to your AGND and PGND pins.

[rx8pilot]

Well, everyone is taking about frequency like its a big deal.  It's not, in this case.  This isn't a sine wave.  The slew rates of MOSFET switches is not even a little related to how often you switch them. 

I believe the switching frequency is relevant because the higher frequencies require faster slew rates than lower frequencies. As you pointed out, the slew rate required is kind of the root of all evil and largely what created the layout challenges. With lower frequency you have more options to slow the gate pulse down passively to avoid the problems you get with very high dV/dt. It is harder to layout a 500khz SMPS than a 50Khz in my opinion. The higher freq's have a lot less forgiveness.

I definitely agree that the input caps need to be nearly on top of the input to the chip. My general lesson from SMPS designs is that the layout can't be tight enough. Visualize the current paths - I print it out on paper and use a highlighter to follow the current around. Sounds silly, but the tiniest details make real improvements.

[T3sl4co1l]

Contrary to popular belief, minimial series inductance isn't a good idea.

That said, monolithic switchers are designed with it in mind, so you need the caps nearby anyway, in this case.  10nH won't be a problem, they wouldn't ever work if they needed less than that.

Tim

[Wilksey]

I have redone the PSU section as a separate board, I have tightened up the placement and put a plane on the bottom, and connected everything to the plane, moved the feedback circuitry across near the output, added 6 VIAs to the centre pad of the switcher.  I hope I have captured all comments sufficiently and laid the board out accordingly.

Will this layout work for this switcher?

TIA!

[Monkeh]

Your comp pin is effectively floating. You've still mixed up AGND and PGND.

Get rid of the thermals on the vias in the thermal pad. They defeat the purpose.

You may want to use more and larger vias, and pour GND on the top as well.

[T3sl4co1l]

Pins 7 and 8, it's preferable to route them lengthwise, out from the footprint, then join together.  When pads are shorted together laterally, you are depending on the soldermask to prevent a shorted solder joint.  So you're at risk of generating false-positives during inspection.  AOI (automated optical inspection) can detect when solder joints are correct or shorted together, but doesn't know that pads might be joined electrically anyway.

Doesn't really matter for manual assembly, but even then, pins glommed together are probably a slight mechanical concern, so should still be avoided.  And it looks ugly..

Also, neck down the traces.  They shouldn't be wider than the pads.  Pin 2 to TP1 can all be smaller traces, and it's not a problem for performance.

I'd rather see pin 6 routed on the bottom, but keep it down around (below, even) where the compensation parts are.  That way it's not disturbing the bottom ground pour beneath the circuit.

One of C4-C5 should be flipped so it can connect directly to pin 1 as well.

Why not pour copper over the top, and stitch with vias?

Tim

[rx8pilot]

Your FB divider and filter cap will pickup less noise if placed close to the chip. Make the trace after the output caps, but consider putting the divider itselfe right next to the chip. It is drastically lowering the voltage for the FB pin and has a long way to travel and pickup noise.

Overall, there is a major improvement!

Your comp pin is effectively floating.

That is weird. That cap should be on the 'quiet ground' which is the AGND and it appears to be connected to nothing. The FB divider should also be returned to this ground. For my designs, I cut an AGND below the chip and the comp, FB parts. then tie them together at one small point. The goal is to keep the PGND and AGND separated since you can expect ground noise on the high current side and the control components need to be isolated as much as possible from that.