Nulling Input Offset Voltage

[TinyMirrors]

I have an opamp which drifts slowly throughout 10 hours. It's drifting around by 10mV with a 100V output. It's a high voltage amplifier that I can't just change. After a lot of testing I believe it's most likely input offset voltage as it needs to only drift by 75uV to cause the drift on the output.

So what are you favorite ways to nullify input offset drift? The opamp is a 4 channels, but only 3 channels are used. I believe the opamps are on a single die in the package.

Thanks!

[jbb]

How low do you need it? Do you need it low on all channels or just 1?

Have you checked whether it could be due to temperature coefficients in the feedback divider?

[DaJMasta]

Especially with such high voltage, I would also suspect tempco issues with other parts, but perhaps even with air currents over the opamp.  Some amount of input offset is normal, but can often be nulled out by a trimmer pot in a divider, so the rest is probably coming from thermal drift of something involved.


Do you really need 6 digits of accuracy in this circuit, though?  I know you say that you can't really change it, but if you're really looking for that kind of stability, you may need to rework your component choice at least, and maybe your thermal design as well, because that sort of stability is challenging without considering them in the design.  I'm sure they exist, but I can't figure an application where 10mV swing on 100V makes much of a practical difference.

[TinyMirrors]

Hi jbb

One channel would be enough as the other two channel aren't are critical.

The spec I would like to meet is around 0.5mV or lower, but I'm sure a bit more would be okay. Currently there exists a system that meets this spec, but is no longer in production so this is a replacement. I have a lot of requirements around this device so I don't have many options available to change to.

I don't suspect this is due to temperature as the temperature and humidity were controlled and monitored but found no correlation to the drift. The temperature fluctuation was less than 0.5 degrees. Relative humidity is around 5%. There are no major sources of heat on the board. Using a thermal camera the hot spot of a regulator is about 3 inches away and is about 4 degrees warmer. There's no change to the board's temperature during the test.

I've tried to ensure that the environment is changing as little as possible, no dust is falling on the board, and the no sources of noise near the board. Thought I haven't yet put it in a cookie tin.

Hope that gives a few clues to help figure this out.

[DaJMasta]

The plot thickens!  To be sure, have you checked the voltage rails for fluctuation as well?  If they're drifting around, any virtual ground could be moving.  Also, you've verified that the drift is not present on the 100V measured with a 6+ digit DMM?

[TinyMirrors]

I've tried to carefully design and check the voltage rails. This particular opamp is fun and has two different voltage rails. One for the input and one for the output. I'm using a 5V reference for the 5V rails to keep it as low noise as possible. I'm using a variation of design from Jim Williams for the high voltage supply. See figure 17 from this AN118.

https://www.analog.com/media/en/technical-documentation/application-notes/an118fb.pdf

There's no virtual ground in this setup. It's setup as non inverting gain. Everything is also attached to a ground plane with a single connection to the power supply. The opamp is not driving much if any power as it is only attached to a 20pF-30pF load.

[nick_d]

Referring to your fig17, the 1M resistor on the FB pin is a concern. Could you try changing the feedback network to 100k/619 ohms instead of 1M/6.19k? Your offset could be occurring at the FB input to the LT1172 and the stronger divider will give better voltage stability wrt. changes in the LT1172 input current.

Aside from that, could you post your circuit and indicate which node has the .1V error and describe the voltages in the rest of the circuit? I gather it's a high gain high voltage output that is drifting but beyond that it's not too clear.

We can also help more creatively if you post the circuit you're replacing and specs that must be met in the replacement.

cheers, Nick

[David Hess]

So what are you favorite ways to nullify input offset drift?

My favorite way?  Use a better operational amplifier.

Keep in mind that the input bias current through the input resistance also contributes to input offset voltage.  If this is significant, then a lower source resistance or input bias current cancellation will help.  If a bipolar part without built in bias current cancellation is used, then a spare amplifier in a dual or quad can be used to cancel input bias current in some circuit configurations.

[RandallMcRee]

Perhaps use a servo (opamp integrator) to dynamically null the offset.

https://www.uaudio.com/webzine/2006/december/text/content2.html

If your integrator is an autozero opamp all the better.

[TinyMirrors]

I've attached a schematic. I feel uncomfortable putting the specific part numbers since this is for work. The low pass filter is in silicon and can't easily be changed. But the inputs to the opamp are accessible and can be configured.

I do like the idea of adding a servo. However the voltages can become quite high, say 200-400V depending on the use.

[jbb]

I’m sure this application is interesting, so I understand why you can’t share much.

Four things come to mind. I’m no analog expert, so please take these with a grain of salt.

Firstly, your environment is super dry, so have you been strict about ESD protection? Sometimes an ESD strike will damage a part and cause poor operation rather than simply destroy it. (During one internship in a low humidity lab I was basically The Death of MOSFETs.)

Secondly, have you checked everything is nice and clean? No-clean solder leaves residue which is hard to clean. Maybe you could try washable flux and then wash it the boards clean?

Thirdly, how about using a preamp? If you have +-5V available, you could use a precision amp to gain your reference signal up from 1.2V to say 4V (G=-3.3) and then reduce the gain of your high V amp to G=-20.  This will dilute the impact of main amp input noise and offset (assuming preamp is better!).  It will also turn the main amp into an inverting type with the input common mode at 0V (virtual ground for the win) and remove CMRR as an error term. Also makes a guard ring easier, which may be relevant with those high value feedback resistors.

Finally, a composite amplifier might be a good solution. There is an LT application note on them somewhere on www.analog.com.

[TinyMirrors]

Hey jbb,

The environment is a production cleanroom with esd protection in everything we do. Wristbands, chairs, anti-static tiled floors are used for protection.

I've cleaned the boards using detergent 8 and dionized water in an ultra sonic bath so there should be virtually no residue. There isn't any that I can see at least.

I really like the composite amplifier solution. It's also written by Jim Williams!! I've got a 3 hole binder of his application notes on my desk. I should have known he'd have a solution. Thanks! This is really the direction of a solution I'm looking for. This is much easier to implement than the chopper amp setup I was contemplating with the spare channel. There aren't many if any in person analog people around to gather ideas so I really appreciate the help.

[Gyro]

I've cleaned the boards using detergent 8 and dionized water in an ultra sonic bath so there should be virtually no residue. There isn't any that I can see at least.

Hmmm, if you've got non-hermetic epoxy packages involved, not to mention the PCB, it may not be as 'humidity controlled' as you think. My bet is that there's a good deal of drying out still going on. After a wash like that you can probably expect a good deal of settling time before it stabilizes.

FR4 PCB substrates in particular take a long time to dry out and you've got high voltages involved.

[nick_d]

Thanks for posting the schematic!

It is an interesting problem. I am not super familiar with low-offset stuff or active offset nulling and so on, so my thoughts were more along the lines of avoiding the issue by applying engineering principles, forgive if I am stating the obvious as I feel it useful to eliminate obvious things first.

You said the input stage is powered separately and from a 5V reference. Have you checked the specs carefully? The current drive it can provide and the capacitive load it can drive without oscillation? It seems risky to me to use a reference as a power supply. Can you swap it out for something like a 78L05 or LP2950? Op amps have very good CMRR so I do not see the need for a fancy power supply. Having more current drive will probably improve regulation more than basing it off a super accurate reference.

Now about the input offset. In principle this occurs because the input current, while theoretically zero, isn't zero. It may be microamps. So even if you hold the input at PRECISELY some reference voltage, the voltage the op-amp sees at the input will vary slightly due to the input current and the tiny voltages that this develops e.g. if there is input resistance.

To a large extent this is unavoidable and it also should not matter overly much since it mostly just behaves like an extra input resistor (or impedance) or an extra feedback resistor or an extra resistor to ground or similar, and this should have fairly repeatable and predictable effects through the output swing and the input operating range. Input current can be affected by temperature, but you say the temperature is not changing significantly. So it does seem mysterious so far.

The above analysis assumes you are holding the inputs at precisely the wanted voltages and any offset error is internal to the op-amp. I suspect this is not the case. My concern is that changes in the input offset current is changing the voltages in the resistive divider networks feeding the inputs, because of the high value resistors you have chosen.

With those 1M resistors you'll get 1 uA per volt so about 5 uA. An input offset current of just .1uA could change the current in the upper or lower leg of the divider by as much as 2%, you're not seeing such an extreme drift however I think you can see my point that such large resistor values are risky. I could see why to use 1M dividers in battery powered equipment but that's normally in places where some drift or offset is unnoticeable, and I would never use 1M in mains powered equipment at all, I would aim for 100k usually.

Theoretically, if you have only negative feedback and all factors such as temperature, supply voltage and RFI are controlled, then it is totally impossible for your output to drift over time. However, it can happen if there is some positive feedback in the system. And I think that is your case. As you use different values at the different inputs (680k, 1M etc) then a tiny fluctuation in offset current can have a larger effect at the positive terminal than negative hence causing the drift to become self reinforcing until another fluctuation.

You said the filter can't be changed. So you can't change the 680k to 68k? Then what about buffering it with a high quality op-amp... NE5534? Anyway. I must say that blanket statements about what can and can't be changed are not super helpful. Of course a minimal change solution may be sought, but surely if the problem turns out to lie with a particular part then it would be sensible to change it.

Anyway, the things proposed here are easy to test. I would have thought that once you have the test operational it would be a fairly simple matter to swap things until you find the source of the drift. Hopefully I gave some ideas to try.

cheers, Nick

[David Hess]

You have a massive DC resistance imbalance between the inputs so unless that is a low input bias current operational amplifier with JFET or MOSFET inputs, additional drift is being created.  Adding another 499k resistor in series with the inverting input will remove this source of error.  The resistor should be bypassed with a small capacitor to maintain a low AC impedance at the inverting input.  Ignore this if the operational amplifier has low input bias current which is likely.  See below.

75 microvolts of drift is certainly possible with a JFET or MOSFET input operational amplifier.  Since this is apparently a high voltage part, it is probably a MOSFET design and they are the worst in this respect.  If this is the case, the only solution is to use a better design with an auxiliary amplifier to null the offset of the high voltage amplifier.  This is actually a pretty common problem when high voltage operational amplifiers are used.

There is another possible significant source of error in your circuit which should be considered.  The 83.3 volts across R1 is likely to cause the gain to drift and may explain the change in output voltage you are seeing.  Several smaller resistors in series will improve this situation or a resistor rated for high voltage operation will help.

[TinyMirrors]

Thanks for the replies. I'll see what I can do about adding a buffer between the low pass filter and the input. This seems like the easiest thing to try so it shouldn't be too hard to do. I'll also try matching the resistors for both inputs.

R1 a metal thin film resistor. Not sure if it's the best type to use in this case. Part number RG2012P-105-B-T5. I'll look into using several smaller value resistors.

I believe the design is a mosfet based opamp. I'll have to read into how this would drift. It is possible the design consists of an opamp and a high voltage gain stage. In that case it might be the hv gain stage that is drifting and not the input offsets.

Sorry nick_d for the blanket statements. I'll try to keep that in mind for the future. The capacitor is in silicon and the cutoff frequency is fixed for this application so that's why it would be hard to change.

[nick_d]

Cool. By the way, when I said NE5534 I was mistakenly thinking this was a FET input, I meant something like TL072. And in regards to the 1M resistors I was forgetting that the voltage across them is some 100V not 5V. So a significant current will develop in them compared with the gate input current making them less susceptible to inaccuracy than I thought. Still it could be a useful test to swap it to say 500k and see if this halves the drift. Anyway. In much fewer words David Hess summed up the idea of offsets affecting the positive input more than the negative, like I said I am not super experienced in this. I hope you get it sorted out!
cheers, Nick

[lowimpedance]

I've cleaned the boards using detergent 8 and dionized water in an ultra sonic bath so there should be virtually no residue. There isn't any that I can see at least.

Hmmm, if you've got non-hermetic epoxy packages involved, not to mention the PCB, it may not be as 'humidity controlled' as you think. My bet is that there's a good deal of drying out still going on. After a wash like that you can probably expect a good deal of settling time before it stabilizes.

FR4 PCB substrates in particular take a long time to dry out and you've got high voltages involved.

I also have a suspicion that the PCB has some effect, have you considered a different dielectric besides FR4 (making the assumption that the circuit is constructed on FR4 of course  ).
Would this mystery 'op amp' be from APEX by chance.

Is it possible to bodge up the same circuit with point to point wiring ,ie no PCB , to eliminate PCB effects ?.

[David Hess]

I believe the design is a mosfet based opamp. I'll have to read into how this would drift. It is possible the design consists of an opamp and a high voltage gain stage. In that case it might be the hv gain stage that is drifting and not the input offsets.

The parts I am familiar with come from Apex Microtechnology and use hybrid construction with MOSFET input and output stages.  They easily have the levels of drift that you mentioned and would be used with a separate error correcting operational amplifier for higher precision.

[TinyMirrors]

Hey guys! I have tried the PA441! Though maybe I should try it again since I've had some lessons learned since my first attempt with it last year. I couldn't get the output to drift less than 60mV at the time. Another opamp for some applications is the HV264. It also has two power supply inputs and has issues drifting.

You guys bring up a good point about having two different error corrections for the different gain stages. Maybe this is just an issue with most designs based on a mosfet high voltage gain stage.

I could go another route and add a gain stage with a good opamp front end. Something from Application Note 18 by Jim Williams. Any suggestions on that route?

[David Hess]

If you want to keep your existing high voltage amplifier then there are a couple of ways to DC stabilize it but for simplicity I would start with the non-inverting example shown in the Burr-Brown application note included below.  Typically a precision part like an LT1001 or OP07 would be used but if you need single supply operation, then there are precision single supply parts like the LT1006/LT1013/LT1014.

The idea is to enclose the high voltage output stage which is configured for a fixed gain inside the feedback loop of the precision operational amplifier.  The output stage gain needs to be high enough so the precision amplifier can drive it.  But there are some things to be aware of:

1. The high voltage at the output can get back through the feedback network and damage the precision operational amplifier so a clamp should be used.  This is especially a problem if a feedback capacitor is used on the outer feedback network.

2. The added phase lag of the output amplifier can make the input amplifier unstable.  Using a slow input amplifier or adding AC feedback between the input amplifier's output and inverting input solves this.