Author Topic: optocoupler theoretical question  (Read 4877 times)

0 Members and 1 Guest are viewing this topic.

Offline Clear as mudTopic starter

  • Regular Contributor
  • *
  • Posts: 207
  • Country: us
    • Pax Electronics
optocoupler theoretical question
« on: September 19, 2014, 01:35:14 am »
I am not fully understanding the operation of transistor-output optocouplers/photocouplers.  I see from the data sheet that as the load resistance decreases, switching speed increases.  This makes sense as a tradeoff of power consumption vs. speed, but I am not understanding the mechanism, the reason WHY the rise time and fall time decrease with a smaller load resistance value.
For example, see this data sheet: http://www.cel.com/pdf/datasheets/ps2501.pdf.  At the bottom of page six is the test circuit.  In the middle of page 8 is the graph of switching time vs. load resistance.  As I think about the operation of the circuit, it seems that as the transistor turns on, it should have a harder time supplying more current, and therefore the rise time, at least, should go up as the resistance goes down.  But this is not what happens.  Can someone explain why?

Then also, is it correct to say that using a smaller load resistor will allow higher-frequency operation, but at the cost not only of increased power consumption, but reduced usable lifetime of the circuit?  Because the optocoupler will be operating closer to its maximum CTR, when the LED degrades, the circuit will become unusable sooner than if a higher RL were used?

Edited: fixed link.
« Last Edit: September 22, 2014, 01:24:43 am by Clear as mud »
 

Online moffy

  • Super Contributor
  • ***
  • Posts: 1722
  • Country: au
Re: optocoupler theoretical question
« Reply #1 on: September 20, 2014, 12:18:13 am »
For any circuit there are parasitic capacitances, which I guess you know. The only thing that should be effected is the turn off time, as the RC time constant of the load resistor with parasitics is dominant. There is also a turn off delay while minority carriers are cleared, this can be quite long if the transistor saturates.
Your link didn't work for me, so if the rise time is slower for higher load resistance perhaps there is less drive? Can't tell as link not working.
 

Offline Paul Rose

  • Regular Contributor
  • *
  • Posts: 139
  • Country: us
Re: optocoupler theoretical question
« Reply #2 on: September 20, 2014, 12:46:39 am »

Take the dot off the end of the pdf and the link will work.

The graph shows that the turn off time (tf) varies with load resistance, just like moffy said.  The turn on time (tr) is pretty steady.

 
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21658
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: optocoupler theoretical question
« Reply #3 on: September 20, 2014, 01:47:02 am »
It's not that the transistor is charging and discharging things.  That works for constant currents and fixed voltages and slew rates, but that has to do with a certain nonlinearity.  Optos tend to be more linear than that.

A good model of an optotransistor is a variable current sink (in parallel with a diode so it doesn't pull below 0V) in parallel with a capacitor, which is in turn supplied by the external resistor and supply.

The frequency response of this model is simply Vo = Iin * (R || Zc), so it rolls off (-3dB) at the frequency when R = Xc.  The gain is Vo = Iin * R.

If you make R smaller, the cutoff frequency rises, and the gain falls proportionately.  You get less than 1V of signal for a 100 ohm load, but at least you get transitions in the single microseconds range.

What if you want more?  You can cheat by using external amplifiers.  Here's an example:



The 4N35 collector 'tugs' on a PNP emitter, which has a very small load resistor pulling up to the supply.  In fact, the impedance seen by the 4N35 will be even less than 51 ohms, more like 2 ohms as shown (the small signal equivalent emitter resistance of the PNP).  This is called "folded cascode", 'folded' because the input current is pulling down, yet the output (the PNP collector) is pulling up, and 'cascode' meaning a collector driving another emitter.  (The three other transistors in this circuit only serve to supply bias voltage / current, or buffer the output, though they are nonetheless important to operation.  One cheat: the 4N35 transistor is itself being used as an amplifier; the circuit works just as well with something like 6N138 though.)

Anyway, with the R feeding the 4N35 being as small as possible, the speed is as high as can be, under a microsecond.  The gain is also quite linear.  This, I believe, is about as close to ideal / theoretical as a 4N35 can get; ultimately, performance is limited by the structure of the phototransistor itself, which is optimized for optical gain, at expense to speed, breakdown voltage and other design variables.

For general purposes, I would much rather suggest a 6N138 (faster, simple to use, cheap), or one of many logic type isolators (optical or inductive) that are available.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline dannyf

  • Super Contributor
  • ***
  • Posts: 8221
  • Country: 00
Re: optocoupler theoretical question
« Reply #4 on: September 20, 2014, 11:42:15 am »
Quote
it seems that as the transistor turns on, it should have a harder time supplying more current, and therefore the rise time, at least, should go up as the resistance goes down.

That will be true at the very high-end of the current range -> if the load resistance is too low, the output may never swing enough.

Short of that, the way to think of it is to think of the transistor as a capacitor (carrier charges) where the current is used to reverse the charge. High current means faster reversal, to a point.
================================
https://dannyelectronics.wordpress.com/
 

Offline David Hess

  • Super Contributor
  • ***
  • Posts: 16607
  • Country: us
  • DavidH
Re: optocoupler theoretical question
« Reply #5 on: September 24, 2014, 11:07:35 am »
What if you want more?  You can cheat by using external amplifiers.

You can also cheat if the optocoupler provides access to the base by using it as a photo diode or adding a shunt resistor to remove stored charge from the base at the expense of gain.
 

Offline mikerj

  • Super Contributor
  • ***
  • Posts: 3238
  • Country: gb
Re: optocoupler theoretical question
« Reply #6 on: September 24, 2014, 11:27:47 am »
Quote
it seems that as the transistor turns on, it should have a harder time supplying more current, and therefore the rise time, at least, should go up as the resistance goes down.

That will be true at the very high-end of the current range -> if the load resistance is too low, the output may never swing enough.

Rise time is defined as a percentage of the final value (20/80 or 10/90) so even if the signal doesn't reach the desired value, this doesn't mean that the rise time has increased.
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf